Commit 7debeb82ffad5480c230c116ba17a9c1d8e32016
1 parent
498fbd8a
Name the magic constants, use correct value for AUX2_PWRFAIL
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3754 c046a42c-6fe2-441c-8c8c-71466251a162
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51 additions
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32 deletions
hw/slavio_misc.c
... | ... | @@ -58,11 +58,30 @@ typedef struct MiscState { |
58 | 58 | #define LED_MAXADDR 2 |
59 | 59 | #define LED_SIZE (LED_MAXADDR + 1) |
60 | 60 | |
61 | +#define MISC_MASK 0x0fff0000 | |
62 | +#define MISC_LEDS 0x01600000 | |
63 | +#define MISC_CFG 0x01800000 | |
64 | +#define MISC_AUX1 0x01900000 | |
65 | +#define MISC_AUX2 0x01910000 | |
66 | +#define MISC_DIAG 0x01a00000 | |
67 | +#define MISC_MDM 0x01b00000 | |
68 | +#define MISC_SYS 0x01f00000 | |
69 | +#define MISC_PWR 0x0a000000 | |
70 | + | |
71 | +#define AUX2_PWROFF 0x01 | |
72 | +#define AUX2_PWRINTCLR 0x02 | |
73 | +#define AUX2_PWRFAIL 0x20 | |
74 | + | |
75 | +#define CFG_PWRINTEN 0x08 | |
76 | + | |
77 | +#define SYS_RESET 0x01 | |
78 | +#define SYS_RESETSTAT 0x02 | |
79 | + | |
61 | 80 | static void slavio_misc_update_irq(void *opaque) |
62 | 81 | { |
63 | 82 | MiscState *s = opaque; |
64 | 83 | |
65 | - if ((s->aux2 & 0x4) && (s->config & 0x8)) { | |
84 | + if ((s->aux2 & AUX2_PWRFAIL) && (s->config & CFG_PWRINTEN)) { | |
66 | 85 | MISC_DPRINTF("Raise IRQ\n"); |
67 | 86 | qemu_irq_raise(s->irq); |
68 | 87 | } else { |
... | ... | @@ -84,10 +103,10 @@ void slavio_set_power_fail(void *opaque, int power_failing) |
84 | 103 | MiscState *s = opaque; |
85 | 104 | |
86 | 105 | MISC_DPRINTF("Power fail: %d, config: %d\n", power_failing, s->config); |
87 | - if (power_failing && (s->config & 0x8)) { | |
88 | - s->aux2 |= 0x4; | |
106 | + if (power_failing && (s->config & CFG_PWRINTEN)) { | |
107 | + s->aux2 |= AUX2_PWRFAIL; | |
89 | 108 | } else { |
90 | - s->aux2 &= ~0x4; | |
109 | + s->aux2 &= ~AUX2_PWRFAIL; | |
91 | 110 | } |
92 | 111 | slavio_misc_update_irq(s); |
93 | 112 | } |
... | ... | @@ -97,36 +116,36 @@ static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr, |
97 | 116 | { |
98 | 117 | MiscState *s = opaque; |
99 | 118 | |
100 | - switch (addr & 0xfff0000) { | |
101 | - case 0x1800000: | |
119 | + switch (addr & MISC_MASK) { | |
120 | + case MISC_CFG: | |
102 | 121 | MISC_DPRINTF("Write config %2.2x\n", val & 0xff); |
103 | 122 | s->config = val & 0xff; |
104 | 123 | slavio_misc_update_irq(s); |
105 | 124 | break; |
106 | - case 0x1900000: | |
125 | + case MISC_AUX1: | |
107 | 126 | MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff); |
108 | 127 | s->aux1 = val & 0xff; |
109 | 128 | break; |
110 | - case 0x1910000: | |
111 | - val &= 0x3; | |
129 | + case MISC_AUX2: | |
130 | + val &= AUX2_PWRINTCLR | AUX2_PWROFF; | |
112 | 131 | MISC_DPRINTF("Write aux2 %2.2x\n", val); |
113 | - val |= s->aux2 & 0x4; | |
114 | - if (val & 0x2) // Clear Power Fail int | |
115 | - val &= 0x1; | |
132 | + val |= s->aux2 & AUX2_PWRFAIL; | |
133 | + if (val & AUX2_PWRINTCLR) // Clear Power Fail int | |
134 | + val &= AUX2_PWROFF; | |
116 | 135 | s->aux2 = val; |
117 | - if (val & 1) | |
136 | + if (val & AUX2_PWROFF) | |
118 | 137 | qemu_system_shutdown_request(); |
119 | 138 | slavio_misc_update_irq(s); |
120 | 139 | break; |
121 | - case 0x1a00000: | |
140 | + case MISC_DIAG: | |
122 | 141 | MISC_DPRINTF("Write diag %2.2x\n", val & 0xff); |
123 | 142 | s->diag = val & 0xff; |
124 | 143 | break; |
125 | - case 0x1b00000: | |
144 | + case MISC_MDM: | |
126 | 145 | MISC_DPRINTF("Write modem control %2.2x\n", val & 0xff); |
127 | 146 | s->mctrl = val & 0xff; |
128 | 147 | break; |
129 | - case 0xa000000: | |
148 | + case MISC_PWR: | |
130 | 149 | MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); |
131 | 150 | cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); |
132 | 151 | break; |
... | ... | @@ -138,28 +157,28 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr) |
138 | 157 | MiscState *s = opaque; |
139 | 158 | uint32_t ret = 0; |
140 | 159 | |
141 | - switch (addr & 0xfff0000) { | |
142 | - case 0x1800000: | |
160 | + switch (addr & MISC_MASK) { | |
161 | + case MISC_CFG: | |
143 | 162 | ret = s->config; |
144 | 163 | MISC_DPRINTF("Read config %2.2x\n", ret); |
145 | 164 | break; |
146 | - case 0x1900000: | |
165 | + case MISC_AUX1: | |
147 | 166 | ret = s->aux1; |
148 | 167 | MISC_DPRINTF("Read aux1 %2.2x\n", ret); |
149 | 168 | break; |
150 | - case 0x1910000: | |
169 | + case MISC_AUX2: | |
151 | 170 | ret = s->aux2; |
152 | 171 | MISC_DPRINTF("Read aux2 %2.2x\n", ret); |
153 | 172 | break; |
154 | - case 0x1a00000: | |
173 | + case MISC_DIAG: | |
155 | 174 | ret = s->diag; |
156 | 175 | MISC_DPRINTF("Read diag %2.2x\n", ret); |
157 | 176 | break; |
158 | - case 0x1b00000: | |
177 | + case MISC_MDM: | |
159 | 178 | ret = s->mctrl; |
160 | 179 | MISC_DPRINTF("Read modem control %2.2x\n", ret); |
161 | 180 | break; |
162 | - case 0xa000000: | |
181 | + case MISC_PWR: | |
163 | 182 | MISC_DPRINTF("Read power management %2.2x\n", ret); |
164 | 183 | break; |
165 | 184 | } |
... | ... | @@ -207,8 +226,8 @@ static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr, |
207 | 226 | val); |
208 | 227 | switch (saddr) { |
209 | 228 | case 0: |
210 | - if (val & 1) { | |
211 | - s->sysctrl = 0x2; | |
229 | + if (val & SYS_RESET) { | |
230 | + s->sysctrl = SYS_RESETSTAT; | |
212 | 231 | qemu_system_reset_request(); |
213 | 232 | } |
214 | 233 | break; |
... | ... | @@ -328,19 +347,19 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
328 | 347 | slavio_misc_io_memory = cpu_register_io_memory(0, slavio_misc_mem_read, |
329 | 348 | slavio_misc_mem_write, s); |
330 | 349 | // Slavio control |
331 | - cpu_register_physical_memory(base + 0x1800000, MISC_SIZE, | |
350 | + cpu_register_physical_memory(base + MISC_CFG, MISC_SIZE, | |
332 | 351 | slavio_misc_io_memory); |
333 | 352 | // AUX 1 |
334 | - cpu_register_physical_memory(base + 0x1900000, MISC_SIZE, | |
353 | + cpu_register_physical_memory(base + MISC_AUX1, MISC_SIZE, | |
335 | 354 | slavio_misc_io_memory); |
336 | 355 | // AUX 2 |
337 | - cpu_register_physical_memory(base + 0x1910000, MISC_SIZE, | |
356 | + cpu_register_physical_memory(base + MISC_AUX2, MISC_SIZE, | |
338 | 357 | slavio_misc_io_memory); |
339 | 358 | // Diagnostics |
340 | - cpu_register_physical_memory(base + 0x1a00000, MISC_SIZE, | |
359 | + cpu_register_physical_memory(base + MISC_DIAG, MISC_SIZE, | |
341 | 360 | slavio_misc_io_memory); |
342 | 361 | // Modem control |
343 | - cpu_register_physical_memory(base + 0x1b00000, MISC_SIZE, | |
362 | + cpu_register_physical_memory(base + MISC_MDM, MISC_SIZE, | |
344 | 363 | slavio_misc_io_memory); |
345 | 364 | // Power management |
346 | 365 | cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory); |
... | ... | @@ -349,7 +368,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
349 | 368 | slavio_misc_io_memory = cpu_register_io_memory(0, slavio_led_mem_read, |
350 | 369 | slavio_led_mem_write, s); |
351 | 370 | /* ss600mp diag LEDs */ |
352 | - cpu_register_physical_memory(base + 0x1600000, MISC_SIZE, | |
371 | + cpu_register_physical_memory(base + MISC_LEDS, MISC_SIZE, | |
353 | 372 | slavio_misc_io_memory); |
354 | 373 | |
355 | 374 | /* 32 bit registers */ |
... | ... | @@ -357,7 +376,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
357 | 376 | slavio_sysctrl_mem_write, |
358 | 377 | s); |
359 | 378 | // System control |
360 | - cpu_register_physical_memory(base + 0x1f00000, SYSCTRL_SIZE, | |
379 | + cpu_register_physical_memory(base + MISC_SYS, SYSCTRL_SIZE, | |
361 | 380 | slavio_misc_io_memory); |
362 | 381 | |
363 | 382 | s->irq = irq; | ... | ... |