Commit 7d77bf200682ed8cbd0c94bdfbac64dc4b23b149
1 parent
8f6f6026
More Sparc64 CPU definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
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99 additions
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1 deletions
target-sparc/translate.c
... | ... | @@ -3503,8 +3503,106 @@ CPUSPARCState *cpu_sparc_init(void) |
3503 | 3503 | static const sparc_def_t sparc_defs[] = { |
3504 | 3504 | #ifdef TARGET_SPARC64 |
3505 | 3505 | { |
3506 | + .name = "Fujitsu Sparc64", | |
3507 | + .iu_version = ((0x04ULL << 48) | (0x02ULL << 32) | (0ULL << 24) | |
3508 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3509 | + .fpu_version = 0x00000000, | |
3510 | + .mmu_version = 0, | |
3511 | + }, | |
3512 | + { | |
3513 | + .name = "Fujitsu Sparc64 III", | |
3514 | + .iu_version = ((0x04ULL << 48) | (0x03ULL << 32) | (0ULL << 24) | |
3515 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3516 | + .fpu_version = 0x00000000, | |
3517 | + .mmu_version = 0, | |
3518 | + }, | |
3519 | + { | |
3520 | + .name = "Fujitsu Sparc64 IV", | |
3521 | + .iu_version = ((0x04ULL << 48) | (0x04ULL << 32) | (0ULL << 24) | |
3522 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3523 | + .fpu_version = 0x00000000, | |
3524 | + .mmu_version = 0, | |
3525 | + }, | |
3526 | + { | |
3527 | + .name = "Fujitsu Sparc64 V", | |
3528 | + .iu_version = ((0x04ULL << 48) | (0x05ULL << 32) | (0x51ULL << 24) | |
3529 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3530 | + .fpu_version = 0x00000000, | |
3531 | + .mmu_version = 0, | |
3532 | + }, | |
3533 | + { | |
3534 | + .name = "TI UltraSparc I", | |
3535 | + .iu_version = ((0x17ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24) | |
3536 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3537 | + .fpu_version = 0x00000000, | |
3538 | + .mmu_version = 0, | |
3539 | + }, | |
3540 | + { | |
3506 | 3541 | .name = "TI UltraSparc II", |
3507 | - .iu_version = ((0x17ULL << 48) | (0x11ULL << 32) | (0 << 24) | |
3542 | + .iu_version = ((0x17ULL << 48) | (0x11ULL << 32) | (0x20ULL << 24) | |
3543 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3544 | + .fpu_version = 0x00000000, | |
3545 | + .mmu_version = 0, | |
3546 | + }, | |
3547 | + { | |
3548 | + .name = "TI UltraSparc IIi", | |
3549 | + .iu_version = ((0x17ULL << 48) | (0x12ULL << 32) | (0x91ULL << 24) | |
3550 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3551 | + .fpu_version = 0x00000000, | |
3552 | + .mmu_version = 0, | |
3553 | + }, | |
3554 | + { | |
3555 | + .name = "TI UltraSparc IIe", | |
3556 | + .iu_version = ((0x17ULL << 48) | (0x13ULL << 32) | (0x14ULL << 24) | |
3557 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3558 | + .fpu_version = 0x00000000, | |
3559 | + .mmu_version = 0, | |
3560 | + }, | |
3561 | + { | |
3562 | + .name = "Sun UltraSparc III", | |
3563 | + .iu_version = ((0x3eULL << 48) | (0x14ULL << 32) | (0x34ULL << 24) | |
3564 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3565 | + .fpu_version = 0x00000000, | |
3566 | + .mmu_version = 0, | |
3567 | + }, | |
3568 | + { | |
3569 | + .name = "Sun UltraSparc III Cu", | |
3570 | + .iu_version = ((0x3eULL << 48) | (0x15ULL << 32) | (0x41ULL << 24) | |
3571 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3572 | + .fpu_version = 0x00000000, | |
3573 | + .mmu_version = 0, | |
3574 | + }, | |
3575 | + { | |
3576 | + .name = "Sun UltraSparc IIIi", | |
3577 | + .iu_version = ((0x3eULL << 48) | (0x16ULL << 32) | (0x34ULL << 24) | |
3578 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3579 | + .fpu_version = 0x00000000, | |
3580 | + .mmu_version = 0, | |
3581 | + }, | |
3582 | + { | |
3583 | + .name = "Sun UltraSparc IV", | |
3584 | + .iu_version = ((0x3eULL << 48) | (0x18ULL << 32) | (0x31ULL << 24) | |
3585 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3586 | + .fpu_version = 0x00000000, | |
3587 | + .mmu_version = 0, | |
3588 | + }, | |
3589 | + { | |
3590 | + .name = "Sun UltraSparc IV+", | |
3591 | + .iu_version = ((0x3eULL << 48) | (0x19ULL << 32) | (0x22ULL << 24) | |
3592 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3593 | + .fpu_version = 0x00000000, | |
3594 | + .mmu_version = 0, | |
3595 | + }, | |
3596 | + { | |
3597 | + .name = "Sun UltraSparc IIIi+", | |
3598 | + .iu_version = ((0x3eULL << 48) | (0x22ULL << 32) | (0ULL << 24) | |
3599 | + | (MAXTL << 8) | (NWINDOWS - 1)), | |
3600 | + .fpu_version = 0x00000000, | |
3601 | + .mmu_version = 0, | |
3602 | + }, | |
3603 | + { | |
3604 | + .name = "NEC UltraSparc I", | |
3605 | + .iu_version = ((0x22ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24) | |
3508 | 3606 | | (MAXTL << 8) | (NWINDOWS - 1)), |
3509 | 3607 | .fpu_version = 0x00000000, |
3510 | 3608 | .mmu_version = 0, | ... | ... |