Commit 7c417963f7346cf4fdc2a0cc08bdeb0ee7165f8d

Authored by aurel32
1 parent 39dd32ee

ppc: Convert op_subf to TCG

Replace op_subf with tcg_gen_sub_tl.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5168 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/op.c
@@ -881,13 +881,6 @@ void OPPROTO op_nego_64 (void) @@ -881,13 +881,6 @@ void OPPROTO op_nego_64 (void)
881 } 881 }
882 #endif 882 #endif
883 883
884 -/* subtract from */  
885 -void OPPROTO op_subf (void)  
886 -{  
887 - T0 = T1 - T0;  
888 - RETURN();  
889 -}  
890 -  
891 /* subtract from carrying */ 884 /* subtract from carrying */
892 void OPPROTO op_check_subfc (void) 885 void OPPROTO op_check_subfc (void)
893 { 886 {
target-ppc/translate.c
@@ -950,10 +950,14 @@ GEN_INT_ARITH2 (mullw, 0x1F, 0x0B, 0x07, PPC_INTEGER); @@ -950,10 +950,14 @@ GEN_INT_ARITH2 (mullw, 0x1F, 0x0B, 0x07, PPC_INTEGER);
950 /* neg neg. nego nego. */ 950 /* neg neg. nego nego. */
951 GEN_INT_ARITH1_64 (neg, 0x1F, 0x08, 0x03, PPC_INTEGER); 951 GEN_INT_ARITH1_64 (neg, 0x1F, 0x08, 0x03, PPC_INTEGER);
952 /* subf subf. subfo subfo. */ 952 /* subf subf. subfo subfo. */
  953 +static always_inline void gen_op_subf (void)
  954 +{
  955 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
  956 +}
953 static always_inline void gen_op_subfo (void) 957 static always_inline void gen_op_subfo (void)
954 { 958 {
955 tcg_gen_not_tl(cpu_T[2], cpu_T[0]); 959 tcg_gen_not_tl(cpu_T[2], cpu_T[0]);
956 - gen_op_subf(); 960 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
957 gen_op_check_addo(); 961 gen_op_check_addo();
958 } 962 }
959 #if defined(TARGET_PPC64) 963 #if defined(TARGET_PPC64)
@@ -961,7 +965,7 @@ static always_inline void gen_op_subfo (void) @@ -961,7 +965,7 @@ static always_inline void gen_op_subfo (void)
961 static always_inline void gen_op_subfo_64 (void) 965 static always_inline void gen_op_subfo_64 (void)
962 { 966 {
963 tcg_gen_not_i64(cpu_T[2], cpu_T[0]); 967 tcg_gen_not_i64(cpu_T[2], cpu_T[0]);
964 - gen_op_subf(); 968 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
965 gen_op_check_addo_64(); 969 gen_op_check_addo_64();
966 } 970 }
967 #endif 971 #endif
@@ -969,26 +973,26 @@ GEN_INT_ARITH2_64 (subf, 0x1F, 0x08, 0x01, PPC_INTEGER); @@ -969,26 +973,26 @@ GEN_INT_ARITH2_64 (subf, 0x1F, 0x08, 0x01, PPC_INTEGER);
969 /* subfc subfc. subfco subfco. */ 973 /* subfc subfc. subfco subfco. */
970 static always_inline void gen_op_subfc (void) 974 static always_inline void gen_op_subfc (void)
971 { 975 {
972 - gen_op_subf(); 976 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
973 gen_op_check_subfc(); 977 gen_op_check_subfc();
974 } 978 }
975 static always_inline void gen_op_subfco (void) 979 static always_inline void gen_op_subfco (void)
976 { 980 {
977 tcg_gen_not_tl(cpu_T[2], cpu_T[0]); 981 tcg_gen_not_tl(cpu_T[2], cpu_T[0]);
978 - gen_op_subf(); 982 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
979 gen_op_check_subfc(); 983 gen_op_check_subfc();
980 gen_op_check_addo(); 984 gen_op_check_addo();
981 } 985 }
982 #if defined(TARGET_PPC64) 986 #if defined(TARGET_PPC64)
983 static always_inline void gen_op_subfc_64 (void) 987 static always_inline void gen_op_subfc_64 (void)
984 { 988 {
985 - gen_op_subf(); 989 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
986 gen_op_check_subfc_64(); 990 gen_op_check_subfc_64();
987 } 991 }
988 static always_inline void gen_op_subfco_64 (void) 992 static always_inline void gen_op_subfco_64 (void)
989 { 993 {
990 tcg_gen_not_i64(cpu_T[2], cpu_T[0]); 994 tcg_gen_not_i64(cpu_T[2], cpu_T[0]);
991 - gen_op_subf(); 995 + tcg_gen_sub_tl(cpu_T[0], cpu_T[1], cpu_T[0]);
992 gen_op_check_subfc_64(); 996 gen_op_check_subfc_64();
993 gen_op_check_addo_64(); 997 gen_op_check_addo_64();
994 } 998 }