Commit 73cfd29fb34568f926386c2f43811362f2c22154

Authored by Edgar E. Iglesias
1 parent df84e4f3

ETRAX: Simplify PIC interface.

Instead of exporting a custom structure to represent different
interrupt types, just export the irq array and have the top
elements point to the NMI lines.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
hw/axis_dev88.c
@@ -257,7 +257,7 @@ void axisdev88_init (ram_addr_t ram_size, @@ -257,7 +257,7 @@ void axisdev88_init (ram_addr_t ram_size,
257 const char *initrd_filename, const char *cpu_model) 257 const char *initrd_filename, const char *cpu_model)
258 { 258 {
259 CPUState *env; 259 CPUState *env;
260 - struct etraxfs_pic *pic; 260 + qemu_irq *irq, *nmi;
261 void *etraxfs_dmac; 261 void *etraxfs_dmac;
262 struct etraxfs_dma_client *eth[2] = {NULL, NULL}; 262 struct etraxfs_dma_client *eth[2] = {NULL, NULL};
263 int kernel_size; 263 int kernel_size;
@@ -295,18 +295,20 @@ void axisdev88_init (ram_addr_t ram_size, @@ -295,18 +295,20 @@ void axisdev88_init (ram_addr_t ram_size,
295 cpu_register_physical_memory(0x3001a000, 0x5c, gpio_regs); 295 cpu_register_physical_memory(0x3001a000, 0x5c, gpio_regs);
296 296
297 297
298 - pic = etraxfs_pic_init(env, 0x3001c000); 298 + irq = etraxfs_pic_init(env, 0x3001c000);
  299 + nmi = irq + 30;
  300 +
299 etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10); 301 etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
300 for (i = 0; i < 10; i++) { 302 for (i = 0; i < 10; i++) {
301 /* On ETRAX, odd numbered channels are inputs. */ 303 /* On ETRAX, odd numbered channels are inputs. */
302 - etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1); 304 + etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1);
303 } 305 }
304 306
305 /* Add the two ethernet blocks. */ 307 /* Add the two ethernet blocks. */
306 - eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000, 1); 308 + eth[0] = etraxfs_eth_init(&nd_table[0], env, irq + 25, 0x30034000, 1);
307 if (nb_nics > 1) 309 if (nb_nics > 1)
308 eth[1] = etraxfs_eth_init(&nd_table[1], env, 310 eth[1] = etraxfs_eth_init(&nd_table[1], env,
309 - pic->irq + 26, 0x30036000, 2); 311 + irq + 26, 0x30036000, 2);
310 312
311 /* The DMA Connector block is missing, hardwire things for now. */ 313 /* The DMA Connector block is missing, hardwire things for now. */
312 etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]); 314 etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
@@ -317,12 +319,12 @@ void axisdev88_init (ram_addr_t ram_size, @@ -317,12 +319,12 @@ void axisdev88_init (ram_addr_t ram_size,
317 } 319 }
318 320
319 /* 2 timers. */ 321 /* 2 timers. */
320 - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);  
321 - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000); 322 + etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000);
  323 + etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000);
322 324
323 for (i = 0; i < 4; i++) { 325 for (i = 0; i < 4; i++) {
324 if (serial_hds[i]) { 326 if (serial_hds[i]) {
325 - etraxfs_ser_init(env, pic->irq + 0x14 + i, 327 + etraxfs_ser_init(env, irq + 0x14 + i,
326 serial_hds[i], 0x30026000 + i * 0x2000); 328 serial_hds[i], 0x30026000 + i * 0x2000);
327 } 329 }
328 } 330 }
hw/etraxfs.c
@@ -52,7 +52,7 @@ void bareetraxfs_init (ram_addr_t ram_size, @@ -52,7 +52,7 @@ void bareetraxfs_init (ram_addr_t ram_size,
52 const char *initrd_filename, const char *cpu_model) 52 const char *initrd_filename, const char *cpu_model)
53 { 53 {
54 CPUState *env; 54 CPUState *env;
55 - struct etraxfs_pic *pic; 55 + qemu_irq *irq, *nmi;
56 void *etraxfs_dmac; 56 void *etraxfs_dmac;
57 struct etraxfs_dma_client *eth[2] = {NULL, NULL}; 57 struct etraxfs_dma_client *eth[2] = {NULL, NULL};
58 int kernel_size; 58 int kernel_size;
@@ -86,18 +86,20 @@ void bareetraxfs_init (ram_addr_t ram_size, @@ -86,18 +86,20 @@ void bareetraxfs_init (ram_addr_t ram_size,
86 FLASH_SIZE >> 16, 86 FLASH_SIZE >> 16,
87 1, 2, 0x0000, 0x0000, 0x0000, 0x0000, 87 1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
88 0x555, 0x2aa); 88 0x555, 0x2aa);
89 - pic = etraxfs_pic_init(env, 0x3001c000); 89 + irq = etraxfs_pic_init(env, 0x3001c000);
  90 + nmi = irq + 30;
  91 +
90 etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10); 92 etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
91 for (i = 0; i < 10; i++) { 93 for (i = 0; i < 10; i++) {
92 /* On ETRAX, odd numbered channels are inputs. */ 94 /* On ETRAX, odd numbered channels are inputs. */
93 - etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1); 95 + etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1);
94 } 96 }
95 97
96 /* Add the two ethernet blocks. */ 98 /* Add the two ethernet blocks. */
97 - eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000, 1); 99 + eth[0] = etraxfs_eth_init(&nd_table[0], env, irq + 25, 0x30034000, 1);
98 if (nb_nics > 1) 100 if (nb_nics > 1)
99 eth[1] = etraxfs_eth_init(&nd_table[1], env, 101 eth[1] = etraxfs_eth_init(&nd_table[1], env,
100 - pic->irq + 26, 0x30036000, 2); 102 + irq + 26, 0x30036000, 2);
101 103
102 /* The DMA Connector block is missing, hardwire things for now. */ 104 /* The DMA Connector block is missing, hardwire things for now. */
103 etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]); 105 etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
@@ -108,12 +110,12 @@ void bareetraxfs_init (ram_addr_t ram_size, @@ -108,12 +110,12 @@ void bareetraxfs_init (ram_addr_t ram_size,
108 } 110 }
109 111
110 /* 2 timers. */ 112 /* 2 timers. */
111 - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);  
112 - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000); 113 + etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000);
  114 + etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000);
113 115
114 for (i = 0; i < 4; i++) { 116 for (i = 0; i < 4; i++) {
115 if (serial_hds[i]) { 117 if (serial_hds[i]) {
116 - etraxfs_ser_init(env, pic->irq + 0x14 + i, 118 + etraxfs_ser_init(env, irq + 0x14 + i,
117 serial_hds[i], 0x30026000 + i * 0x2000); 119 serial_hds[i], 0x30026000 + i * 0x2000);
118 } 120 }
119 } 121 }
hw/etraxfs.h
@@ -24,16 +24,7 @@ @@ -24,16 +24,7 @@
24 24
25 #include "etraxfs_dma.h" 25 #include "etraxfs_dma.h"
26 26
27 -struct etraxfs_pic  
28 -{  
29 - qemu_irq *irq;  
30 - qemu_irq *nmi;  
31 - qemu_irq *guru;  
32 -  
33 - void *internal;  
34 -};  
35 -  
36 -struct etraxfs_pic *etraxfs_pic_init(CPUState *env, target_phys_addr_t base); 27 +qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base);
37 void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi, 28 void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi,
38 target_phys_addr_t base); 29 target_phys_addr_t base);
39 void *etraxfs_eth_init(NICInfo *nd, CPUState *env, 30 void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
hw/etraxfs_pic.c
@@ -118,16 +118,6 @@ void irq_info(Monitor *mon) @@ -118,16 +118,6 @@ void irq_info(Monitor *mon)
118 { 118 {
119 } 119 }
120 120
121 -static void irq_handler(void *opaque, int irq, int level)  
122 -{  
123 - struct fs_pic_state *fs = (void *)opaque;  
124 - irq -= 1;  
125 - fs->regs[R_R_VECT] &= ~(1 << irq);  
126 - fs->regs[R_R_VECT] |= (!!level << irq);  
127 -  
128 - pic_update(fs);  
129 -}  
130 -  
131 static void nmi_handler(void *opaque, int irq, int level) 121 static void nmi_handler(void *opaque, int irq, int level)
132 { 122 {
133 struct fs_pic_state *fs = (void *)opaque; 123 struct fs_pic_state *fs = (void *)opaque;
@@ -146,27 +136,30 @@ static void nmi_handler(void *opaque, int irq, int level) @@ -146,27 +136,30 @@ static void nmi_handler(void *opaque, int irq, int level)
146 cpu_reset_interrupt(env, CPU_INTERRUPT_NMI); 136 cpu_reset_interrupt(env, CPU_INTERRUPT_NMI);
147 } 137 }
148 138
149 -static void guru_handler(void *opaque, int irq, int level) 139 +static void irq_handler(void *opaque, int irq, int level)
150 { 140 {
151 - hw_error("%s unsupported exception\n", __func__); 141 + struct fs_pic_state *fs = (void *)opaque;
  142 +
  143 + if (irq >= 30)
  144 + return nmi_handler(opaque, irq, level);
  145 +
  146 + irq -= 1;
  147 + fs->regs[R_R_VECT] &= ~(1 << irq);
  148 + fs->regs[R_R_VECT] |= (!!level << irq);
  149 + pic_update(fs);
152 } 150 }
153 151
154 -struct etraxfs_pic *etraxfs_pic_init(CPUState *env, target_phys_addr_t base) 152 +qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
155 { 153 {
156 struct fs_pic_state *fs = NULL; 154 struct fs_pic_state *fs = NULL;
157 - struct etraxfs_pic *pic = NULL; 155 + qemu_irq *irq;
158 int intr_vect_regs; 156 int intr_vect_regs;
159 157
160 - pic = qemu_mallocz(sizeof *pic);  
161 - pic->internal = fs = qemu_mallocz(sizeof *fs);  
162 - 158 + fs = qemu_mallocz(sizeof *fs);
163 fs->env = env; 159 fs->env = env;
164 - pic->irq = qemu_allocate_irqs(irq_handler, fs, 30);  
165 - pic->nmi = qemu_allocate_irqs(nmi_handler, fs, 2);  
166 - pic->guru = qemu_allocate_irqs(guru_handler, fs, 1); 160 + irq = qemu_allocate_irqs(irq_handler, fs, 32);
167 161
168 intr_vect_regs = cpu_register_io_memory(0, pic_read, pic_write, fs); 162 intr_vect_regs = cpu_register_io_memory(0, pic_read, pic_write, fs);
169 cpu_register_physical_memory(base, R_MAX * 4, intr_vect_regs); 163 cpu_register_physical_memory(base, R_MAX * 4, intr_vect_regs);
170 -  
171 - return pic; 164 + return irq;
172 } 165 }