Commit df84e4f34504ffc2d9daaa0238fcf67f3dbbf681
Committed by
malc
1 parent
bcd4933a
support ELF_HWCAP for PPPC
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
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linux-user/elfload.c
... | ... | @@ -300,6 +300,64 @@ static inline void init_thread(struct target_pt_regs *regs, struct image_info *i |
300 | 300 | #endif |
301 | 301 | #define ELF_ARCH EM_PPC |
302 | 302 | |
303 | +/* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). | |
304 | + See arch/powerpc/include/asm/cputable.h. */ | |
305 | +enum { | |
306 | + PPC_FEATURE_32 = 0x80000000, | |
307 | + PPC_FEATURE_64 = 0x40000000, | |
308 | + PPC_FEATURE_601_INSTR = 0x20000000, | |
309 | + PPC_FEATURE_HAS_ALTIVEC = 0x10000000, | |
310 | + PPC_FEATURE_HAS_FPU = 0x08000000, | |
311 | + PPC_FEATURE_HAS_MMU = 0x04000000, | |
312 | + PPC_FEATURE_HAS_4xxMAC = 0x02000000, | |
313 | + PPC_FEATURE_UNIFIED_CACHE = 0x01000000, | |
314 | + PPC_FEATURE_HAS_SPE = 0x00800000, | |
315 | + PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000, | |
316 | + PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000, | |
317 | + PPC_FEATURE_NO_TB = 0x00100000, | |
318 | + PPC_FEATURE_POWER4 = 0x00080000, | |
319 | + PPC_FEATURE_POWER5 = 0x00040000, | |
320 | + PPC_FEATURE_POWER5_PLUS = 0x00020000, | |
321 | + PPC_FEATURE_CELL = 0x00010000, | |
322 | + PPC_FEATURE_BOOKE = 0x00008000, | |
323 | + PPC_FEATURE_SMT = 0x00004000, | |
324 | + PPC_FEATURE_ICACHE_SNOOP = 0x00002000, | |
325 | + PPC_FEATURE_ARCH_2_05 = 0x00001000, | |
326 | + PPC_FEATURE_PA6T = 0x00000800, | |
327 | + PPC_FEATURE_HAS_DFP = 0x00000400, | |
328 | + PPC_FEATURE_POWER6_EXT = 0x00000200, | |
329 | + PPC_FEATURE_ARCH_2_06 = 0x00000100, | |
330 | + PPC_FEATURE_HAS_VSX = 0x00000080, | |
331 | + PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040, | |
332 | + | |
333 | + PPC_FEATURE_TRUE_LE = 0x00000002, | |
334 | + PPC_FEATURE_PPC_LE = 0x00000001, | |
335 | +}; | |
336 | + | |
337 | +#define ELF_HWCAP get_elf_hwcap() | |
338 | + | |
339 | +static uint32_t get_elf_hwcap(void) | |
340 | +{ | |
341 | + CPUState *e = thread_env; | |
342 | + uint32_t features = 0; | |
343 | + | |
344 | + /* We don't have to be terribly complete here; the high points are | |
345 | + Altivec/FP/SPE support. Anything else is just a bonus. */ | |
346 | +#define GET_FEATURE(flag, feature) \ | |
347 | + do {if (e->insns_flags & flag) features |= feature; } while(0) | |
348 | + GET_FEATURE(PPC_64B, PPC_FEATURE_64); | |
349 | + GET_FEATURE(PPC_FLOAT, PPC_FEATURE_HAS_FPU); | |
350 | + GET_FEATURE(PPC_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC); | |
351 | + GET_FEATURE(PPC_SPE, PPC_FEATURE_HAS_SPE); | |
352 | + GET_FEATURE(PPC_SPE_SINGLE, PPC_FEATURE_HAS_EFP_SINGLE); | |
353 | + GET_FEATURE(PPC_SPE_DOUBLE, PPC_FEATURE_HAS_EFP_DOUBLE); | |
354 | + GET_FEATURE(PPC_BOOKE, PPC_FEATURE_BOOKE); | |
355 | + GET_FEATURE(PPC_405_MAC, PPC_FEATURE_HAS_4xxMAC); | |
356 | +#undef GET_FEATURE | |
357 | + | |
358 | + return features; | |
359 | +} | |
360 | + | |
303 | 361 | /* |
304 | 362 | * We need to put in some extra aux table entries to tell glibc what |
305 | 363 | * the cache block size is, so it can use the dcbz instruction safely. | ... | ... |