Commit 70cf0b63f106e6de33326b47c485d0624831f237

Authored by ths
1 parent 71db710f

R5k has PX implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 2 additions and 2 deletions
target-mips/translate_init.c
@@ -161,7 +161,7 @@ static mips_def_t mips_defs[] = @@ -161,7 +161,7 @@ static mips_def_t mips_defs[] =
161 .CP0_Config3 = MIPS_CONFIG3, 161 .CP0_Config3 = MIPS_CONFIG3,
162 .SYNCI_Step = 32, 162 .SYNCI_Step = 32,
163 .CCRes = 2, 163 .CCRes = 2,
164 - .Status_rw_bitmask = 0x3278FFFF, 164 + .Status_rw_bitmask = 0x32F8FFFF,
165 }, 165 },
166 { 166 {
167 .name = "5Kf", 167 .name = "5Kf",
@@ -175,7 +175,7 @@ static mips_def_t mips_defs[] = @@ -175,7 +175,7 @@ static mips_def_t mips_defs[] =
175 .CP0_Config3 = MIPS_CONFIG3, 175 .CP0_Config3 = MIPS_CONFIG3,
176 .SYNCI_Step = 32, 176 .SYNCI_Step = 32,
177 .CCRes = 2, 177 .CCRes = 2,
178 - .Status_rw_bitmask = 0x3678FFFF, 178 + .Status_rw_bitmask = 0x36F8FFFF,
179 /* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */ 179 /* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */
180 .CP1_fcr0 = (1 << FCR0_D) | (1 << FCR0_S) | 180 .CP1_fcr0 = (1 << FCR0_D) | (1 << FCR0_S) |
181 (0x81 << FCR0_PRID) | (0x0 << FCR0_REV), 181 (0x81 << FCR0_PRID) | (0x0 << FCR0_REV),