gwj / at91sam9263 · Commits

Commit 578bb25230229307c0b6ff62ae03ac0fbda27b18

Authored by j_mayer
1 parent 056b05f8

More comments about unimplemented SPRs. 

Tag unused functions with unused attribute instead of using #ifdef (TODO)
  to ease tests: just have to enable the implementation in the cpu_defs table.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3306 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 110 additions and 56 deletions
target-ppc/translate_init.c
  View file @578bb25
@@ -275,17 +275,16 @@ static void spr_write_sdr1 (void *opaque, int sprn) @@ -275,17 +275,16 @@ static void spr_write_sdr1 (void *opaque, int sprn)
275 275
276 /* 64 bits PowerPC specific SPRs */ 276 /* 64 bits PowerPC specific SPRs */
277 /* ASR */ 277 /* ASR */
278 -/* Currently unused */  
279 -#if 0 && defined(TARGET_PPC64) 278 +#if defined(TARGET_PPC64)
  279 +__attribute__ (( unused ))
280 static void spr_read_asr (void *opaque, int sprn) 280 static void spr_read_asr (void *opaque, int sprn)
281 { 281 {
282 gen_op_load_asr(); 282 gen_op_load_asr();
283 } 283 }
284 284
  285 +__attribute__ (( unused ))
285 static void spr_write_asr (void *opaque, int sprn) 286 static void spr_write_asr (void *opaque, int sprn)
286 { 287 {
287 - DisasContext *ctx = opaque;  
288 -  
289 gen_op_store_asr(); 288 gen_op_store_asr();
290 } 289 }
291 #endif 290 #endif
@@ -816,30 +815,37 @@ static void gen_spr_7xx (CPUPPCState *env) @@ -816,30 +815,37 @@ static void gen_spr_7xx (CPUPPCState *env)
816 SPR_NOACCESS, SPR_NOACCESS, 815 SPR_NOACCESS, SPR_NOACCESS,
817 &spr_read_generic, SPR_NOACCESS, 816 &spr_read_generic, SPR_NOACCESS,
818 0x00000000); 817 0x00000000);
  818 + /* XXX : not implemented */
819 spr_register(env, SPR_UMMCR0, "UMMCR0", 819 spr_register(env, SPR_UMMCR0, "UMMCR0",
820 &spr_read_ureg, SPR_NOACCESS, 820 &spr_read_ureg, SPR_NOACCESS,
821 &spr_read_ureg, SPR_NOACCESS, 821 &spr_read_ureg, SPR_NOACCESS,
822 0x00000000); 822 0x00000000);
  823 + /* XXX : not implemented */
823 spr_register(env, SPR_UMMCR1, "UMMCR1", 824 spr_register(env, SPR_UMMCR1, "UMMCR1",
824 &spr_read_ureg, SPR_NOACCESS, 825 &spr_read_ureg, SPR_NOACCESS,
825 &spr_read_ureg, SPR_NOACCESS, 826 &spr_read_ureg, SPR_NOACCESS,
826 0x00000000); 827 0x00000000);
  828 + /* XXX : not implemented */
827 spr_register(env, SPR_UPMC1, "UPMC1", 829 spr_register(env, SPR_UPMC1, "UPMC1",
828 &spr_read_ureg, SPR_NOACCESS, 830 &spr_read_ureg, SPR_NOACCESS,
829 &spr_read_ureg, SPR_NOACCESS, 831 &spr_read_ureg, SPR_NOACCESS,
830 0x00000000); 832 0x00000000);
  833 + /* XXX : not implemented */
831 spr_register(env, SPR_UPMC2, "UPMC2", 834 spr_register(env, SPR_UPMC2, "UPMC2",
832 &spr_read_ureg, SPR_NOACCESS, 835 &spr_read_ureg, SPR_NOACCESS,
833 &spr_read_ureg, SPR_NOACCESS, 836 &spr_read_ureg, SPR_NOACCESS,
834 0x00000000); 837 0x00000000);
  838 + /* XXX : not implemented */
835 spr_register(env, SPR_UPMC3, "UPMC3", 839 spr_register(env, SPR_UPMC3, "UPMC3",
836 &spr_read_ureg, SPR_NOACCESS, 840 &spr_read_ureg, SPR_NOACCESS,
837 &spr_read_ureg, SPR_NOACCESS, 841 &spr_read_ureg, SPR_NOACCESS,
838 0x00000000); 842 0x00000000);
  843 + /* XXX : not implemented */
839 spr_register(env, SPR_UPMC4, "UPMC4", 844 spr_register(env, SPR_UPMC4, "UPMC4",
840 &spr_read_ureg, SPR_NOACCESS, 845 &spr_read_ureg, SPR_NOACCESS,
841 &spr_read_ureg, SPR_NOACCESS, 846 &spr_read_ureg, SPR_NOACCESS,
842 0x00000000); 847 0x00000000);
  848 + /* XXX : not implemented */
843 spr_register(env, SPR_USIAR, "USIAR", 849 spr_register(env, SPR_USIAR, "USIAR",
844 &spr_read_ureg, SPR_NOACCESS, 850 &spr_read_ureg, SPR_NOACCESS,
845 &spr_read_ureg, SPR_NOACCESS, 851 &spr_read_ureg, SPR_NOACCESS,
@@ -956,12 +962,14 @@ static void gen_spr_G2 (CPUPPCState *env) @@ -956,12 +962,14 @@ static void gen_spr_G2 (CPUPPCState *env)
956 { 962 {
957 /* Memory base address */ 963 /* Memory base address */
958 /* MBAR */ 964 /* MBAR */
  965 + /* XXX : not implemented */
959 spr_register(env, SPR_MBAR, "MBAR", 966 spr_register(env, SPR_MBAR, "MBAR",
960 SPR_NOACCESS, SPR_NOACCESS, 967 SPR_NOACCESS, SPR_NOACCESS,
961 &spr_read_generic, &spr_write_generic, 968 &spr_read_generic, &spr_write_generic,
962 0x00000000); 969 0x00000000);
963 /* System version register */ 970 /* System version register */
964 /* SVR */ 971 /* SVR */
  972 + /* XXX : TODO: initialize it to an appropriate value */
965 spr_register(env, SPR_SVR, "SVR", 973 spr_register(env, SPR_SVR, "SVR",
966 SPR_NOACCESS, SPR_NOACCESS, 974 SPR_NOACCESS, SPR_NOACCESS,
967 &spr_read_generic, SPR_NOACCESS, 975 &spr_read_generic, SPR_NOACCESS,
@@ -1143,6 +1151,7 @@ static void gen_spr_74xx (CPUPPCState *env) @@ -1143,6 +1151,7 @@ static void gen_spr_74xx (CPUPPCState *env)
1143 SPR_NOACCESS, SPR_NOACCESS, 1151 SPR_NOACCESS, SPR_NOACCESS,
1144 &spr_read_generic, &spr_write_generic, 1152 &spr_read_generic, &spr_write_generic,
1145 0x00000000); 1153 0x00000000);
  1154 + /* XXX : not implemented */
1146 spr_register(env, SPR_UMMCR2, "UMMCR2", 1155 spr_register(env, SPR_UMMCR2, "UMMCR2",
1147 &spr_read_ureg, SPR_NOACCESS, 1156 &spr_read_ureg, SPR_NOACCESS,
1148 &spr_read_ureg, SPR_NOACCESS, 1157 &spr_read_ureg, SPR_NOACCESS,
@@ -1152,10 +1161,12 @@ static void gen_spr_74xx (CPUPPCState *env) @@ -1152,10 +1161,12 @@ static void gen_spr_74xx (CPUPPCState *env)
1152 SPR_NOACCESS, SPR_NOACCESS, 1161 SPR_NOACCESS, SPR_NOACCESS,
1153 &spr_read_generic, &spr_write_generic, 1162 &spr_read_generic, &spr_write_generic,
1154 0x00000000); 1163 0x00000000);
  1164 + /* XXX : not implemented */
1155 spr_register(env, SPR_UBAMR, "UBAMR", 1165 spr_register(env, SPR_UBAMR, "UBAMR",
1156 &spr_read_ureg, SPR_NOACCESS, 1166 &spr_read_ureg, SPR_NOACCESS,
1157 &spr_read_ureg, SPR_NOACCESS, 1167 &spr_read_ureg, SPR_NOACCESS,
1158 0x00000000); 1168 0x00000000);
  1169 + /* XXX : not implemented */
1159 spr_register(env, SPR_MSSCR0, "MSSCR0", 1170 spr_register(env, SPR_MSSCR0, "MSSCR0",
1160 SPR_NOACCESS, SPR_NOACCESS, 1171 SPR_NOACCESS, SPR_NOACCESS,
1161 &spr_read_generic, &spr_write_generic, 1172 &spr_read_generic, &spr_write_generic,
@@ -1178,7 +1189,6 @@ static void gen_spr_74xx (CPUPPCState *env) @@ -1178,7 +1189,6 @@ static void gen_spr_74xx (CPUPPCState *env)
1178 0x00000000); 1189 0x00000000);
1179 } 1190 }
1180 1191
1181 -#if defined (TODO)  
1182 static void gen_l3_ctrl (CPUPPCState *env) 1192 static void gen_l3_ctrl (CPUPPCState *env)
1183 { 1193 {
1184 /* L3CR */ 1194 /* L3CR */
@@ -1188,56 +1198,64 @@ static void gen_l3_ctrl (CPUPPCState *env) @@ -1188,56 +1198,64 @@ static void gen_l3_ctrl (CPUPPCState *env)
1188 &spr_read_generic, &spr_write_generic, 1198 &spr_read_generic, &spr_write_generic,
1189 0x00000000); 1199 0x00000000);
1190 /* L3ITCR0 */ 1200 /* L3ITCR0 */
  1201 + /* XXX : not implemented */
1191 spr_register(env, SPR_L3ITCR0, "L3ITCR0", 1202 spr_register(env, SPR_L3ITCR0, "L3ITCR0",
1192 SPR_NOACCESS, SPR_NOACCESS, 1203 SPR_NOACCESS, SPR_NOACCESS,
1193 &spr_read_generic, &spr_write_generic, 1204 &spr_read_generic, &spr_write_generic,
1194 0x00000000); 1205 0x00000000);
1195 /* L3ITCR1 */ 1206 /* L3ITCR1 */
  1207 + /* XXX : not implemented */
1196 spr_register(env, SPR_L3ITCR1, "L3ITCR1", 1208 spr_register(env, SPR_L3ITCR1, "L3ITCR1",
1197 SPR_NOACCESS, SPR_NOACCESS, 1209 SPR_NOACCESS, SPR_NOACCESS,
1198 &spr_read_generic, &spr_write_generic, 1210 &spr_read_generic, &spr_write_generic,
1199 0x00000000); 1211 0x00000000);
1200 /* L3ITCR2 */ 1212 /* L3ITCR2 */
  1213 + /* XXX : not implemented */
1201 spr_register(env, SPR_L3ITCR2, "L3ITCR2", 1214 spr_register(env, SPR_L3ITCR2, "L3ITCR2",
1202 SPR_NOACCESS, SPR_NOACCESS, 1215 SPR_NOACCESS, SPR_NOACCESS,
1203 &spr_read_generic, &spr_write_generic, 1216 &spr_read_generic, &spr_write_generic,
1204 0x00000000); 1217 0x00000000);
1205 /* L3ITCR3 */ 1218 /* L3ITCR3 */
  1219 + /* XXX : not implemented */
1206 spr_register(env, SPR_L3ITCR3, "L3ITCR3", 1220 spr_register(env, SPR_L3ITCR3, "L3ITCR3",
1207 SPR_NOACCESS, SPR_NOACCESS, 1221 SPR_NOACCESS, SPR_NOACCESS,
1208 &spr_read_generic, &spr_write_generic, 1222 &spr_read_generic, &spr_write_generic,
1209 0x00000000); 1223 0x00000000);
1210 /* L3OHCR */ 1224 /* L3OHCR */
  1225 + /* XXX : not implemented */
1211 spr_register(env, SPR_L3OHCR, "L3OHCR", 1226 spr_register(env, SPR_L3OHCR, "L3OHCR",
1212 SPR_NOACCESS, SPR_NOACCESS, 1227 SPR_NOACCESS, SPR_NOACCESS,
1213 &spr_read_generic, &spr_write_generic, 1228 &spr_read_generic, &spr_write_generic,
1214 0x00000000); 1229 0x00000000);
1215 /* L3PM */ 1230 /* L3PM */
  1231 + /* XXX : not implemented */
1216 spr_register(env, SPR_L3PM, "L3PM", 1232 spr_register(env, SPR_L3PM, "L3PM",
1217 SPR_NOACCESS, SPR_NOACCESS, 1233 SPR_NOACCESS, SPR_NOACCESS,
1218 &spr_read_generic, &spr_write_generic, 1234 &spr_read_generic, &spr_write_generic,
1219 0x00000000); 1235 0x00000000);
1220 } 1236 }
1221 -#endif /* TODO */  
1222 1237
1223 -#if defined (TODO)  
1224 -static void gen_74xx_soft_tlb (CPUPPCState *env) 1238 +static void gen_74xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways)
1225 { 1239 {
1226 - /* XXX: TODO */ 1240 + env->nb_tlb = nb_tlbs;
  1241 + env->nb_ways = nb_ways;
  1242 + env->id_tlbs = 1;
  1243 + /* XXX : not implemented */
1227 spr_register(env, SPR_PTEHI, "PTEHI", 1244 spr_register(env, SPR_PTEHI, "PTEHI",
1228 SPR_NOACCESS, SPR_NOACCESS, 1245 SPR_NOACCESS, SPR_NOACCESS,
1229 &spr_read_generic, &spr_write_generic, 1246 &spr_read_generic, &spr_write_generic,
1230 0x00000000); 1247 0x00000000);
  1248 + /* XXX : not implemented */
1231 spr_register(env, SPR_PTELO, "PTELO", 1249 spr_register(env, SPR_PTELO, "PTELO",
1232 SPR_NOACCESS, SPR_NOACCESS, 1250 SPR_NOACCESS, SPR_NOACCESS,
1233 &spr_read_generic, &spr_write_generic, 1251 &spr_read_generic, &spr_write_generic,
1234 0x00000000); 1252 0x00000000);
  1253 + /* XXX : not implemented */
1235 spr_register(env, SPR_TLBMISS, "TLBMISS", 1254 spr_register(env, SPR_TLBMISS, "TLBMISS",
1236 SPR_NOACCESS, SPR_NOACCESS, 1255 SPR_NOACCESS, SPR_NOACCESS,
1237 &spr_read_generic, &spr_write_generic, 1256 &spr_read_generic, &spr_write_generic,
1238 0x00000000); 1257 0x00000000);
1239 } 1258 }
1240 -#endif /* TODO */  
1241 1259
1242 /* PowerPC BookE SPR */ 1260 /* PowerPC BookE SPR */
1243 static void gen_spr_BookE (CPUPPCState *env) 1261 static void gen_spr_BookE (CPUPPCState *env)
@@ -1491,78 +1509,92 @@ static void gen_spr_BookE (CPUPPCState *env) @@ -1491,78 +1509,92 @@ static void gen_spr_BookE (CPUPPCState *env)
1491 } 1509 }
1492 1510
1493 /* FSL storage control registers */ 1511 /* FSL storage control registers */
1494 -#if defined(TODO)  
1495 static void gen_spr_BookE_FSL (CPUPPCState *env) 1512 static void gen_spr_BookE_FSL (CPUPPCState *env)
1496 { 1513 {
1497 /* TLB assist registers */ 1514 /* TLB assist registers */
  1515 + /* XXX : not implemented */
1498 spr_register(env, SPR_BOOKE_MAS0, "MAS0", 1516 spr_register(env, SPR_BOOKE_MAS0, "MAS0",
1499 SPR_NOACCESS, SPR_NOACCESS, 1517 SPR_NOACCESS, SPR_NOACCESS,
1500 &spr_read_generic, &spr_write_generic, 1518 &spr_read_generic, &spr_write_generic,
1501 0x00000000); 1519 0x00000000);
  1520 + /* XXX : not implemented */
1502 spr_register(env, SPR_BOOKE_MAS1, "MAS2", 1521 spr_register(env, SPR_BOOKE_MAS1, "MAS2",
1503 SPR_NOACCESS, SPR_NOACCESS, 1522 SPR_NOACCESS, SPR_NOACCESS,
1504 &spr_read_generic, &spr_write_generic, 1523 &spr_read_generic, &spr_write_generic,
1505 0x00000000); 1524 0x00000000);
  1525 + /* XXX : not implemented */
1506 spr_register(env, SPR_BOOKE_MAS2, "MAS3", 1526 spr_register(env, SPR_BOOKE_MAS2, "MAS3",
1507 SPR_NOACCESS, SPR_NOACCESS, 1527 SPR_NOACCESS, SPR_NOACCESS,
1508 &spr_read_generic, &spr_write_generic, 1528 &spr_read_generic, &spr_write_generic,
1509 0x00000000); 1529 0x00000000);
  1530 + /* XXX : not implemented */
1510 spr_register(env, SPR_BOOKE_MAS3, "MAS4", 1531 spr_register(env, SPR_BOOKE_MAS3, "MAS4",
1511 SPR_NOACCESS, SPR_NOACCESS, 1532 SPR_NOACCESS, SPR_NOACCESS,
1512 &spr_read_generic, &spr_write_generic, 1533 &spr_read_generic, &spr_write_generic,
1513 0x00000000); 1534 0x00000000);
  1535 + /* XXX : not implemented */
1514 spr_register(env, SPR_BOOKE_MAS4, "MAS5", 1536 spr_register(env, SPR_BOOKE_MAS4, "MAS5",
1515 SPR_NOACCESS, SPR_NOACCESS, 1537 SPR_NOACCESS, SPR_NOACCESS,
1516 &spr_read_generic, &spr_write_generic, 1538 &spr_read_generic, &spr_write_generic,
1517 0x00000000); 1539 0x00000000);
  1540 + /* XXX : not implemented */
1518 spr_register(env, SPR_BOOKE_MAS6, "MAS6", 1541 spr_register(env, SPR_BOOKE_MAS6, "MAS6",
1519 SPR_NOACCESS, SPR_NOACCESS, 1542 SPR_NOACCESS, SPR_NOACCESS,
1520 &spr_read_generic, &spr_write_generic, 1543 &spr_read_generic, &spr_write_generic,
1521 0x00000000); 1544 0x00000000);
  1545 + /* XXX : not implemented */
1522 spr_register(env, SPR_BOOKE_MAS7, "MAS7", 1546 spr_register(env, SPR_BOOKE_MAS7, "MAS7",
1523 SPR_NOACCESS, SPR_NOACCESS, 1547 SPR_NOACCESS, SPR_NOACCESS,
1524 &spr_read_generic, &spr_write_generic, 1548 &spr_read_generic, &spr_write_generic,
1525 0x00000000); 1549 0x00000000);
1526 if (env->nb_pids > 1) { 1550 if (env->nb_pids > 1) {
  1551 + /* XXX : not implemented */
1527 spr_register(env, SPR_BOOKE_PID1, "PID1", 1552 spr_register(env, SPR_BOOKE_PID1, "PID1",
1528 SPR_NOACCESS, SPR_NOACCESS, 1553 SPR_NOACCESS, SPR_NOACCESS,
1529 &spr_read_generic, &spr_write_generic, 1554 &spr_read_generic, &spr_write_generic,
1530 0x00000000); 1555 0x00000000);
1531 } 1556 }
1532 if (env->nb_pids > 2) { 1557 if (env->nb_pids > 2) {
  1558 + /* XXX : not implemented */
1533 spr_register(env, SPR_BOOKE_PID2, "PID2", 1559 spr_register(env, SPR_BOOKE_PID2, "PID2",
1534 SPR_NOACCESS, SPR_NOACCESS, 1560 SPR_NOACCESS, SPR_NOACCESS,
1535 &spr_read_generic, &spr_write_generic, 1561 &spr_read_generic, &spr_write_generic,
1536 0x00000000); 1562 0x00000000);
1537 } 1563 }
  1564 + /* XXX : not implemented */
1538 spr_register(env, SPR_BOOKE_MMUCFG, "MMUCFG", 1565 spr_register(env, SPR_BOOKE_MMUCFG, "MMUCFG",
1539 SPR_NOACCESS, SPR_NOACCESS, 1566 SPR_NOACCESS, SPR_NOACCESS,
1540 &spr_read_generic, SPR_NOACCESS, 1567 &spr_read_generic, SPR_NOACCESS,
1541 0x00000000); /* TOFIX */ 1568 0x00000000); /* TOFIX */
  1569 + /* XXX : not implemented */
1542 spr_register(env, SPR_BOOKE_MMUCSR0, "MMUCSR0", 1570 spr_register(env, SPR_BOOKE_MMUCSR0, "MMUCSR0",
1543 SPR_NOACCESS, SPR_NOACCESS, 1571 SPR_NOACCESS, SPR_NOACCESS,
1544 &spr_read_generic, &spr_write_generic, 1572 &spr_read_generic, &spr_write_generic,
1545 0x00000000); /* TOFIX */ 1573 0x00000000); /* TOFIX */
1546 switch (env->nb_ways) { 1574 switch (env->nb_ways) {
1547 case 4: 1575 case 4:
  1576 + /* XXX : not implemented */
1548 spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG", 1577 spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
1549 SPR_NOACCESS, SPR_NOACCESS, 1578 SPR_NOACCESS, SPR_NOACCESS,
1550 &spr_read_generic, SPR_NOACCESS, 1579 &spr_read_generic, SPR_NOACCESS,
1551 0x00000000); /* TOFIX */ 1580 0x00000000); /* TOFIX */
1552 /* Fallthru */ 1581 /* Fallthru */
1553 case 3: 1582 case 3:
  1583 + /* XXX : not implemented */
1554 spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG", 1584 spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
1555 SPR_NOACCESS, SPR_NOACCESS, 1585 SPR_NOACCESS, SPR_NOACCESS,
1556 &spr_read_generic, SPR_NOACCESS, 1586 &spr_read_generic, SPR_NOACCESS,
1557 0x00000000); /* TOFIX */ 1587 0x00000000); /* TOFIX */
1558 /* Fallthru */ 1588 /* Fallthru */
1559 case 2: 1589 case 2:
  1590 + /* XXX : not implemented */
1560 spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG", 1591 spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
1561 SPR_NOACCESS, SPR_NOACCESS, 1592 SPR_NOACCESS, SPR_NOACCESS,
1562 &spr_read_generic, SPR_NOACCESS, 1593 &spr_read_generic, SPR_NOACCESS,
1563 0x00000000); /* TOFIX */ 1594 0x00000000); /* TOFIX */
1564 /* Fallthru */ 1595 /* Fallthru */
1565 case 1: 1596 case 1:
  1597 + /* XXX : not implemented */
1566 spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG", 1598 spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
1567 SPR_NOACCESS, SPR_NOACCESS, 1599 SPR_NOACCESS, SPR_NOACCESS,
1568 &spr_read_generic, SPR_NOACCESS, 1600 &spr_read_generic, SPR_NOACCESS,
@@ -1573,7 +1605,6 @@ static void gen_spr_BookE_FSL (CPUPPCState *env) @@ -1573,7 +1605,6 @@ static void gen_spr_BookE_FSL (CPUPPCState *env)
1573 break; 1605 break;
1574 } 1606 }
1575 } 1607 }
1576 -#endif  
1577 1608
1578 /* SPR specific to PowerPC 440 implementation */ 1609 /* SPR specific to PowerPC 440 implementation */
1579 static void gen_spr_440 (CPUPPCState *env) 1610 static void gen_spr_440 (CPUPPCState *env)
@@ -1730,7 +1761,7 @@ static void gen_spr_40x (CPUPPCState *env) @@ -1730,7 +1761,7 @@ static void gen_spr_40x (CPUPPCState *env)
1730 SPR_NOACCESS, SPR_NOACCESS, 1761 SPR_NOACCESS, SPR_NOACCESS,
1731 &spr_read_generic, &spr_write_generic, 1762 &spr_read_generic, &spr_write_generic,
1732 0x00000000); 1763 0x00000000);
1733 - /* XXX : not implemented */ 1764 + /* not emulated, as Qemu do not emulate caches */
1734 spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR", 1765 spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR",
1735 SPR_NOACCESS, SPR_NOACCESS, 1766 SPR_NOACCESS, SPR_NOACCESS,
1736 &spr_read_generic, SPR_NOACCESS, 1767 &spr_read_generic, SPR_NOACCESS,
@@ -1913,7 +1944,7 @@ static void gen_spr_401_403 (CPUPPCState *env) @@ -1913,7 +1944,7 @@ static void gen_spr_401_403 (CPUPPCState *env)
1913 SPR_NOACCESS, &spr_write_tbu, 1944 SPR_NOACCESS, &spr_write_tbu,
1914 0x00000000); 1945 0x00000000);
1915 /* Debug */ 1946 /* Debug */
1916 - /* XXX: not implemented */ 1947 + /* not emulated, as Qemu do not emulate caches */
1917 spr_register(env, SPR_403_CDBCR, "CDBCR", 1948 spr_register(env, SPR_403_CDBCR, "CDBCR",
1918 SPR_NOACCESS, SPR_NOACCESS, 1949 SPR_NOACCESS, SPR_NOACCESS,
1919 &spr_read_generic, &spr_write_generic, 1950 &spr_read_generic, &spr_write_generic,
@@ -1996,6 +2027,7 @@ static void gen_spr_403 (CPUPPCState *env) @@ -1996,6 +2027,7 @@ static void gen_spr_403 (CPUPPCState *env)
1996 SPR_NOACCESS, SPR_NOACCESS, 2027 SPR_NOACCESS, SPR_NOACCESS,
1997 &spr_read_generic, &spr_write_generic, 2028 &spr_read_generic, &spr_write_generic,
1998 0x00000000); 2029 0x00000000);
  2030 + /* XXX : not implemented */
1999 spr_register(env, SPR_40x_DAC2, "DAC2", 2031 spr_register(env, SPR_40x_DAC2, "DAC2",
2000 SPR_NOACCESS, SPR_NOACCESS, 2032 SPR_NOACCESS, SPR_NOACCESS,
2001 &spr_read_generic, &spr_write_generic, 2033 &spr_read_generic, &spr_write_generic,
@@ -2005,6 +2037,7 @@ static void gen_spr_403 (CPUPPCState *env) @@ -2005,6 +2037,7 @@ static void gen_spr_403 (CPUPPCState *env)
2005 SPR_NOACCESS, SPR_NOACCESS, 2037 SPR_NOACCESS, SPR_NOACCESS,
2006 &spr_read_generic, &spr_write_generic, 2038 &spr_read_generic, &spr_write_generic,
2007 0x00000000); 2039 0x00000000);
  2040 + /* XXX : not implemented */
2008 spr_register(env, SPR_40x_IAC2, "IAC2", 2041 spr_register(env, SPR_40x_IAC2, "IAC2",
2009 SPR_NOACCESS, SPR_NOACCESS, 2042 SPR_NOACCESS, SPR_NOACCESS,
2010 &spr_read_generic, &spr_write_generic, 2043 &spr_read_generic, &spr_write_generic,
@@ -2047,6 +2080,7 @@ static void gen_spr_403_mmu (CPUPPCState *env) @@ -2047,6 +2080,7 @@ static void gen_spr_403_mmu (CPUPPCState *env)
2047 /* SPR specific to PowerPC compression coprocessor extension */ 2080 /* SPR specific to PowerPC compression coprocessor extension */
2048 static void gen_spr_compress (CPUPPCState *env) 2081 static void gen_spr_compress (CPUPPCState *env)
2049 { 2082 {
  2083 + /* XXX : not implemented */
2050 spr_register(env, SPR_401_SKR, "SKR", 2084 spr_register(env, SPR_401_SKR, "SKR",
2051 SPR_NOACCESS, SPR_NOACCESS, 2085 SPR_NOACCESS, SPR_NOACCESS,
2052 &spr_read_generic, &spr_write_generic, 2086 &spr_read_generic, &spr_write_generic,
@@ -2054,84 +2088,100 @@ static void gen_spr_compress (CPUPPCState *env) @@ -2054,84 +2088,100 @@ static void gen_spr_compress (CPUPPCState *env)
2054 } 2088 }
2055 2089
2056 #if defined (TARGET_PPC64) 2090 #if defined (TARGET_PPC64)
2057 -#if defined (TODO)  
2058 /* SPR specific to PowerPC 620 */ 2091 /* SPR specific to PowerPC 620 */
2059 static void gen_spr_620 (CPUPPCState *env) 2092 static void gen_spr_620 (CPUPPCState *env)
2060 { 2093 {
  2094 + /* XXX : not implemented */
2061 spr_register(env, SPR_620_PMR0, "PMR0", 2095 spr_register(env, SPR_620_PMR0, "PMR0",
2062 SPR_NOACCESS, SPR_NOACCESS, 2096 SPR_NOACCESS, SPR_NOACCESS,
2063 &spr_read_generic, &spr_write_generic, 2097 &spr_read_generic, &spr_write_generic,
2064 0x00000000); 2098 0x00000000);
  2099 + /* XXX : not implemented */
2065 spr_register(env, SPR_620_PMR1, "PMR1", 2100 spr_register(env, SPR_620_PMR1, "PMR1",
2066 SPR_NOACCESS, SPR_NOACCESS, 2101 SPR_NOACCESS, SPR_NOACCESS,
2067 &spr_read_generic, &spr_write_generic, 2102 &spr_read_generic, &spr_write_generic,
2068 0x00000000); 2103 0x00000000);
  2104 + /* XXX : not implemented */
2069 spr_register(env, SPR_620_PMR2, "PMR2", 2105 spr_register(env, SPR_620_PMR2, "PMR2",
2070 SPR_NOACCESS, SPR_NOACCESS, 2106 SPR_NOACCESS, SPR_NOACCESS,
2071 &spr_read_generic, &spr_write_generic, 2107 &spr_read_generic, &spr_write_generic,
2072 0x00000000); 2108 0x00000000);
  2109 + /* XXX : not implemented */
2073 spr_register(env, SPR_620_PMR3, "PMR3", 2110 spr_register(env, SPR_620_PMR3, "PMR3",
2074 SPR_NOACCESS, SPR_NOACCESS, 2111 SPR_NOACCESS, SPR_NOACCESS,
2075 &spr_read_generic, &spr_write_generic, 2112 &spr_read_generic, &spr_write_generic,
2076 0x00000000); 2113 0x00000000);
  2114 + /* XXX : not implemented */
2077 spr_register(env, SPR_620_PMR4, "PMR4", 2115 spr_register(env, SPR_620_PMR4, "PMR4",
2078 SPR_NOACCESS, SPR_NOACCESS, 2116 SPR_NOACCESS, SPR_NOACCESS,
2079 &spr_read_generic, &spr_write_generic, 2117 &spr_read_generic, &spr_write_generic,
2080 0x00000000); 2118 0x00000000);
  2119 + /* XXX : not implemented */
2081 spr_register(env, SPR_620_PMR5, "PMR5", 2120 spr_register(env, SPR_620_PMR5, "PMR5",
2082 SPR_NOACCESS, SPR_NOACCESS, 2121 SPR_NOACCESS, SPR_NOACCESS,
2083 &spr_read_generic, &spr_write_generic, 2122 &spr_read_generic, &spr_write_generic,
2084 0x00000000); 2123 0x00000000);
  2124 + /* XXX : not implemented */
2085 spr_register(env, SPR_620_PMR6, "PMR6", 2125 spr_register(env, SPR_620_PMR6, "PMR6",
2086 SPR_NOACCESS, SPR_NOACCESS, 2126 SPR_NOACCESS, SPR_NOACCESS,
2087 &spr_read_generic, &spr_write_generic, 2127 &spr_read_generic, &spr_write_generic,
2088 0x00000000); 2128 0x00000000);
  2129 + /* XXX : not implemented */
2089 spr_register(env, SPR_620_PMR7, "PMR7", 2130 spr_register(env, SPR_620_PMR7, "PMR7",
2090 SPR_NOACCESS, SPR_NOACCESS, 2131 SPR_NOACCESS, SPR_NOACCESS,
2091 &spr_read_generic, &spr_write_generic, 2132 &spr_read_generic, &spr_write_generic,
2092 0x00000000); 2133 0x00000000);
  2134 + /* XXX : not implemented */
2093 spr_register(env, SPR_620_PMR8, "PMR8", 2135 spr_register(env, SPR_620_PMR8, "PMR8",
2094 SPR_NOACCESS, SPR_NOACCESS, 2136 SPR_NOACCESS, SPR_NOACCESS,
2095 &spr_read_generic, &spr_write_generic, 2137 &spr_read_generic, &spr_write_generic,
2096 0x00000000); 2138 0x00000000);
  2139 + /* XXX : not implemented */
2097 spr_register(env, SPR_620_PMR9, "PMR9", 2140 spr_register(env, SPR_620_PMR9, "PMR9",
2098 SPR_NOACCESS, SPR_NOACCESS, 2141 SPR_NOACCESS, SPR_NOACCESS,
2099 &spr_read_generic, &spr_write_generic, 2142 &spr_read_generic, &spr_write_generic,
2100 0x00000000); 2143 0x00000000);
  2144 + /* XXX : not implemented */
2101 spr_register(env, SPR_620_PMRA, "PMR10", 2145 spr_register(env, SPR_620_PMRA, "PMR10",
2102 SPR_NOACCESS, SPR_NOACCESS, 2146 SPR_NOACCESS, SPR_NOACCESS,
2103 &spr_read_generic, &spr_write_generic, 2147 &spr_read_generic, &spr_write_generic,
2104 0x00000000); 2148 0x00000000);
  2149 + /* XXX : not implemented */
2105 spr_register(env, SPR_620_PMRB, "PMR11", 2150 spr_register(env, SPR_620_PMRB, "PMR11",
2106 SPR_NOACCESS, SPR_NOACCESS, 2151 SPR_NOACCESS, SPR_NOACCESS,
2107 &spr_read_generic, &spr_write_generic, 2152 &spr_read_generic, &spr_write_generic,
2108 0x00000000); 2153 0x00000000);
  2154 + /* XXX : not implemented */
2109 spr_register(env, SPR_620_PMRC, "PMR12", 2155 spr_register(env, SPR_620_PMRC, "PMR12",
2110 SPR_NOACCESS, SPR_NOACCESS, 2156 SPR_NOACCESS, SPR_NOACCESS,
2111 &spr_read_generic, &spr_write_generic, 2157 &spr_read_generic, &spr_write_generic,
2112 0x00000000); 2158 0x00000000);
  2159 + /* XXX : not implemented */
2113 spr_register(env, SPR_620_PMRD, "PMR13", 2160 spr_register(env, SPR_620_PMRD, "PMR13",
2114 SPR_NOACCESS, SPR_NOACCESS, 2161 SPR_NOACCESS, SPR_NOACCESS,
2115 &spr_read_generic, &spr_write_generic, 2162 &spr_read_generic, &spr_write_generic,
2116 0x00000000); 2163 0x00000000);
  2164 + /* XXX : not implemented */
2117 spr_register(env, SPR_620_PMRE, "PMR14", 2165 spr_register(env, SPR_620_PMRE, "PMR14",
2118 SPR_NOACCESS, SPR_NOACCESS, 2166 SPR_NOACCESS, SPR_NOACCESS,
2119 &spr_read_generic, &spr_write_generic, 2167 &spr_read_generic, &spr_write_generic,
2120 0x00000000); 2168 0x00000000);
  2169 + /* XXX : not implemented */
2121 spr_register(env, SPR_620_PMRF, "PMR15", 2170 spr_register(env, SPR_620_PMRF, "PMR15",
2122 SPR_NOACCESS, SPR_NOACCESS, 2171 SPR_NOACCESS, SPR_NOACCESS,
2123 &spr_read_generic, &spr_write_generic, 2172 &spr_read_generic, &spr_write_generic,
2124 0x00000000); 2173 0x00000000);
  2174 + /* XXX : not implemented */
2125 spr_register(env, SPR_620_HID8, "HID8", 2175 spr_register(env, SPR_620_HID8, "HID8",
2126 SPR_NOACCESS, SPR_NOACCESS, 2176 SPR_NOACCESS, SPR_NOACCESS,
2127 &spr_read_generic, &spr_write_generic, 2177 &spr_read_generic, &spr_write_generic,
2128 0x00000000); 2178 0x00000000);
  2179 + /* XXX : not implemented */
2129 spr_register(env, SPR_620_HID9, "HID9", 2180 spr_register(env, SPR_620_HID9, "HID9",
2130 SPR_NOACCESS, SPR_NOACCESS, 2181 SPR_NOACCESS, SPR_NOACCESS,
2131 &spr_read_generic, &spr_write_generic, 2182 &spr_read_generic, &spr_write_generic,
2132 0x00000000); 2183 0x00000000);
2133 } 2184 }
2134 -#endif  
2135 #endif /* defined (TARGET_PPC64) */ 2185 #endif /* defined (TARGET_PPC64) */
2136 2186
2137 // XXX: TODO 2187 // XXX: TODO
@@ -2141,7 +2191,6 @@ static void gen_spr_620 (CPUPPCState *env) @@ -2141,7 +2191,6 @@ static void gen_spr_620 (CPUPPCState *env)
2141 * CTRL => SPR 152 (Power 2.04) 2191 * CTRL => SPR 152 (Power 2.04)
2142 * SCOMC => SPR 276 (64 bits ?) 2192 * SCOMC => SPR 276 (64 bits ?)
2143 * SCOMD => SPR 277 (64 bits ?) 2193 * SCOMD => SPR 277 (64 bits ?)
2144 - * ASR => SPR 280 (64 bits)  
2145 * TBU40 => SPR 286 (Power 2.04 hypv) 2194 * TBU40 => SPR 286 (Power 2.04 hypv)
2146 * HSPRG0 => SPR 304 (Power 2.04 hypv) 2195 * HSPRG0 => SPR 304 (Power 2.04 hypv)
2147 * HSPRG1 => SPR 305 (Power 2.04 hypv) 2196 * HSPRG1 => SPR 305 (Power 2.04 hypv)
@@ -2157,8 +2206,6 @@ static void gen_spr_620 (CPUPPCState *env) @@ -2157,8 +2206,6 @@ static void gen_spr_620 (CPUPPCState *env)
2157 * LPCR => SPR 316 (970) 2206 * LPCR => SPR 316 (970)
2158 * LPIDR => SPR 317 (970) 2207 * LPIDR => SPR 317 (970)
2159 * SPEFSCR => SPR 512 (Power 2.04 emb) 2208 * SPEFSCR => SPR 512 (Power 2.04 emb)
2160 - * ATBL => SPR 526 (Power 2.04 emb)  
2161 - * ATBU => SPR 527 (Power 2.04 emb)  
2162 * EPR => SPR 702 (Power 2.04 emb) 2209 * EPR => SPR 702 (Power 2.04 emb)
2163 * perf => 768-783 (Power 2.04) 2210 * perf => 768-783 (Power 2.04)
2164 * perf => 784-799 (Power 2.04) 2211 * perf => 784-799 (Power 2.04)
@@ -2349,7 +2396,7 @@ static void init_excp_604 (CPUPPCState *env) @@ -2349,7 +2396,7 @@ static void init_excp_604 (CPUPPCState *env)
2349 #endif 2396 #endif
2350 } 2397 }
2351 2398
2352 -#if defined (TODO) 2399 +#if defined(TARGET_PPC64)
2353 static void init_excp_620 (CPUPPCState *env) 2400 static void init_excp_620 (CPUPPCState *env)
2354 { 2401 {
2355 #if !defined(CONFIG_USER_ONLY) 2402 #if !defined(CONFIG_USER_ONLY)
@@ -2370,7 +2417,7 @@ static void init_excp_620 (CPUPPCState *env) @@ -2370,7 +2417,7 @@ static void init_excp_620 (CPUPPCState *env)
2370 env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; 2417 env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
2371 #endif 2418 #endif
2372 } 2419 }
2373 -#endif /* defined (TODO) */ 2420 +#endif /* defined(TARGET_PPC64) */
2374 2421
2375 static void init_excp_7x0 (CPUPPCState *env) 2422 static void init_excp_7x0 (CPUPPCState *env)
2376 { 2423 {
@@ -2436,7 +2483,6 @@ static void init_excp_7400 (CPUPPCState *env) @@ -2436,7 +2483,6 @@ static void init_excp_7400 (CPUPPCState *env)
2436 #endif 2483 #endif
2437 } 2484 }
2438 2485
2439 -#if defined (TODO)  
2440 static void init_excp_7450 (CPUPPCState *env) 2486 static void init_excp_7450 (CPUPPCState *env)
2441 { 2487 {
2442 #if !defined(CONFIG_USER_ONLY) 2488 #if !defined(CONFIG_USER_ONLY)
@@ -2461,7 +2507,6 @@ static void init_excp_7450 (CPUPPCState *env) @@ -2461,7 +2507,6 @@ static void init_excp_7450 (CPUPPCState *env)
2461 env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600; 2507 env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600;
2462 #endif 2508 #endif
2463 } 2509 }
2464 -#endif /* defined (TODO) */  
2465 2510
2466 #if defined (TARGET_PPC64) 2511 #if defined (TARGET_PPC64)
2467 static void init_excp_970 (CPUPPCState *env) 2512 static void init_excp_970 (CPUPPCState *env)
@@ -2547,7 +2592,6 @@ static void init_proc_401x2 (CPUPPCState *env) @@ -2547,7 +2592,6 @@ static void init_proc_401x2 (CPUPPCState *env)
2547 } 2592 }
2548 2593
2549 /* PowerPC 401x3 */ 2594 /* PowerPC 401x3 */
2550 -#if defined(TODO)  
2551 #define POWERPC_INSNS_401x3 (POWERPC_INSNS_EMB | \ 2595 #define POWERPC_INSNS_401x3 (POWERPC_INSNS_EMB | \
2552 PPC_MEM_SYNC | PPC_MEM_EIEIO | \ 2596 PPC_MEM_SYNC | PPC_MEM_EIEIO | \
2553 PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \ 2597 PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
@@ -2559,6 +2603,7 @@ static void init_proc_401x2 (CPUPPCState *env) @@ -2559,6 +2603,7 @@ static void init_proc_401x2 (CPUPPCState *env)
2559 #define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401) 2603 #define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401)
2560 #define POWERPC_BFDM_401x3 (bfd_mach_ppc_403) 2604 #define POWERPC_BFDM_401x3 (bfd_mach_ppc_403)
2561 2605
  2606 +__attribute__ (( unused ))
2562 static void init_proc_401x3 (CPUPPCState *env) 2607 static void init_proc_401x3 (CPUPPCState *env)
2563 { 2608 {
2564 gen_spr_40x(env); 2609 gen_spr_40x(env);
@@ -2570,7 +2615,6 @@ static void init_proc_401x3 (CPUPPCState *env) @@ -2570,7 +2615,6 @@ static void init_proc_401x3 (CPUPPCState *env)
2570 /* Allocate hardware IRQ controller */ 2615 /* Allocate hardware IRQ controller */
2571 ppc40x_irq_init(env); 2616 ppc40x_irq_init(env);
2572 } 2617 }
2573 -#endif /* TODO */  
2574 2618
2575 /* IOP480 */ 2619 /* IOP480 */
2576 #define POWERPC_INSNS_IOP480 (POWERPC_INSNS_EMB | \ 2620 #define POWERPC_INSNS_IOP480 (POWERPC_INSNS_EMB | \
@@ -2714,6 +2758,7 @@ static void init_proc_440EP (CPUPPCState *env) @@ -2714,6 +2758,7 @@ static void init_proc_440EP (CPUPPCState *env)
2714 gen_tbl(env); 2758 gen_tbl(env);
2715 gen_spr_BookE(env); 2759 gen_spr_BookE(env);
2716 gen_spr_440(env); 2760 gen_spr_440(env);
  2761 + /* XXX : not implemented */
2717 spr_register(env, SPR_BOOKE_MCSR, "MCSR", 2762 spr_register(env, SPR_BOOKE_MCSR, "MCSR",
2718 SPR_NOACCESS, SPR_NOACCESS, 2763 SPR_NOACCESS, SPR_NOACCESS,
2719 &spr_read_generic, &spr_write_generic, 2764 &spr_read_generic, &spr_write_generic,
@@ -2726,6 +2771,7 @@ static void init_proc_440EP (CPUPPCState *env) @@ -2726,6 +2771,7 @@ static void init_proc_440EP (CPUPPCState *env)
2726 SPR_NOACCESS, SPR_NOACCESS, 2771 SPR_NOACCESS, SPR_NOACCESS,
2727 &spr_read_generic, &spr_write_generic, 2772 &spr_read_generic, &spr_write_generic,
2728 0x00000000); 2773 0x00000000);
  2774 + /* XXX : not implemented */
2729 spr_register(env, SPR_440_CCR1, "CCR1", 2775 spr_register(env, SPR_440_CCR1, "CCR1",
2730 SPR_NOACCESS, SPR_NOACCESS, 2776 SPR_NOACCESS, SPR_NOACCESS,
2731 &spr_read_generic, &spr_write_generic, 2777 &spr_read_generic, &spr_write_generic,
@@ -2764,7 +2810,6 @@ static void init_proc_440GP (CPUPPCState *env) @@ -2764,7 +2810,6 @@ static void init_proc_440GP (CPUPPCState *env)
2764 } 2810 }
2765 2811
2766 /* PowerPC 440x4 */ 2812 /* PowerPC 440x4 */
2767 -#if defined(TODO)  
2768 #define POWERPC_INSNS_440x4 (POWERPC_INSNS_EMB | \ 2813 #define POWERPC_INSNS_440x4 (POWERPC_INSNS_EMB | \
2769 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \ 2814 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \
2770 PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ 2815 PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
@@ -2775,6 +2820,7 @@ static void init_proc_440GP (CPUPPCState *env) @@ -2775,6 +2820,7 @@ static void init_proc_440GP (CPUPPCState *env)
2775 #define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE) 2820 #define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE)
2776 #define POWERPC_BFDM_440x4 (bfd_mach_ppc_403) 2821 #define POWERPC_BFDM_440x4 (bfd_mach_ppc_403)
2777 2822
  2823 +__attribute__ (( unused ))
2778 static void init_proc_440x4 (CPUPPCState *env) 2824 static void init_proc_440x4 (CPUPPCState *env)
2779 { 2825 {
2780 /* Time base */ 2826 /* Time base */
@@ -2788,7 +2834,6 @@ static void init_proc_440x4 (CPUPPCState *env) @@ -2788,7 +2834,6 @@ static void init_proc_440x4 (CPUPPCState *env)
2788 init_excp_BookE(env); 2834 init_excp_BookE(env);
2789 /* XXX: TODO: allocate internal IRQ controller */ 2835 /* XXX: TODO: allocate internal IRQ controller */
2790 } 2836 }
2791 -#endif /* TODO */  
2792 2837
2793 /* PowerPC 440x5 */ 2838 /* PowerPC 440x5 */
2794 #define POWERPC_INSNS_440x5 (POWERPC_INSNS_EMB | \ 2839 #define POWERPC_INSNS_440x5 (POWERPC_INSNS_EMB | \
@@ -2807,6 +2852,7 @@ static void init_proc_440x5 (CPUPPCState *env) @@ -2807,6 +2852,7 @@ static void init_proc_440x5 (CPUPPCState *env)
2807 gen_tbl(env); 2852 gen_tbl(env);
2808 gen_spr_BookE(env); 2853 gen_spr_BookE(env);
2809 gen_spr_440(env); 2854 gen_spr_440(env);
  2855 + /* XXX : not implemented */
2810 spr_register(env, SPR_BOOKE_MCSR, "MCSR", 2856 spr_register(env, SPR_BOOKE_MCSR, "MCSR",
2811 SPR_NOACCESS, SPR_NOACCESS, 2857 SPR_NOACCESS, SPR_NOACCESS,
2812 &spr_read_generic, &spr_write_generic, 2858 &spr_read_generic, &spr_write_generic,
@@ -2819,6 +2865,7 @@ static void init_proc_440x5 (CPUPPCState *env) @@ -2819,6 +2865,7 @@ static void init_proc_440x5 (CPUPPCState *env)
2819 SPR_NOACCESS, SPR_NOACCESS, 2865 SPR_NOACCESS, SPR_NOACCESS,
2820 &spr_read_generic, &spr_write_generic, 2866 &spr_read_generic, &spr_write_generic,
2821 0x00000000); 2867 0x00000000);
  2868 + /* XXX : not implemented */
2822 spr_register(env, SPR_440_CCR1, "CCR1", 2869 spr_register(env, SPR_440_CCR1, "CCR1",
2823 SPR_NOACCESS, SPR_NOACCESS, 2870 SPR_NOACCESS, SPR_NOACCESS,
2824 &spr_read_generic, &spr_write_generic, 2871 &spr_read_generic, &spr_write_generic,
@@ -2832,8 +2879,7 @@ static void init_proc_440x5 (CPUPPCState *env) @@ -2832,8 +2879,7 @@ static void init_proc_440x5 (CPUPPCState *env)
2832 } 2879 }
2833 2880
2834 /* PowerPC 460 (guessed) */ 2881 /* PowerPC 460 (guessed) */
2835 -#if defined(TODO)  
2836 -#define POWERPC_INSNS_460F (POWERPC_INSNS_EMB | \ 2882 +#define POWERPC_INSNS_460 (POWERPC_INSNS_EMB | \
2837 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \ 2883 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \
2838 PPC_BOOKE | PPC_BOOKE_EXT | PPC_4xx_COMMON | \ 2884 PPC_BOOKE | PPC_BOOKE_EXT | PPC_4xx_COMMON | \
2839 PPC_405_MAC | PPC_440_SPEC | PPC_DCRUX) 2885 PPC_405_MAC | PPC_440_SPEC | PPC_DCRUX)
@@ -2843,12 +2889,14 @@ static void init_proc_440x5 (CPUPPCState *env) @@ -2843,12 +2889,14 @@ static void init_proc_440x5 (CPUPPCState *env)
2843 #define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE) 2889 #define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE)
2844 #define POWERPC_BFDM_460 (bfd_mach_ppc_403) 2890 #define POWERPC_BFDM_460 (bfd_mach_ppc_403)
2845 2891
  2892 +__attribute__ (( unused ))
2846 static void init_proc_460 (CPUPPCState *env) 2893 static void init_proc_460 (CPUPPCState *env)
2847 { 2894 {
2848 /* Time base */ 2895 /* Time base */
2849 gen_tbl(env); 2896 gen_tbl(env);
2850 gen_spr_BookE(env); 2897 gen_spr_BookE(env);
2851 gen_spr_440(env); 2898 gen_spr_440(env);
  2899 + /* XXX : not implemented */
2852 spr_register(env, SPR_BOOKE_MCSR, "MCSR", 2900 spr_register(env, SPR_BOOKE_MCSR, "MCSR",
2853 SPR_NOACCESS, SPR_NOACCESS, 2901 SPR_NOACCESS, SPR_NOACCESS,
2854 &spr_read_generic, &spr_write_generic, 2902 &spr_read_generic, &spr_write_generic,
@@ -2861,10 +2909,12 @@ static void init_proc_460 (CPUPPCState *env) @@ -2861,10 +2909,12 @@ static void init_proc_460 (CPUPPCState *env)
2861 SPR_NOACCESS, SPR_NOACCESS, 2909 SPR_NOACCESS, SPR_NOACCESS,
2862 &spr_read_generic, &spr_write_generic, 2910 &spr_read_generic, &spr_write_generic,
2863 0x00000000); 2911 0x00000000);
  2912 + /* XXX : not implemented */
2864 spr_register(env, SPR_440_CCR1, "CCR1", 2913 spr_register(env, SPR_440_CCR1, "CCR1",
2865 SPR_NOACCESS, SPR_NOACCESS, 2914 SPR_NOACCESS, SPR_NOACCESS,
2866 &spr_read_generic, &spr_write_generic, 2915 &spr_read_generic, &spr_write_generic,
2867 0x00000000); 2916 0x00000000);
  2917 + /* XXX : not implemented */
2868 spr_register(env, SPR_DCRIPR, "SPR_DCRIPR", 2918 spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
2869 &spr_read_generic, &spr_write_generic, 2919 &spr_read_generic, &spr_write_generic,
2870 &spr_read_generic, &spr_write_generic, 2920 &spr_read_generic, &spr_write_generic,
@@ -2876,10 +2926,8 @@ static void init_proc_460 (CPUPPCState *env) @@ -2876,10 +2926,8 @@ static void init_proc_460 (CPUPPCState *env)
2876 init_excp_BookE(env); 2926 init_excp_BookE(env);
2877 /* XXX: TODO: allocate internal IRQ controller */ 2927 /* XXX: TODO: allocate internal IRQ controller */
2878 } 2928 }
2879 -#endif /* TODO */  
2880 2929
2881 /* PowerPC 460F (guessed) */ 2930 /* PowerPC 460F (guessed) */
2882 -#if defined(TODO)  
2883 #define POWERPC_INSNS_460F (POWERPC_INSNS_EMB | \ 2931 #define POWERPC_INSNS_460F (POWERPC_INSNS_EMB | \
2884 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \ 2932 PPC_CACHE_DCBA | PPC_MEM_TLBSYNC | \
2885 PPC_FLOAT | PPC_FLOAT_FSQRT | PPC_FLOAT_FRES | \ 2933 PPC_FLOAT | PPC_FLOAT_FSQRT | PPC_FLOAT_FRES | \
@@ -2893,12 +2941,14 @@ static void init_proc_460 (CPUPPCState *env) @@ -2893,12 +2941,14 @@ static void init_proc_460 (CPUPPCState *env)
2893 #define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE) 2941 #define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE)
2894 #define POWERPC_BFDM_460F (bfd_mach_ppc_403) 2942 #define POWERPC_BFDM_460F (bfd_mach_ppc_403)
2895 2943
  2944 +__attribute__ (( unused ))
2896 static void init_proc_460F (CPUPPCState *env) 2945 static void init_proc_460F (CPUPPCState *env)
2897 { 2946 {
2898 /* Time base */ 2947 /* Time base */
2899 gen_tbl(env); 2948 gen_tbl(env);
2900 gen_spr_BookE(env); 2949 gen_spr_BookE(env);
2901 gen_spr_440(env); 2950 gen_spr_440(env);
  2951 + /* XXX : not implemented */
2902 spr_register(env, SPR_BOOKE_MCSR, "MCSR", 2952 spr_register(env, SPR_BOOKE_MCSR, "MCSR",
2903 SPR_NOACCESS, SPR_NOACCESS, 2953 SPR_NOACCESS, SPR_NOACCESS,
2904 &spr_read_generic, &spr_write_generic, 2954 &spr_read_generic, &spr_write_generic,
@@ -2911,10 +2961,12 @@ static void init_proc_460F (CPUPPCState *env) @@ -2911,10 +2961,12 @@ static void init_proc_460F (CPUPPCState *env)
2911 SPR_NOACCESS, SPR_NOACCESS, 2961 SPR_NOACCESS, SPR_NOACCESS,
2912 &spr_read_generic, &spr_write_generic, 2962 &spr_read_generic, &spr_write_generic,
2913 0x00000000); 2963 0x00000000);
  2964 + /* XXX : not implemented */
2914 spr_register(env, SPR_440_CCR1, "CCR1", 2965 spr_register(env, SPR_440_CCR1, "CCR1",
2915 SPR_NOACCESS, SPR_NOACCESS, 2966 SPR_NOACCESS, SPR_NOACCESS,
2916 &spr_read_generic, &spr_write_generic, 2967 &spr_read_generic, &spr_write_generic,
2917 0x00000000); 2968 0x00000000);
  2969 + /* XXX : not implemented */
2918 spr_register(env, SPR_DCRIPR, "SPR_DCRIPR", 2970 spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
2919 &spr_read_generic, &spr_write_generic, 2971 &spr_read_generic, &spr_write_generic,
2920 &spr_read_generic, &spr_write_generic, 2972 &spr_read_generic, &spr_write_generic,
@@ -2926,10 +2978,8 @@ static void init_proc_460F (CPUPPCState *env) @@ -2926,10 +2978,8 @@ static void init_proc_460F (CPUPPCState *env)
2926 init_excp_BookE(env); 2978 init_excp_BookE(env);
2927 /* XXX: TODO: allocate internal IRQ controller */ 2979 /* XXX: TODO: allocate internal IRQ controller */
2928 } 2980 }
2929 -#endif /* TODO */  
2930 2981
2931 /* Generic BookE PowerPC */ 2982 /* Generic BookE PowerPC */
2932 -#if defined(TODO)  
2933 #define POWERPC_INSNS_BookE (POWERPC_INSNS_EMB | \ 2983 #define POWERPC_INSNS_BookE (POWERPC_INSNS_EMB | \
2934 PPC_MEM_EIEIO | PPC_MEM_TLBSYNC | \ 2984 PPC_MEM_EIEIO | PPC_MEM_TLBSYNC | \
2935 PPC_CACHE_DCBA | \ 2985 PPC_CACHE_DCBA | \
@@ -2943,22 +2993,17 @@ static void init_proc_460F (CPUPPCState *env) @@ -2943,22 +2993,17 @@ static void init_proc_460F (CPUPPCState *env)
2943 #define POWERPC_INPUT_BookE (PPC_FLAGS_INPUT_BookE) 2993 #define POWERPC_INPUT_BookE (PPC_FLAGS_INPUT_BookE)
2944 #define POWERPC_BFDM_BookE (bfd_mach_ppc_403) 2994 #define POWERPC_BFDM_BookE (bfd_mach_ppc_403)
2945 2995
  2996 +__attribute__ (( unused ))
2946 static void init_proc_BookE (CPUPPCState *env) 2997 static void init_proc_BookE (CPUPPCState *env)
2947 { 2998 {
2948 init_excp_BookE(env); 2999 init_excp_BookE(env);
2949 } 3000 }
2950 -#endif /* TODO */  
2951 3001
2952 /* e200 core */ 3002 /* e200 core */
2953 -#if defined(TODO)  
2954 -#endif /* TODO */  
2955 3003
2956 /* e300 core */ 3004 /* e300 core */
2957 -#if defined(TODO)  
2958 -#endif /* TODO */  
2959 3005
2960 /* e500 core */ 3006 /* e500 core */
2961 -#if defined(TODO)  
2962 #define POWERPC_INSNS_e500 (POWERPC_INSNS_EMB | \ 3007 #define POWERPC_INSNS_e500 (POWERPC_INSNS_EMB | \
2963 PPC_MEM_EIEIO | PPC_MEM_TLBSYNC | \ 3008 PPC_MEM_EIEIO | PPC_MEM_TLBSYNC | \
2964 PPC_CACHE_DCBA | \ 3009 PPC_CACHE_DCBA | \
@@ -2968,6 +3013,7 @@ static void init_proc_BookE (CPUPPCState *env) @@ -2968,6 +3013,7 @@ static void init_proc_BookE (CPUPPCState *env)
2968 #define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE) 3013 #define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE)
2969 #define POWERPC_BFDM_e500 (bfd_mach_ppc_403) 3014 #define POWERPC_BFDM_e500 (bfd_mach_ppc_403)
2970 3015
  3016 +__attribute__ (( unused ))
2971 static void init_proc_e500 (CPUPPCState *env) 3017 static void init_proc_e500 (CPUPPCState *env)
2972 { 3018 {
2973 /* Time base */ 3019 /* Time base */
@@ -2981,11 +3027,8 @@ static void init_proc_e500 (CPUPPCState *env) @@ -2981,11 +3027,8 @@ static void init_proc_e500 (CPUPPCState *env)
2981 init_excp_BookE(env); 3027 init_excp_BookE(env);
2982 /* XXX: TODO: allocate internal IRQ controller */ 3028 /* XXX: TODO: allocate internal IRQ controller */
2983 } 3029 }
2984 -#endif /* TODO */  
2985 3030
2986 /* e600 core */ 3031 /* e600 core */
2987 -#if defined(TODO)  
2988 -#endif /* TODO */  
2989 3032
2990 /* Non-embedded PowerPC */ 3033 /* Non-embedded PowerPC */
2991 /* Base instructions set for all 6xx/7xx/74xx/970 PowerPC */ 3034 /* Base instructions set for all 6xx/7xx/74xx/970 PowerPC */
@@ -3461,7 +3504,6 @@ static void init_proc_7410 (CPUPPCState *env) @@ -3461,7 +3504,6 @@ static void init_proc_7410 (CPUPPCState *env)
3461 } 3504 }
3462 3505
3463 /* PowerPC 7440 (aka G4) */ 3506 /* PowerPC 7440 (aka G4) */
3464 -#if defined (TODO)  
3465 #define POWERPC_INSNS_7440 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \ 3507 #define POWERPC_INSNS_7440 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \
3466 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \ 3508 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \
3467 PPC_ALTIVEC) 3509 PPC_ALTIVEC)
@@ -3471,6 +3513,7 @@ static void init_proc_7410 (CPUPPCState *env) @@ -3471,6 +3513,7 @@ static void init_proc_7410 (CPUPPCState *env)
3471 #define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx) 3513 #define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx)
3472 #define POWERPC_BFDM_7440 (bfd_mach_ppc_7400) 3514 #define POWERPC_BFDM_7440 (bfd_mach_ppc_7400)
3473 3515
  3516 +__attribute__ (( unused ))
3474 static void init_proc_7440 (CPUPPCState *env) 3517 static void init_proc_7440 (CPUPPCState *env)
3475 { 3518 {
3476 gen_spr_ne_601(env); 3519 gen_spr_ne_601(env);
@@ -3492,6 +3535,7 @@ static void init_proc_7440 (CPUPPCState *env) @@ -3492,6 +3535,7 @@ static void init_proc_7440 (CPUPPCState *env)
3492 &spr_read_generic, &spr_write_generic, 3535 &spr_read_generic, &spr_write_generic,
3493 0x00000000); 3536 0x00000000);
3494 /* MSSSR0 */ 3537 /* MSSSR0 */
  3538 + /* XXX : not implemented */
3495 spr_register(env, SPR_MSSSR0, "MSSSR0", 3539 spr_register(env, SPR_MSSSR0, "MSSSR0",
3496 SPR_NOACCESS, SPR_NOACCESS, 3540 SPR_NOACCESS, SPR_NOACCESS,
3497 &spr_read_generic, &spr_write_generic, 3541 &spr_read_generic, &spr_write_generic,
@@ -3502,28 +3546,29 @@ static void init_proc_7440 (CPUPPCState *env) @@ -3502,28 +3546,29 @@ static void init_proc_7440 (CPUPPCState *env)
3502 SPR_NOACCESS, SPR_NOACCESS, 3546 SPR_NOACCESS, SPR_NOACCESS,
3503 &spr_read_generic, &spr_write_generic, 3547 &spr_read_generic, &spr_write_generic,
3504 0x00000000); 3548 0x00000000);
  3549 + /* XXX : not implemented */
3505 spr_register(env, SPR_UPMC5, "UPMC5", 3550 spr_register(env, SPR_UPMC5, "UPMC5",
3506 &spr_read_ureg, SPR_NOACCESS, 3551 &spr_read_ureg, SPR_NOACCESS,
3507 &spr_read_ureg, SPR_NOACCESS, 3552 &spr_read_ureg, SPR_NOACCESS,
3508 0x00000000); 3553 0x00000000);
  3554 + /* XXX : not implemented */
3509 spr_register(env, SPR_PMC6, "PMC6", 3555 spr_register(env, SPR_PMC6, "PMC6",
3510 SPR_NOACCESS, SPR_NOACCESS, 3556 SPR_NOACCESS, SPR_NOACCESS,
3511 &spr_read_generic, &spr_write_generic, 3557 &spr_read_generic, &spr_write_generic,
3512 0x00000000); 3558 0x00000000);
  3559 + /* XXX : not implemented */
3513 spr_register(env, SPR_UPMC6, "UPMC6", 3560 spr_register(env, SPR_UPMC6, "UPMC6",
3514 &spr_read_ureg, SPR_NOACCESS, 3561 &spr_read_ureg, SPR_NOACCESS,
3515 &spr_read_ureg, SPR_NOACCESS, 3562 &spr_read_ureg, SPR_NOACCESS,
3516 0x00000000); 3563 0x00000000);
3517 /* Memory management */ 3564 /* Memory management */
3518 gen_low_BATs(env); 3565 gen_low_BATs(env);
3519 - gen_74xx_soft_tlb(env); 3566 + gen_74xx_soft_tlb(env, 128, 2);
3520 /* Allocate hardware IRQ controller */ 3567 /* Allocate hardware IRQ controller */
3521 ppc6xx_irq_init(env); 3568 ppc6xx_irq_init(env);
3522 } 3569 }
3523 -#endif /* TODO */  
3524 3570
3525 /* PowerPC 7450 (aka G4) */ 3571 /* PowerPC 7450 (aka G4) */
3526 -#if defined (TODO)  
3527 #define POWERPC_INSNS_7450 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \ 3572 #define POWERPC_INSNS_7450 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \
3528 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \ 3573 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \
3529 PPC_ALTIVEC) 3574 PPC_ALTIVEC)
@@ -3533,6 +3578,7 @@ static void init_proc_7440 (CPUPPCState *env) @@ -3533,6 +3578,7 @@ static void init_proc_7440 (CPUPPCState *env)
3533 #define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx) 3578 #define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx)
3534 #define POWERPC_BFDM_7450 (bfd_mach_ppc_7400) 3579 #define POWERPC_BFDM_7450 (bfd_mach_ppc_7400)
3535 3580
  3581 +__attribute__ (( unused ))
3536 static void init_proc_7450 (CPUPPCState *env) 3582 static void init_proc_7450 (CPUPPCState *env)
3537 { 3583 {
3538 gen_spr_ne_601(env); 3584 gen_spr_ne_601(env);
@@ -3556,6 +3602,7 @@ static void init_proc_7450 (CPUPPCState *env) @@ -3556,6 +3602,7 @@ static void init_proc_7450 (CPUPPCState *env)
3556 &spr_read_generic, &spr_write_generic, 3602 &spr_read_generic, &spr_write_generic,
3557 0x00000000); 3603 0x00000000);
3558 /* MSSSR0 */ 3604 /* MSSSR0 */
  3605 + /* XXX : not implemented */
3559 spr_register(env, SPR_MSSSR0, "MSSSR0", 3606 spr_register(env, SPR_MSSSR0, "MSSSR0",
3560 SPR_NOACCESS, SPR_NOACCESS, 3607 SPR_NOACCESS, SPR_NOACCESS,
3561 &spr_read_generic, &spr_write_generic, 3608 &spr_read_generic, &spr_write_generic,
@@ -3566,29 +3613,30 @@ static void init_proc_7450 (CPUPPCState *env) @@ -3566,29 +3613,30 @@ static void init_proc_7450 (CPUPPCState *env)
3566 SPR_NOACCESS, SPR_NOACCESS, 3613 SPR_NOACCESS, SPR_NOACCESS,
3567 &spr_read_generic, &spr_write_generic, 3614 &spr_read_generic, &spr_write_generic,
3568 0x00000000); 3615 0x00000000);
  3616 + /* XXX : not implemented */
3569 spr_register(env, SPR_UPMC5, "UPMC5", 3617 spr_register(env, SPR_UPMC5, "UPMC5",
3570 &spr_read_ureg, SPR_NOACCESS, 3618 &spr_read_ureg, SPR_NOACCESS,
3571 &spr_read_ureg, SPR_NOACCESS, 3619 &spr_read_ureg, SPR_NOACCESS,
3572 0x00000000); 3620 0x00000000);
  3621 + /* XXX : not implemented */
3573 spr_register(env, SPR_PMC6, "PMC6", 3622 spr_register(env, SPR_PMC6, "PMC6",
3574 SPR_NOACCESS, SPR_NOACCESS, 3623 SPR_NOACCESS, SPR_NOACCESS,
3575 &spr_read_generic, &spr_write_generic, 3624 &spr_read_generic, &spr_write_generic,
3576 0x00000000); 3625 0x00000000);
  3626 + /* XXX : not implemented */
3577 spr_register(env, SPR_UPMC6, "UPMC6", 3627 spr_register(env, SPR_UPMC6, "UPMC6",
3578 &spr_read_ureg, SPR_NOACCESS, 3628 &spr_read_ureg, SPR_NOACCESS,
3579 &spr_read_ureg, SPR_NOACCESS, 3629 &spr_read_ureg, SPR_NOACCESS,
3580 0x00000000); 3630 0x00000000);
3581 /* Memory management */ 3631 /* Memory management */
3582 gen_low_BATs(env); 3632 gen_low_BATs(env);
3583 - gen_74xx_soft_tlb(env); 3633 + gen_74xx_soft_tlb(env, 128, 2);
3584 init_excp_7450(env); 3634 init_excp_7450(env);
3585 /* Allocate hardware IRQ controller */ 3635 /* Allocate hardware IRQ controller */
3586 ppc6xx_irq_init(env); 3636 ppc6xx_irq_init(env);
3587 } 3637 }
3588 -#endif /* TODO */  
3589 3638
3590 /* PowerPC 7445 (aka G4) */ 3639 /* PowerPC 7445 (aka G4) */
3591 -#if defined (TODO)  
3592 #define POWERPC_INSNS_7445 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \ 3640 #define POWERPC_INSNS_7445 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \
3593 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \ 3641 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \
3594 PPC_ALTIVEC) 3642 PPC_ALTIVEC)
@@ -3598,6 +3646,7 @@ static void init_proc_7450 (CPUPPCState *env) @@ -3598,6 +3646,7 @@ static void init_proc_7450 (CPUPPCState *env)
3598 #define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx) 3646 #define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx)
3599 #define POWERPC_BFDM_7445 (bfd_mach_ppc_7400) 3647 #define POWERPC_BFDM_7445 (bfd_mach_ppc_7400)
3600 3648
  3649 +__attribute__ (( unused ))
3601 static void init_proc_7445 (CPUPPCState *env) 3650 static void init_proc_7445 (CPUPPCState *env)
3602 { 3651 {
3603 gen_spr_ne_601(env); 3652 gen_spr_ne_601(env);
@@ -3619,6 +3668,7 @@ static void init_proc_7445 (CPUPPCState *env) @@ -3619,6 +3668,7 @@ static void init_proc_7445 (CPUPPCState *env)
3619 &spr_read_generic, &spr_write_generic, 3668 &spr_read_generic, &spr_write_generic,
3620 0x00000000); 3669 0x00000000);
3621 /* MSSSR0 */ 3670 /* MSSSR0 */
  3671 + /* XXX : not implemented */
3622 spr_register(env, SPR_MSSSR0, "MSSSR0", 3672 spr_register(env, SPR_MSSSR0, "MSSSR0",
3623 SPR_NOACCESS, SPR_NOACCESS, 3673 SPR_NOACCESS, SPR_NOACCESS,
3624 &spr_read_generic, &spr_write_generic, 3674 &spr_read_generic, &spr_write_generic,
@@ -3629,14 +3679,17 @@ static void init_proc_7445 (CPUPPCState *env) @@ -3629,14 +3679,17 @@ static void init_proc_7445 (CPUPPCState *env)
3629 SPR_NOACCESS, SPR_NOACCESS, 3679 SPR_NOACCESS, SPR_NOACCESS,
3630 &spr_read_generic, &spr_write_generic, 3680 &spr_read_generic, &spr_write_generic,
3631 0x00000000); 3681 0x00000000);
  3682 + /* XXX : not implemented */
3632 spr_register(env, SPR_UPMC5, "UPMC5", 3683 spr_register(env, SPR_UPMC5, "UPMC5",
3633 &spr_read_ureg, SPR_NOACCESS, 3684 &spr_read_ureg, SPR_NOACCESS,
3634 &spr_read_ureg, SPR_NOACCESS, 3685 &spr_read_ureg, SPR_NOACCESS,
3635 0x00000000); 3686 0x00000000);
  3687 + /* XXX : not implemented */
3636 spr_register(env, SPR_PMC6, "PMC6", 3688 spr_register(env, SPR_PMC6, "PMC6",
3637 SPR_NOACCESS, SPR_NOACCESS, 3689 SPR_NOACCESS, SPR_NOACCESS,
3638 &spr_read_generic, &spr_write_generic, 3690 &spr_read_generic, &spr_write_generic,
3639 0x00000000); 3691 0x00000000);
  3692 + /* XXX : not implemented */
3640 spr_register(env, SPR_UPMC6, "UPMC6", 3693 spr_register(env, SPR_UPMC6, "UPMC6",
3641 &spr_read_ureg, SPR_NOACCESS, 3694 &spr_read_ureg, SPR_NOACCESS,
3642 &spr_read_ureg, SPR_NOACCESS, 3695 &spr_read_ureg, SPR_NOACCESS,
@@ -3677,15 +3730,13 @@ static void init_proc_7445 (CPUPPCState *env) @@ -3677,15 +3730,13 @@ static void init_proc_7445 (CPUPPCState *env)
3677 /* Memory management */ 3730 /* Memory management */
3678 gen_low_BATs(env); 3731 gen_low_BATs(env);
3679 gen_high_BATs(env); 3732 gen_high_BATs(env);
3680 - gen_74xx_soft_tlb(env); 3733 + gen_74xx_soft_tlb(env, 128, 2);
3681 init_excp_7450(env); 3734 init_excp_7450(env);
3682 /* Allocate hardware IRQ controller */ 3735 /* Allocate hardware IRQ controller */
3683 ppc6xx_irq_init(env); 3736 ppc6xx_irq_init(env);
3684 } 3737 }
3685 -#endif /* TODO */  
3686 3738
3687 /* PowerPC 7455 (aka G4) */ 3739 /* PowerPC 7455 (aka G4) */
3688 -#if defined (TODO)  
3689 #define POWERPC_INSNS_7455 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \ 3740 #define POWERPC_INSNS_7455 (POWERPC_INSNS_WORKS | PPC_CACHE_DCBA | \
3690 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \ 3741 PPC_EXTERN | PPC_74xx_TLB | PPC_MEM_TLBIA | \
3691 PPC_ALTIVEC) 3742 PPC_ALTIVEC)
@@ -3695,6 +3746,7 @@ static void init_proc_7445 (CPUPPCState *env) @@ -3695,6 +3746,7 @@ static void init_proc_7445 (CPUPPCState *env)
3695 #define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx) 3746 #define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx)
3696 #define POWERPC_BFDM_7455 (bfd_mach_ppc_7400) 3747 #define POWERPC_BFDM_7455 (bfd_mach_ppc_7400)
3697 3748
  3749 +__attribute__ (( unused ))
3698 static void init_proc_7455 (CPUPPCState *env) 3750 static void init_proc_7455 (CPUPPCState *env)
3699 { 3751 {
3700 gen_spr_ne_601(env); 3752 gen_spr_ne_601(env);
@@ -3718,6 +3770,7 @@ static void init_proc_7455 (CPUPPCState *env) @@ -3718,6 +3770,7 @@ static void init_proc_7455 (CPUPPCState *env)
3718 &spr_read_generic, &spr_write_generic, 3770 &spr_read_generic, &spr_write_generic,
3719 0x00000000); 3771 0x00000000);
3720 /* MSSSR0 */ 3772 /* MSSSR0 */
  3773 + /* XXX : not implemented */
3721 spr_register(env, SPR_MSSSR0, "MSSSR0", 3774 spr_register(env, SPR_MSSSR0, "MSSSR0",
3722 SPR_NOACCESS, SPR_NOACCESS, 3775 SPR_NOACCESS, SPR_NOACCESS,
3723 &spr_read_generic, &spr_write_generic, 3776 &spr_read_generic, &spr_write_generic,
@@ -3728,14 +3781,17 @@ static void init_proc_7455 (CPUPPCState *env) @@ -3728,14 +3781,17 @@ static void init_proc_7455 (CPUPPCState *env)
3728 SPR_NOACCESS, SPR_NOACCESS, 3781 SPR_NOACCESS, SPR_NOACCESS,
3729 &spr_read_generic, &spr_write_generic, 3782 &spr_read_generic, &spr_write_generic,
3730 0x00000000); 3783 0x00000000);
  3784 + /* XXX : not implemented */
3731 spr_register(env, SPR_UPMC5, "UPMC5", 3785 spr_register(env, SPR_UPMC5, "UPMC5",
3732 &spr_read_ureg, SPR_NOACCESS, 3786 &spr_read_ureg, SPR_NOACCESS,
3733 &spr_read_ureg, SPR_NOACCESS, 3787 &spr_read_ureg, SPR_NOACCESS,
3734 0x00000000); 3788 0x00000000);
  3789 + /* XXX : not implemented */
3735 spr_register(env, SPR_PMC6, "PMC6", 3790 spr_register(env, SPR_PMC6, "PMC6",
3736 SPR_NOACCESS, SPR_NOACCESS, 3791 SPR_NOACCESS, SPR_NOACCESS,
3737 &spr_read_generic, &spr_write_generic, 3792 &spr_read_generic, &spr_write_generic,
3738 0x00000000); 3793 0x00000000);
  3794 + /* XXX : not implemented */
3739 spr_register(env, SPR_UPMC6, "UPMC6", 3795 spr_register(env, SPR_UPMC6, "UPMC6",
3740 &spr_read_ureg, SPR_NOACCESS, 3796 &spr_read_ureg, SPR_NOACCESS,
3741 &spr_read_ureg, SPR_NOACCESS, 3797 &spr_read_ureg, SPR_NOACCESS,
@@ -3776,12 +3832,11 @@ static void init_proc_7455 (CPUPPCState *env) @@ -3776,12 +3832,11 @@ static void init_proc_7455 (CPUPPCState *env)
3776 /* Memory management */ 3832 /* Memory management */
3777 gen_low_BATs(env); 3833 gen_low_BATs(env);
3778 gen_high_BATs(env); 3834 gen_high_BATs(env);
3779 - gen_74xx_soft_tlb(env); 3835 + gen_74xx_soft_tlb(env, 128, 2);
3780 init_excp_7450(env); 3836 init_excp_7450(env);
3781 /* Allocate hardware IRQ controller */ 3837 /* Allocate hardware IRQ controller */
3782 ppc6xx_irq_init(env); 3838 ppc6xx_irq_init(env);
3783 } 3839 }
3784 -#endif /* TODO */  
3785 3840
3786 #if defined (TARGET_PPC64) 3841 #if defined (TARGET_PPC64)
3787 /* PowerPC 970 */ 3842 /* PowerPC 970 */
@@ -3914,7 +3969,6 @@ static void init_proc_970GX (CPUPPCState *env) @@ -3914,7 +3969,6 @@ static void init_proc_970GX (CPUPPCState *env)
3914 } 3969 }
3915 3970
3916 /* PowerPC 620 */ 3971 /* PowerPC 620 */
3917 -#if defined (TODO)  
3918 #define POWERPC_INSNS_620 (POWERPC_INSNS_WORKS | PPC_FLOAT_FSQRT | \ 3972 #define POWERPC_INSNS_620 (POWERPC_INSNS_WORKS | PPC_FLOAT_FSQRT | \
3919 PPC_64B | PPC_SLBI) 3973 PPC_64B | PPC_SLBI)
3920 #define POWERPC_MSRM_620 (0x800000000005FF73ULL) 3974 #define POWERPC_MSRM_620 (0x800000000005FF73ULL)
@@ -3923,6 +3977,7 @@ static void init_proc_970GX (CPUPPCState *env) @@ -3923,6 +3977,7 @@ static void init_proc_970GX (CPUPPCState *env)
3923 #define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970) 3977 #define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970)
3924 #define POWERPC_BFDM_620 (bfd_mach_ppc64) 3978 #define POWERPC_BFDM_620 (bfd_mach_ppc64)
3925 3979
  3980 +__attribute__ (( unused ))
3926 static void init_proc_620 (CPUPPCState *env) 3981 static void init_proc_620 (CPUPPCState *env)
3927 { 3982 {
3928 gen_spr_ne_601(env); 3983 gen_spr_ne_601(env);
@@ -3941,7 +3996,6 @@ static void init_proc_620 (CPUPPCState *env) @@ -3941,7 +3996,6 @@ static void init_proc_620 (CPUPPCState *env)
3941 init_excp_620(env); 3996 init_excp_620(env);
3942 /* XXX: TODO: initialize internal interrupt controller */ 3997 /* XXX: TODO: initialize internal interrupt controller */
3943 } 3998 }
3944 -#endif /* TODO */  
3945 #endif /* defined (TARGET_PPC64) */ 3999 #endif /* defined (TARGET_PPC64) */
3946 4000
3947 /* Default 32 bits PowerPC target will be 604 */ 4001 /* Default 32 bits PowerPC target will be 604 */