gwj / at91sam9263 · Commits

Commit 4e7ed2d1d396feac872c727a0700fdb5a86641e2

Authored by aurel32
1 parent 96e2fc41

SH4: Switch serial emulation to qemu_irq 

This patches makes SH serial emulation use qemu_irq in its interface.

        * hw/sh.h (sh_serial_init): Take qemu_irq, not intc_source.
        * hw/sh7750.c (sh7750_init): Adjust.
        * hw/sh_intc.c (sh_intc_set_irq): Don't assert or deassert
        irq more than once.
        * hw/sh_serial.c (sh_serial_state): Use qemu_irq, not intc_source.
        (sh_serial_clear_fifo, sh_serial_ioport_write)
        (sh_serial_receive_byte): Adjust.
        (sh_serial_init): Take qemu_irq, not intc_source.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5769 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 4 changed files with 33 additions and 33 deletions
... ... @@ -36,11 +36,11 @@ void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq,
36 36 #define SH_SERIAL_FEAT_SCIF (1 << 0)
37 37 void sh_serial_init (target_phys_addr_t base, int feat,
38 38 uint32_t freq, CharDriverState *chr,
39   - struct intc_source *eri_source,
40   - struct intc_source *rxi_source,
41   - struct intc_source *txi_source,
42   - struct intc_source *tei_source,
43   - struct intc_source *bri_source);
  39 + qemu_irq eri_source,
  40 + qemu_irq rxi_source,
  41 + qemu_irq txi_source,
  42 + qemu_irq tei_source,
  43 + qemu_irq bri_source);
44 44  
45 45 /* tc58128.c */
46 46 int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
... ...
hw/sh7750.c
  View file @4e7ed2d
... ... @@ -662,18 +662,18 @@ SH7750State *sh7750_init(CPUSH4State * cpu)
662 662 cpu->intc_handle = &s->intc;
663 663  
664 664 sh_serial_init(0x1fe00000, 0, s->periph_freq, serial_hds[0],
665   - sh_intc_source(&s->intc, SCI1_ERI),
666   - sh_intc_source(&s->intc, SCI1_RXI),
667   - sh_intc_source(&s->intc, SCI1_TXI),
668   - sh_intc_source(&s->intc, SCI1_TEI),
  665 + s->intc.irqs[SCI1_ERI],
  666 + s->intc.irqs[SCI1_RXI],
  667 + s->intc.irqs[SCI1_TXI],
  668 + s->intc.irqs[SCI1_TEI],
669 669 NULL);
670 670 sh_serial_init(0x1fe80000, SH_SERIAL_FEAT_SCIF,
671 671 s->periph_freq, serial_hds[1],
672   - sh_intc_source(&s->intc, SCIF_ERI),
673   - sh_intc_source(&s->intc, SCIF_RXI),
674   - sh_intc_source(&s->intc, SCIF_TXI),
  672 + s->intc.irqs[SCIF_ERI],
  673 + s->intc.irqs[SCIF_RXI],
  674 + s->intc.irqs[SCIF_TXI],
675 675 NULL,
676   - sh_intc_source(&s->intc, SCIF_BRI));
  676 + s->intc.irqs[SCIF_BRI]);
677 677  
678 678 tmu012_init(0x1fd80000,
679 679 TMU012_FEAT_TOCR | TMU012_FEAT_3CHAN | TMU012_FEAT_EXTCLK,
... ...
hw/sh_intc.c
  View file @4e7ed2d
... ... @@ -78,7 +78,10 @@ void sh_intc_set_irq (void *opaque, int n, int level)
78 78 struct intc_desc *desc = opaque;
79 79 struct intc_source *source = &(desc->sources[n]);
80 80  
81   - sh_intc_toggle_source(source, 0, level ? 1 : -1);
  81 + if (level && !source->asserted)
  82 + sh_intc_toggle_source(source, 0, 1);
  83 + else if (!level && source->asserted)
  84 + sh_intc_toggle_source(source, 0, -1);
82 85 }
83 86  
84 87 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
... ...
hw/sh_serial.c
  View file @4e7ed2d
... ... @@ -61,11 +61,11 @@ typedef struct {
61 61  
62 62 CharDriverState *chr;
63 63  
64   - struct intc_source *eri;
65   - struct intc_source *rxi;
66   - struct intc_source *txi;
67   - struct intc_source *tei;
68   - struct intc_source *bri;
  64 + qemu_irq eri;
  65 + qemu_irq rxi;
  66 + qemu_irq txi;
  67 + qemu_irq tei;
  68 + qemu_irq bri;
69 69 } sh_serial_state;
70 70  
71 71 static void sh_serial_clear_fifo(sh_serial_state * s)
... ... @@ -98,13 +98,10 @@ static void sh_serial_ioport_write(void *opaque, uint32_t offs, uint32_t val)
98 98 if (!(val & (1 << 5)))
99 99 s->flags |= SH_SERIAL_FLAG_TEND;
100 100 if ((s->feat & SH_SERIAL_FEAT_SCIF) && s->txi) {
101   - if ((val & (1 << 7)) && !(s->txi->asserted))
102   - sh_intc_toggle_source(s->txi, 0, 1);
103   - else if (!(val & (1 << 7)) && s->txi->asserted)
104   - sh_intc_toggle_source(s->txi, 0, -1);
  101 + qemu_set_irq(s->txi, val & (1 << 7));
105 102 }
106   - if (!(val & (1 << 6)) && s->rxi->asserted) {
107   - sh_intc_toggle_source(s->rxi, 0, -1);
  103 + if (!(val & (1 << 6))) {
  104 + qemu_set_irq(s->rxi, 0);
108 105 }
109 106 return;
110 107 case 0x0c: /* FTDR / TDR */
... ... @@ -136,8 +133,8 @@ static void sh_serial_ioport_write(void *opaque, uint32_t offs, uint32_t val)
136 133 s->flags &= ~SH_SERIAL_FLAG_DR;
137 134  
138 135 if (!(val & (1 << 1)) || !(val & (1 << 0))) {
139   - if (s->rxi && s->rxi->asserted) {
140   - sh_intc_toggle_source(s->rxi, 0, -1);
  136 + if (s->rxi) {
  137 + qemu_set_irq(s->rxi, 0);
141 138 }
142 139 }
143 140 return;
... ... @@ -309,7 +306,7 @@ static void sh_serial_receive_byte(sh_serial_state *s, int ch)
309 306 if (s->rx_cnt >= s->rtrg) {
310 307 s->flags |= SH_SERIAL_FLAG_RDF;
311 308 if (s->scr & (1 << 6) && s->rxi) {
312   - sh_intc_toggle_source(s->rxi, 0, 1);
  309 + qemu_set_irq(s->rxi, 1);
313 310 }
314 311 }
315 312 }
... ... @@ -370,11 +367,11 @@ static CPUWriteMemoryFunc *sh_serial_writefn[] = {
370 367  
371 368 void sh_serial_init (target_phys_addr_t base, int feat,
372 369 uint32_t freq, CharDriverState *chr,
373   - struct intc_source *eri_source,
374   - struct intc_source *rxi_source,
375   - struct intc_source *txi_source,
376   - struct intc_source *tei_source,
377   - struct intc_source *bri_source)
  370 + qemu_irq eri_source,
  371 + qemu_irq rxi_source,
  372 + qemu_irq txi_source,
  373 + qemu_irq tei_source,
  374 + qemu_irq bri_source)
378 375 {
379 376 sh_serial_state *s;
380 377 int s_io_memory;
... ...