Commit 446544909738bbaf7af927ecd5dcef45debc7167
1 parent
dc828ca1
More phys_ram_base removal.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7060 c046a42c-6fe2-441c-8c8c-71466251a162
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9 changed files
with
37 additions
and
34 deletions
hw/armv7m.c
| ... | ... | @@ -193,8 +193,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, |
| 193 | 193 | regular ROM image and perform the normal CPU reset sequence. |
| 194 | 194 | Otherwise jump directly to the entry point. */ |
| 195 | 195 | if (lowaddr == 0) { |
| 196 | - env->regs[13] = tswap32(*(uint32_t *)phys_ram_base); | |
| 197 | - pc = tswap32(*(uint32_t *)(phys_ram_base + 4)); | |
| 196 | + env->regs[13] = ldl_phys(0); | |
| 197 | + pc = ldl_phys(4); | |
| 198 | 198 | } else { |
| 199 | 199 | pc = entry; |
| 200 | 200 | } | ... | ... |
hw/devices.h
| ... | ... | @@ -74,6 +74,5 @@ qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s); |
| 74 | 74 | qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s); |
| 75 | 75 | |
| 76 | 76 | /* sm501.c */ |
| 77 | -void sm501_init(uint32_t base, unsigned long local_mem_base, | |
| 78 | - uint32_t local_mem_bytes, CharDriverState *chr); | |
| 77 | +void sm501_init(uint32_t base, uint32_t local_mem_bytes, CharDriverState *chr); | |
| 79 | 78 | #endif | ... | ... |
hw/pc.c
| ... | ... | @@ -871,7 +871,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size, |
| 871 | 871 | goto bios_error; |
| 872 | 872 | } |
| 873 | 873 | bios_offset = qemu_ram_alloc(bios_size); |
| 874 | - ret = load_image(buf, phys_ram_base + bios_offset); | |
| 874 | + ret = load_image(buf, qemu_get_ram_ptr(bios_offset)); | |
| 875 | 875 | if (ret != bios_size) { |
| 876 | 876 | bios_error: |
| 877 | 877 | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf); | ... | ... |
hw/ppc_newworld.c
| ... | ... | @@ -110,6 +110,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
| 110 | 110 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
| 111 | 111 | void *fw_cfg; |
| 112 | 112 | void *dbdma; |
| 113 | + uint8_t *vga_bios_ptr; | |
| 113 | 114 | |
| 114 | 115 | linux_boot = (kernel_filename != NULL); |
| 115 | 116 | |
| ... | ... | @@ -154,8 +155,9 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
| 154 | 155 | |
| 155 | 156 | /* allocate and load VGA BIOS */ |
| 156 | 157 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
| 158 | + vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset); | |
| 157 | 159 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
| 158 | - vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8); | |
| 160 | + vga_bios_size = load_image(buf, vga_bios_ptr + 8); | |
| 159 | 161 | if (vga_bios_size < 0) { |
| 160 | 162 | /* if no bios is present, we can still work */ |
| 161 | 163 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf); |
| ... | ... | @@ -163,12 +165,11 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
| 163 | 165 | } else { |
| 164 | 166 | /* set a specific header (XXX: find real Apple format for NDRV |
| 165 | 167 | drivers) */ |
| 166 | - phys_ram_base[vga_bios_offset] = 'N'; | |
| 167 | - phys_ram_base[vga_bios_offset + 1] = 'D'; | |
| 168 | - phys_ram_base[vga_bios_offset + 2] = 'R'; | |
| 169 | - phys_ram_base[vga_bios_offset + 3] = 'V'; | |
| 170 | - cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4), | |
| 171 | - vga_bios_size); | |
| 168 | + vga_bios_ptr[0] = 'N'; | |
| 169 | + vga_bios_ptr[1] = 'D'; | |
| 170 | + vga_bios_ptr[2] = 'R'; | |
| 171 | + vga_bios_ptr[3] = 'V'; | |
| 172 | + cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size); | |
| 172 | 173 | vga_bios_size += 8; |
| 173 | 174 | } |
| 174 | 175 | |
| ... | ... | @@ -199,8 +200,8 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
| 199 | 200 | /* load initrd */ |
| 200 | 201 | if (initrd_filename) { |
| 201 | 202 | initrd_base = INITRD_LOAD_ADDR; |
| 202 | - initrd_size = load_image(initrd_filename, | |
| 203 | - phys_ram_base + initrd_base); | |
| 203 | + initrd_size = load_image_targphys(initrd_filename, initrd_base, | |
| 204 | + ram_size - initrd_base); | |
| 204 | 205 | if (initrd_size < 0) { |
| 205 | 206 | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n", |
| 206 | 207 | initrd_filename); | ... | ... |
hw/ppc_oldworld.c
| ... | ... | @@ -138,6 +138,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
| 138 | 138 | int index; |
| 139 | 139 | void *fw_cfg; |
| 140 | 140 | void *dbdma; |
| 141 | + uint8_t *vga_bios_ptr; | |
| 141 | 142 | |
| 142 | 143 | linux_boot = (kernel_filename != NULL); |
| 143 | 144 | |
| ... | ... | @@ -187,8 +188,9 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
| 187 | 188 | |
| 188 | 189 | /* allocate and load VGA BIOS */ |
| 189 | 190 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
| 191 | + vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset); | |
| 190 | 192 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
| 191 | - vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8); | |
| 193 | + vga_bios_size = load_image(buf, vga_bios_ptr + 8); | |
| 192 | 194 | if (vga_bios_size < 0) { |
| 193 | 195 | /* if no bios is present, we can still work */ |
| 194 | 196 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf); |
| ... | ... | @@ -196,12 +198,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
| 196 | 198 | } else { |
| 197 | 199 | /* set a specific header (XXX: find real Apple format for NDRV |
| 198 | 200 | drivers) */ |
| 199 | - phys_ram_base[vga_bios_offset] = 'N'; | |
| 200 | - phys_ram_base[vga_bios_offset + 1] = 'D'; | |
| 201 | - phys_ram_base[vga_bios_offset + 2] = 'R'; | |
| 202 | - phys_ram_base[vga_bios_offset + 3] = 'V'; | |
| 203 | - cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4), | |
| 204 | - vga_bios_size); | |
| 201 | + vga_bios_ptr[0] = 'N'; | |
| 202 | + vga_bios_ptr[1] = 'D'; | |
| 203 | + vga_bios_ptr[2] = 'R'; | |
| 204 | + vga_bios_ptr[3] = 'V'; | |
| 205 | + cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size); | |
| 205 | 206 | vga_bios_size += 8; |
| 206 | 207 | } |
| 207 | 208 | ... | ... |
hw/r2d.c
| ... | ... | @@ -200,7 +200,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size, |
| 200 | 200 | { |
| 201 | 201 | CPUState *env; |
| 202 | 202 | struct SH7750State *s; |
| 203 | - ram_addr_t sdram_addr, sm501_vga_ram_addr; | |
| 203 | + ram_addr_t sdram_addr; | |
| 204 | 204 | qemu_irq *irq; |
| 205 | 205 | PCIBus *pci; |
| 206 | 206 | int i; |
| ... | ... | @@ -222,9 +222,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size, |
| 222 | 222 | irq = r2d_fpga_init(0x04000000, sh7750_irl(s)); |
| 223 | 223 | pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4); |
| 224 | 224 | |
| 225 | - sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE); | |
| 226 | - sm501_init(0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE, | |
| 227 | - serial_hds[2]); | |
| 225 | + sm501_init(0x10000000, SM501_VRAM_SIZE, serial_hds[2]); | |
| 228 | 226 | |
| 229 | 227 | /* onboard CF (True IDE mode, Master only). */ |
| 230 | 228 | if ((i = drive_get_index(IF_IDE, 0, 0)) != -1) | ... | ... |
hw/sm501.c
| ... | ... | @@ -455,6 +455,7 @@ typedef struct SM501State { |
| 455 | 455 | target_phys_addr_t base; |
| 456 | 456 | uint32_t local_mem_size_index; |
| 457 | 457 | uint8_t * local_mem; |
| 458 | + ram_addr_t local_mem_offset; | |
| 458 | 459 | uint32_t last_width; |
| 459 | 460 | uint32_t last_height; |
| 460 | 461 | |
| ... | ... | @@ -972,6 +973,7 @@ static void sm501_draw_crt(SM501State * s) |
| 972 | 973 | int y_start = -1; |
| 973 | 974 | int page_min = 0x7fffffff; |
| 974 | 975 | int page_max = -1; |
| 976 | + ram_addr_t offset = s->local_mem_offset; | |
| 975 | 977 | |
| 976 | 978 | /* choose draw_line function */ |
| 977 | 979 | switch (s->dc_crt_control & 3) { |
| ... | ... | @@ -1005,10 +1007,9 @@ static void sm501_draw_crt(SM501State * s) |
| 1005 | 1007 | /* draw each line according to conditions */ |
| 1006 | 1008 | for (y = 0; y < height; y++) { |
| 1007 | 1009 | int update = full_update; |
| 1008 | - uint8_t * line_end = &src[width * src_bpp - 1]; | |
| 1009 | - int page0 = (src - phys_ram_base) & TARGET_PAGE_MASK; | |
| 1010 | - int page1 = (line_end - phys_ram_base) & TARGET_PAGE_MASK; | |
| 1011 | - int page; | |
| 1010 | + ram_addr_t page0 = offset & TARGET_PAGE_MASK; | |
| 1011 | + ram_addr_t page1 = (offset + width * src_bpp - 1) & TARGET_PAGE_MASK; | |
| 1012 | + ram_addr_t page; | |
| 1012 | 1013 | |
| 1013 | 1014 | /* check dirty flags for each line */ |
| 1014 | 1015 | for (page = page0; page <= page1; page += TARGET_PAGE_SIZE) |
| ... | ... | @@ -1033,6 +1034,7 @@ static void sm501_draw_crt(SM501State * s) |
| 1033 | 1034 | } |
| 1034 | 1035 | |
| 1035 | 1036 | src += width * src_bpp; |
| 1037 | + offset += width * src_bpp; | |
| 1036 | 1038 | } |
| 1037 | 1039 | |
| 1038 | 1040 | /* complete flush to display */ |
| ... | ... | @@ -1053,8 +1055,7 @@ static void sm501_update_display(void *opaque) |
| 1053 | 1055 | sm501_draw_crt(s); |
| 1054 | 1056 | } |
| 1055 | 1057 | |
| 1056 | -void sm501_init(uint32_t base, unsigned long local_mem_base, | |
| 1057 | - uint32_t local_mem_bytes, CharDriverState *chr) | |
| 1058 | +void sm501_init(uint32_t base, uint32_t local_mem_bytes, CharDriverState *chr) | |
| 1058 | 1059 | { |
| 1059 | 1060 | SM501State * s; |
| 1060 | 1061 | int sm501_system_config_index; |
| ... | ... | @@ -1073,8 +1074,9 @@ void sm501_init(uint32_t base, unsigned long local_mem_base, |
| 1073 | 1074 | s->dc_crt_control = 0x00010000; |
| 1074 | 1075 | |
| 1075 | 1076 | /* allocate local memory */ |
| 1076 | - s->local_mem = (uint8 *)phys_ram_base + local_mem_base; | |
| 1077 | - cpu_register_physical_memory(base, local_mem_bytes, local_mem_base); | |
| 1077 | + s->local_mem_offset = qemu_ram_alloc(local_mem_bytes); | |
| 1078 | + s->local_mem = qemu_get_ram_ptr(s->local_mem_offset); | |
| 1079 | + cpu_register_physical_memory(base, local_mem_bytes, s->local_mem_offset); | |
| 1078 | 1080 | |
| 1079 | 1081 | /* map mmio */ |
| 1080 | 1082 | sm501_system_config_index | ... | ... |
hw/tc6393xb.c
| ... | ... | @@ -123,6 +123,7 @@ struct tc6393xb_s { |
| 123 | 123 | |
| 124 | 124 | DisplayState *ds; |
| 125 | 125 | ram_addr_t vram_addr; |
| 126 | + uint16_t *vram_ptr; | |
| 126 | 127 | uint32_t scr_width, scr_height; /* in pixels */ |
| 127 | 128 | qemu_irq l3v; |
| 128 | 129 | unsigned blank : 1, |
| ... | ... | @@ -593,6 +594,7 @@ struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq) |
| 593 | 594 | cpu_register_physical_memory(base, 0x10000, iomemtype); |
| 594 | 595 | |
| 595 | 596 | s->vram_addr = qemu_ram_alloc(0x100000); |
| 597 | + s->vram_ptr = qemu_get_ram_ptr(s->vram_addr); | |
| 596 | 598 | cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr); |
| 597 | 599 | s->scr_width = 480; |
| 598 | 600 | s->scr_height = 640; | ... | ... |
hw/tc6393xb_template.h
| ... | ... | @@ -43,7 +43,7 @@ static void glue(tc6393xb_draw_graphic, BITS)(struct tc6393xb_s *s) |
| 43 | 43 | uint16_t *data_buffer; |
| 44 | 44 | uint8_t *data_display; |
| 45 | 45 | |
| 46 | - data_buffer = (uint16_t*)(phys_ram_base + s->vram_addr); | |
| 46 | + data_buffer = s->vram_ptr; | |
| 47 | 47 | w_display = s->scr_width * BITS / 8; |
| 48 | 48 | data_display = ds_get_data(s->ds); |
| 49 | 49 | for(i = 0; i < s->scr_height; i++) { | ... | ... |