gwj / at91sam9263 · Commits

Commit dc828ca1b59b0c390a6994c78e9658174f821f74

Authored by pbrook
1 parent 7ffa4767

Cleanup SPARC/TCX framebuffer allocation. 

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7059 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 5 changed files with 26 additions and 16 deletions
cpu-all.h
  View file @dc828ca
... ... @@ -906,6 +906,8 @@ static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
906 906 ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
907 907 ram_addr_t qemu_ram_alloc(ram_addr_t);
908 908 void qemu_ram_free(ram_addr_t addr);
  909 +/* This should only be used for ram local to a device. */
  910 +void *qemu_get_ram_ptr(ram_addr_t addr);
909 911 int cpu_register_io_memory(int io_index,
910 912 CPUReadMemoryFunc **mem_read,
911 913 CPUWriteMemoryFunc **mem_write,
... ...
... ... @@ -2427,6 +2427,14 @@ void qemu_ram_free(ram_addr_t addr)
2427 2427 {
2428 2428 }
2429 2429  
  2430 +/* Return a host pointer to ram allocated with qemu_ram_alloc.
  2431 + This may only be used if you actually allocated the ram, and
  2432 + aready know how but the ram block is. */
  2433 +void *qemu_get_ram_ptr(ram_addr_t addr)
  2434 +{
  2435 + return phys_ram_base + addr;
  2436 +}
  2437 +
2430 2438 static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr)
2431 2439 {
2432 2440 #ifdef DEBUG_UNASSIGNED
... ...
hw/sun4m.c
  View file @dc828ca
... ... @@ -382,7 +382,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
382 382 qemu_irq *esp_reset, *le_reset;
383 383 qemu_irq *fdc_tc;
384 384 qemu_irq *cpu_halt;
385   - ram_addr_t ram_offset, prom_offset, tcx_offset, idreg_offset;
  385 + ram_addr_t ram_offset, prom_offset, idreg_offset;
386 386 unsigned long kernel_size;
387 387 int ret;
388 388 char buf[1024];
... ... @@ -478,9 +478,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
478 478 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
479 479 exit (1);
480 480 }
481   - tcx_offset = qemu_ram_alloc(hwdef->vram_size);
482   - tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
483   - hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
  481 + tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
  482 + graphic_depth);
484 483  
485 484 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
486 485  
... ... @@ -1183,7 +1182,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1183 1182 qemu_irq *cpu_irqs[MAX_CPUS], *sbi_irq, *sbi_cpu_irq,
1184 1183 *espdma_irq, *ledma_irq;
1185 1184 qemu_irq *esp_reset, *le_reset;
1186   - ram_addr_t ram_offset, prom_offset, tcx_offset;
  1185 + ram_addr_t ram_offset, prom_offset;
1187 1186 unsigned long kernel_size;
1188 1187 int ret;
1189 1188 char buf[1024];
... ... @@ -1264,9 +1263,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1264 1263 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
1265 1264 exit (1);
1266 1265 }
1267   - tcx_offset = qemu_ram_alloc(hwdef->vram_size);
1268   - tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
1269   - hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
  1266 + tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
  1267 + graphic_depth);
1270 1268  
1271 1269 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
1272 1270  
... ... @@ -1409,7 +1407,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1409 1407 qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
1410 1408 qemu_irq *esp_reset, *le_reset;
1411 1409 qemu_irq *fdc_tc;
1412   - ram_addr_t ram_offset, prom_offset, tcx_offset;
  1410 + ram_addr_t ram_offset, prom_offset;
1413 1411 unsigned long kernel_size;
1414 1412 int ret;
1415 1413 char buf[1024];
... ... @@ -1481,9 +1479,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1481 1479 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
1482 1480 exit (1);
1483 1481 }
1484   - tcx_offset = qemu_ram_alloc(hwdef->vram_size);
1485   - tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
1486   - hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
  1482 + tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
  1483 + graphic_depth);
1487 1484  
1488 1485 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
1489 1486  
... ...
hw/sun4m.h
  View file @dc828ca
... ... @@ -24,8 +24,7 @@ static inline void sparc_iommu_memory_write(void *opaque,
24 24 }
25 25  
26 26 /* tcx.c */
27   -void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
28   - unsigned long vram_offset, int vram_size, int width, int height,
  27 +void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
29 28 int depth);
30 29  
31 30 /* slavio_intctl.c */
... ...
hw/tcx.c
  View file @dc828ca
... ... @@ -497,13 +497,17 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
497 497 tcx_dummy_writel,
498 498 };
499 499  
500   -void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
501   - unsigned long vram_offset, int vram_size, int width, int height,
  500 +void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
502 501 int depth)
503 502 {
504 503 TCXState *s;
505 504 int io_memory, dummy_memory;
  505 + ram_addr_t vram_offset;
506 506 int size;
  507 + uint8_t *vram_base;
  508 +
  509 + vram_offset = qemu_ram_alloc(vram_size);
  510 + vram_base = qemu_get_ram_ptr(vram_offset);
507 511  
508 512 s = qemu_mallocz(sizeof(TCXState));
509 513 s->addr = addr;
... ...