gwj / at91sam9263 · Commits

Commit 27a4edb310f1fb5cdcdbb8426efcf468d062d9b8

Authored by aurel32
1 parent 21d21583

Add GEN_VXFORM_UIMM macro for subsequent instructions. 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6173 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 20 additions and 0 deletions
target-ppc/translate.c
  View file @27a4edb
... ... @@ -372,6 +372,8 @@ EXTRACT_SHELPER(SIMM, 0, 16);
372 372 EXTRACT_HELPER(UIMM, 0, 16);
373 373 /* 5 bits signed immediate value */
374 374 EXTRACT_HELPER(SIMM5, 16, 5);
  375 +/* 5 bits signed immediate value */
  376 +EXTRACT_HELPER(UIMM5, 16, 5);
375 377 /* Bit count */
376 378 EXTRACT_HELPER(NB, 11, 5);
377 379 /* Shift count */
... ... @@ -6288,6 +6290,24 @@ GEN_VXFORM(vrlw, 2, 2);
6288 6290 tcg_temp_free_ptr(rd); \
6289 6291 }
6290 6292  
  6293 +#define GEN_VXFORM_UIMM(name, opc2, opc3) \
  6294 + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
  6295 + { \
  6296 + TCGv_ptr rb, rd; \
  6297 + TCGv_i32 uimm; \
  6298 + if (unlikely(!ctx->altivec_enabled)) { \
  6299 + gen_exception(ctx, POWERPC_EXCP_VPU); \
  6300 + return; \
  6301 + } \
  6302 + uimm = tcg_const_i32(UIMM5(ctx->opcode)); \
  6303 + rb = gen_avr_ptr(rB(ctx->opcode)); \
  6304 + rd = gen_avr_ptr(rD(ctx->opcode)); \
  6305 + gen_helper_##name (rd, rb, uimm); \
  6306 + tcg_temp_free_i32(uimm); \
  6307 + tcg_temp_free_ptr(rb); \
  6308 + tcg_temp_free_ptr(rd); \
  6309 + }
  6310 +
6291 6311 GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
6292 6312 {
6293 6313 TCGv_ptr ra, rb, rd;
... ...