gwj / at91sam9263 · Commits

Commit 2423f6601a19fa0ac4eac360de9d3fe80a18d715

Authored by ths
1 parent 534ce69f

Code formatting fix. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 938 additions and 935 deletions
target-mips/translate.c
  View file @2423f66
... ... @@ -1761,21 +1761,21 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1761 1761 case 0:
1762 1762 switch (sel) {
1763 1763 case 0:
1764   - gen_op_mfc0_index();
  1764 + gen_op_mfc0_index();
1765 1765 rn = "Index";
1766 1766 break;
1767 1767 case 1:
1768   -// gen_op_mfc0_mvpcontrol(); /* MT ASE */
  1768 +// gen_op_mfc0_mvpcontrol(); /* MT ASE */
1769 1769 rn = "MVPControl";
1770   -// break;
  1770 +// break;
1771 1771 case 2:
1772   -// gen_op_mfc0_mvpconf0(); /* MT ASE */
  1772 +// gen_op_mfc0_mvpconf0(); /* MT ASE */
1773 1773 rn = "MVPConf0";
1774   -// break;
  1774 +// break;
1775 1775 case 3:
1776   -// gen_op_mfc0_mvpconf1(); /* MT ASE */
  1776 +// gen_op_mfc0_mvpconf1(); /* MT ASE */
1777 1777 rn = "MVPConf1";
1778   -// break;
  1778 +// break;
1779 1779 default:
1780 1780 goto die;
1781 1781 }
... ... @@ -1785,35 +1785,35 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1785 1785 case 0:
1786 1786 gen_op_mfc0_random();
1787 1787 rn = "Random";
1788   - break;
  1788 + break;
1789 1789 case 1:
1790   -// gen_op_mfc0_vpecontrol(); /* MT ASE */
  1790 +// gen_op_mfc0_vpecontrol(); /* MT ASE */
1791 1791 rn = "VPEControl";
1792   -// break;
  1792 +// break;
1793 1793 case 2:
1794   -// gen_op_mfc0_vpeconf0(); /* MT ASE */
  1794 +// gen_op_mfc0_vpeconf0(); /* MT ASE */
1795 1795 rn = "VPEConf0";
1796   -// break;
  1796 +// break;
1797 1797 case 3:
1798   -// gen_op_mfc0_vpeconf1(); /* MT ASE */
  1798 +// gen_op_mfc0_vpeconf1(); /* MT ASE */
1799 1799 rn = "VPEConf1";
1800   -// break;
  1800 +// break;
1801 1801 case 4:
1802   -// gen_op_mfc0_YQMask(); /* MT ASE */
  1802 +// gen_op_mfc0_YQMask(); /* MT ASE */
1803 1803 rn = "YQMask";
1804   -// break;
  1804 +// break;
1805 1805 case 5:
1806   -// gen_op_mfc0_vpeschedule(); /* MT ASE */
  1806 +// gen_op_mfc0_vpeschedule(); /* MT ASE */
1807 1807 rn = "VPESchedule";
1808   -// break;
  1808 +// break;
1809 1809 case 6:
1810   -// gen_op_mfc0_vpeschefback(); /* MT ASE */
  1810 +// gen_op_mfc0_vpeschefback(); /* MT ASE */
1811 1811 rn = "VPEScheFBack";
1812   -// break;
  1812 +// break;
1813 1813 case 7:
1814   -// gen_op_mfc0_vpeopt(); /* MT ASE */
  1814 +// gen_op_mfc0_vpeopt(); /* MT ASE */
1815 1815 rn = "VPEOpt";
1816   -// break;
  1816 +// break;
1817 1817 default:
1818 1818 goto die;
1819 1819 }
... ... @@ -1821,37 +1821,37 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1821 1821 case 2:
1822 1822 switch (sel) {
1823 1823 case 0:
1824   - gen_op_mfc0_entrylo0();
1825   - rn = "EntryLo0";
1826   - break;
  1824 + gen_op_mfc0_entrylo0();
  1825 + rn = "EntryLo0";
  1826 + break;
1827 1827 case 1:
1828   -// gen_op_mfc0_tcstatus(); /* MT ASE */
1829   - rn = "TCStatus";
1830   -// break;
  1828 +// gen_op_mfc0_tcstatus(); /* MT ASE */
  1829 + rn = "TCStatus";
  1830 +// break;
1831 1831 case 2:
1832   -// gen_op_mfc0_tcbind(); /* MT ASE */
1833   - rn = "TCBind";
1834   -// break;
  1832 +// gen_op_mfc0_tcbind(); /* MT ASE */
  1833 + rn = "TCBind";
  1834 +// break;
1835 1835 case 3:
1836   -// gen_op_mfc0_tcrestart(); /* MT ASE */
1837   - rn = "TCRestart";
1838   -// break;
  1836 +// gen_op_mfc0_tcrestart(); /* MT ASE */
  1837 + rn = "TCRestart";
  1838 +// break;
1839 1839 case 4:
1840   -// gen_op_mfc0_tchalt(); /* MT ASE */
1841   - rn = "TCHalt";
1842   -// break;
  1840 +// gen_op_mfc0_tchalt(); /* MT ASE */
  1841 + rn = "TCHalt";
  1842 +// break;
1843 1843 case 5:
1844   -// gen_op_mfc0_tccontext(); /* MT ASE */
1845   - rn = "TCContext";
1846   -// break;
  1844 +// gen_op_mfc0_tccontext(); /* MT ASE */
  1845 + rn = "TCContext";
  1846 +// break;
1847 1847 case 6:
1848   -// gen_op_mfc0_tcschedule(); /* MT ASE */
1849   - rn = "TCSchedule";
1850   -// break;
  1848 +// gen_op_mfc0_tcschedule(); /* MT ASE */
  1849 + rn = "TCSchedule";
  1850 +// break;
1851 1851 case 7:
1852   -// gen_op_mfc0_tcschefback(); /* MT ASE */
1853   - rn = "TCScheFBack";
1854   -// break;
  1852 +// gen_op_mfc0_tcschefback(); /* MT ASE */
  1853 + rn = "TCScheFBack";
  1854 +// break;
1855 1855 default:
1856 1856 goto die;
1857 1857 }
... ... @@ -1859,9 +1859,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1859 1859 case 3:
1860 1860 switch (sel) {
1861 1861 case 0:
1862   - gen_op_mfc0_entrylo1();
1863   - rn = "EntryLo1";
1864   - break;
  1862 + gen_op_mfc0_entrylo1();
  1863 + rn = "EntryLo1";
  1864 + break;
1865 1865 default:
1866 1866 goto die;
1867 1867 }
... ... @@ -1869,13 +1869,13 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1869 1869 case 4:
1870 1870 switch (sel) {
1871 1871 case 0:
1872   - gen_op_mfc0_context();
1873   - rn = "Context";
1874   - break;
  1872 + gen_op_mfc0_context();
  1873 + rn = "Context";
  1874 + break;
1875 1875 case 1:
1876   -// gen_op_mfc0_contextconfig(); /* SmartMIPS ASE */
1877   - rn = "ContextConfig";
1878   -// break;
  1876 +// gen_op_mfc0_contextconfig(); /* SmartMIPS ASE */
  1877 + rn = "ContextConfig";
  1878 +// break;
1879 1879 default:
1880 1880 goto die;
1881 1881 }
... ... @@ -1883,13 +1883,13 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1883 1883 case 5:
1884 1884 switch (sel) {
1885 1885 case 0:
1886   - gen_op_mfc0_pagemask();
1887   - rn = "PageMask";
1888   - break;
  1886 + gen_op_mfc0_pagemask();
  1887 + rn = "PageMask";
  1888 + break;
1889 1889 case 1:
1890   - gen_op_mfc0_pagegrain();
1891   - rn = "PageGrain";
1892   - break;
  1890 + gen_op_mfc0_pagegrain();
  1891 + rn = "PageGrain";
  1892 + break;
1893 1893 default:
1894 1894 goto die;
1895 1895 }
... ... @@ -1897,29 +1897,29 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1897 1897 case 6:
1898 1898 switch (sel) {
1899 1899 case 0:
1900   - gen_op_mfc0_wired();
1901   - rn = "Wired";
1902   - break;
  1900 + gen_op_mfc0_wired();
  1901 + rn = "Wired";
  1902 + break;
1903 1903 case 1:
1904   -// gen_op_mfc0_srsconf0(); /* shadow registers */
1905   - rn = "SRSConf0";
1906   -// break;
  1904 +// gen_op_mfc0_srsconf0(); /* shadow registers */
  1905 + rn = "SRSConf0";
  1906 +// break;
1907 1907 case 2:
1908   -// gen_op_mfc0_srsconf1(); /* shadow registers */
1909   - rn = "SRSConf1";
1910   -// break;
  1908 +// gen_op_mfc0_srsconf1(); /* shadow registers */
  1909 + rn = "SRSConf1";
  1910 +// break;
1911 1911 case 3:
1912   -// gen_op_mfc0_srsconf2(); /* shadow registers */
1913   - rn = "SRSConf2";
1914   -// break;
  1912 +// gen_op_mfc0_srsconf2(); /* shadow registers */
  1913 + rn = "SRSConf2";
  1914 +// break;
1915 1915 case 4:
1916   -// gen_op_mfc0_srsconf3(); /* shadow registers */
1917   - rn = "SRSConf3";
1918   -// break;
  1916 +// gen_op_mfc0_srsconf3(); /* shadow registers */
  1917 + rn = "SRSConf3";
  1918 +// break;
1919 1919 case 5:
1920   -// gen_op_mfc0_srsconf4(); /* shadow registers */
1921   - rn = "SRSConf4";
1922   -// break;
  1920 +// gen_op_mfc0_srsconf4(); /* shadow registers */
  1921 + rn = "SRSConf4";
  1922 +// break;
1923 1923 default:
1924 1924 goto die;
1925 1925 }
... ... @@ -1927,9 +1927,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1927 1927 case 7:
1928 1928 switch (sel) {
1929 1929 case 0:
1930   - gen_op_mfc0_hwrena();
1931   - rn = "HWREna";
1932   - break;
  1930 + gen_op_mfc0_hwrena();
  1931 + rn = "HWREna";
  1932 + break;
1933 1933 default:
1934 1934 goto die;
1935 1935 }
... ... @@ -1937,9 +1937,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1937 1937 case 8:
1938 1938 switch (sel) {
1939 1939 case 0:
1940   - gen_op_mfc0_badvaddr();
1941   - rn = "BadVaddr";
1942   - break;
  1940 + gen_op_mfc0_badvaddr();
  1941 + rn = "BadVaddr";
  1942 + break;
1943 1943 default:
1944 1944 goto die;
1945 1945 }
... ... @@ -1947,20 +1947,20 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1947 1947 case 9:
1948 1948 switch (sel) {
1949 1949 case 0:
1950   - gen_op_mfc0_count();
1951   - rn = "Count";
1952   - break;
1953   - /* 6,7 are implementation dependent */
  1950 + gen_op_mfc0_count();
  1951 + rn = "Count";
  1952 + break;
  1953 + /* 6,7 are implementation dependent */
1954 1954 default:
1955 1955 goto die;
1956   - }
  1956 + }
1957 1957 break;
1958 1958 case 10:
1959 1959 switch (sel) {
1960 1960 case 0:
1961   - gen_op_mfc0_entryhi();
1962   - rn = "EntryHi";
1963   - break;
  1961 + gen_op_mfc0_entryhi();
  1962 + rn = "EntryHi";
  1963 + break;
1964 1964 default:
1965 1965 goto die;
1966 1966 }
... ... @@ -1968,32 +1968,32 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
1968 1968 case 11:
1969 1969 switch (sel) {
1970 1970 case 0:
1971   - gen_op_mfc0_compare();
1972   - rn = "Compare";
1973   - break;
1974   - /* 6,7 are implementation dependent */
  1971 + gen_op_mfc0_compare();
  1972 + rn = "Compare";
  1973 + break;
  1974 + /* 6,7 are implementation dependent */
1975 1975 default:
1976 1976 goto die;
1977   - }
  1977 + }
1978 1978 break;
1979 1979 case 12:
1980 1980 switch (sel) {
1981 1981 case 0:
1982   - gen_op_mfc0_status();
1983   - rn = "Status";
1984   - break;
  1982 + gen_op_mfc0_status();
  1983 + rn = "Status";
  1984 + break;
1985 1985 case 1:
1986   - gen_op_mfc0_intctl();
1987   - rn = "IntCtl";
1988   - break;
  1986 + gen_op_mfc0_intctl();
  1987 + rn = "IntCtl";
  1988 + break;
1989 1989 case 2:
1990   - gen_op_mfc0_srsctl();
1991   - rn = "SRSCtl";
1992   - break;
  1990 + gen_op_mfc0_srsctl();
  1991 + rn = "SRSCtl";
  1992 + break;
1993 1993 case 3:
1994   -// gen_op_mfc0_srsmap(); /* shadow registers */
1995   - rn = "SRSMap";
1996   -// break;
  1994 +// gen_op_mfc0_srsmap(); /* shadow registers */
  1995 + rn = "SRSMap";
  1996 +// break;
1997 1997 default:
1998 1998 goto die;
1999 1999 }
... ... @@ -2001,9 +2001,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2001 2001 case 13:
2002 2002 switch (sel) {
2003 2003 case 0:
2004   - gen_op_mfc0_cause();
2005   - rn = "Cause";
2006   - break;
  2004 + gen_op_mfc0_cause();
  2005 + rn = "Cause";
  2006 + break;
2007 2007 default:
2008 2008 goto die;
2009 2009 }
... ... @@ -2011,9 +2011,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2011 2011 case 14:
2012 2012 switch (sel) {
2013 2013 case 0:
2014   - gen_op_mfc0_epc();
2015   - rn = "EPC";
2016   - break;
  2014 + gen_op_mfc0_epc();
  2015 + rn = "EPC";
  2016 + break;
2017 2017 default:
2018 2018 goto die;
2019 2019 }
... ... @@ -2021,13 +2021,13 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2021 2021 case 15:
2022 2022 switch (sel) {
2023 2023 case 0:
2024   - gen_op_mfc0_prid();
2025   - rn = "PRid";
2026   - break;
  2024 + gen_op_mfc0_prid();
  2025 + rn = "PRid";
  2026 + break;
2027 2027 case 1:
2028   - gen_op_mfc0_ebase();
2029   - rn = "EBase";
2030   - break;
  2028 + gen_op_mfc0_ebase();
  2029 + rn = "EBase";
  2030 + break;
2031 2031 default:
2032 2032 goto die;
2033 2033 }
... ... @@ -2067,9 +2067,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2067 2067 case 17:
2068 2068 switch (sel) {
2069 2069 case 0:
2070   - gen_op_mfc0_lladdr();
2071   - rn = "LLAddr";
2072   - break;
  2070 + gen_op_mfc0_lladdr();
  2071 + rn = "LLAddr";
  2072 + break;
2073 2073 default:
2074 2074 goto die;
2075 2075 }
... ... @@ -2077,37 +2077,37 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2077 2077 case 18:
2078 2078 switch (sel) {
2079 2079 case 0:
2080   - gen_op_mfc0_watchlo0();
2081   - rn = "WatchLo";
2082   - break;
  2080 + gen_op_mfc0_watchlo0();
  2081 + rn = "WatchLo";
  2082 + break;
2083 2083 case 1:
2084   -// gen_op_mfc0_watchlo1();
2085   - rn = "WatchLo1";
2086   -// break;
  2084 +// gen_op_mfc0_watchlo1();
  2085 + rn = "WatchLo1";
  2086 +// break;
2087 2087 case 2:
2088   -// gen_op_mfc0_watchlo2();
2089   - rn = "WatchLo2";
2090   -// break;
  2088 +// gen_op_mfc0_watchlo2();
  2089 + rn = "WatchLo2";
  2090 +// break;
2091 2091 case 3:
2092   -// gen_op_mfc0_watchlo3();
2093   - rn = "WatchLo3";
2094   -// break;
  2092 +// gen_op_mfc0_watchlo3();
  2093 + rn = "WatchLo3";
  2094 +// break;
2095 2095 case 4:
2096   -// gen_op_mfc0_watchlo4();
2097   - rn = "WatchLo4";
2098   -// break;
  2096 +// gen_op_mfc0_watchlo4();
  2097 + rn = "WatchLo4";
  2098 +// break;
2099 2099 case 5:
2100   -// gen_op_mfc0_watchlo5();
2101   - rn = "WatchLo5";
2102   -// break;
  2100 +// gen_op_mfc0_watchlo5();
  2101 + rn = "WatchLo5";
  2102 +// break;
2103 2103 case 6:
2104   -// gen_op_mfc0_watchlo6();
2105   - rn = "WatchLo6";
2106   -// break;
  2104 +// gen_op_mfc0_watchlo6();
  2105 + rn = "WatchLo6";
  2106 +// break;
2107 2107 case 7:
2108   -// gen_op_mfc0_watchlo7();
2109   - rn = "WatchLo7";
2110   -// break;
  2108 +// gen_op_mfc0_watchlo7();
  2109 + rn = "WatchLo7";
  2110 +// break;
2111 2111 default:
2112 2112 goto die;
2113 2113 }
... ... @@ -2115,37 +2115,37 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2115 2115 case 19:
2116 2116 switch (sel) {
2117 2117 case 0:
2118   - gen_op_mfc0_watchhi0();
2119   - rn = "WatchHi";
2120   - break;
  2118 + gen_op_mfc0_watchhi0();
  2119 + rn = "WatchHi";
  2120 + break;
2121 2121 case 1:
2122   -// gen_op_mfc0_watchhi1();
2123   - rn = "WatchHi1";
2124   -// break;
  2122 +// gen_op_mfc0_watchhi1();
  2123 + rn = "WatchHi1";
  2124 +// break;
2125 2125 case 2:
2126   -// gen_op_mfc0_watchhi2();
2127   - rn = "WatchHi2";
2128   -// break;
  2126 +// gen_op_mfc0_watchhi2();
  2127 + rn = "WatchHi2";
  2128 +// break;
2129 2129 case 3:
2130   -// gen_op_mfc0_watchhi3();
2131   - rn = "WatchHi3";
2132   -// break;
  2130 +// gen_op_mfc0_watchhi3();
  2131 + rn = "WatchHi3";
  2132 +// break;
2133 2133 case 4:
2134   -// gen_op_mfc0_watchhi4();
2135   - rn = "WatchHi4";
2136   -// break;
  2134 +// gen_op_mfc0_watchhi4();
  2135 + rn = "WatchHi4";
  2136 +// break;
2137 2137 case 5:
2138   -// gen_op_mfc0_watchhi5();
2139   - rn = "WatchHi5";
2140   -// break;
  2138 +// gen_op_mfc0_watchhi5();
  2139 + rn = "WatchHi5";
  2140 +// break;
2141 2141 case 6:
2142   -// gen_op_mfc0_watchhi6();
2143   - rn = "WatchHi6";
2144   -// break;
  2142 +// gen_op_mfc0_watchhi6();
  2143 + rn = "WatchHi6";
  2144 +// break;
2145 2145 case 7:
2146   -// gen_op_mfc0_watchhi7();
2147   - rn = "WatchHi7";
2148   -// break;
  2146 +// gen_op_mfc0_watchhi7();
  2147 + rn = "WatchHi7";
  2148 +// break;
2149 2149 default:
2150 2150 goto die;
2151 2151 }
... ... @@ -2153,10 +2153,10 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2153 2153 case 20:
2154 2154 switch (sel) {
2155 2155 case 0:
2156   - /* 64 bit MMU only */
2157   - gen_op_mfc0_xcontext();
2158   - rn = "XContext";
2159   - break;
  2156 + /* 64 bit MMU only */
  2157 + gen_op_mfc0_xcontext();
  2158 + rn = "XContext";
  2159 + break;
2160 2160 default:
2161 2161 goto die;
2162 2162 }
... ... @@ -2165,39 +2165,39 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2165 2165 /* Officially reserved, but sel 0 is used for R1x000 framemask */
2166 2166 switch (sel) {
2167 2167 case 0:
2168   - gen_op_mfc0_framemask();
2169   - rn = "Framemask";
2170   - break;
  2168 + gen_op_mfc0_framemask();
  2169 + rn = "Framemask";
  2170 + break;
2171 2171 default:
2172 2172 goto die;
2173 2173 }
2174 2174 break;
2175 2175 case 22:
2176   - /* ignored */
2177   - rn = "'Diagnostic"; /* implementation dependent */
2178   - break;
  2176 + /* ignored */
  2177 + rn = "'Diagnostic"; /* implementation dependent */
  2178 + break;
2179 2179 case 23:
2180 2180 switch (sel) {
2181 2181 case 0:
2182   - gen_op_mfc0_debug(); /* EJTAG support */
2183   - rn = "Debug";
2184   - break;
  2182 + gen_op_mfc0_debug(); /* EJTAG support */
  2183 + rn = "Debug";
  2184 + break;
2185 2185 case 1:
2186   -// gen_op_mfc0_tracecontrol(); /* PDtrace support */
2187   - rn = "TraceControl";
2188   -// break;
  2186 +// gen_op_mfc0_tracecontrol(); /* PDtrace support */
  2187 + rn = "TraceControl";
  2188 +// break;
2189 2189 case 2:
2190   -// gen_op_mfc0_tracecontrol2(); /* PDtrace support */
2191   - rn = "TraceControl2";
2192   -// break;
  2190 +// gen_op_mfc0_tracecontrol2(); /* PDtrace support */
  2191 + rn = "TraceControl2";
  2192 +// break;
2193 2193 case 3:
2194   -// gen_op_mfc0_usertracedata(); /* PDtrace support */
2195   - rn = "UserTraceData";
2196   -// break;
  2194 +// gen_op_mfc0_usertracedata(); /* PDtrace support */
  2195 + rn = "UserTraceData";
  2196 +// break;
2197 2197 case 4:
2198   -// gen_op_mfc0_debug(); /* PDtrace support */
2199   - rn = "TraceBPC";
2200   -// break;
  2198 +// gen_op_mfc0_debug(); /* PDtrace support */
  2199 + rn = "TraceBPC";
  2200 +// break;
2201 2201 default:
2202 2202 goto die;
2203 2203 }
... ... @@ -2205,9 +2205,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2205 2205 case 24:
2206 2206 switch (sel) {
2207 2207 case 0:
2208   - gen_op_mfc0_depc(); /* EJTAG support */
2209   - rn = "DEPC";
2210   - break;
  2208 + gen_op_mfc0_depc(); /* EJTAG support */
  2209 + rn = "DEPC";
  2210 + break;
2211 2211 default:
2212 2212 goto die;
2213 2213 }
... ... @@ -2215,37 +2215,37 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2215 2215 case 25:
2216 2216 switch (sel) {
2217 2217 case 0:
2218   - gen_op_mfc0_performance0();
2219   - rn = "Performance0";
  2218 + gen_op_mfc0_performance0();
  2219 + rn = "Performance0";
2220 2220 break;
2221 2221 case 1:
2222   -// gen_op_mfc0_performance1();
2223   - rn = "Performance1";
2224   -// break;
  2222 +// gen_op_mfc0_performance1();
  2223 + rn = "Performance1";
  2224 +// break;
2225 2225 case 2:
2226   -// gen_op_mfc0_performance2();
2227   - rn = "Performance2";
2228   -// break;
  2226 +// gen_op_mfc0_performance2();
  2227 + rn = "Performance2";
  2228 +// break;
2229 2229 case 3:
2230   -// gen_op_mfc0_performance3();
2231   - rn = "Performance3";
2232   -// break;
  2230 +// gen_op_mfc0_performance3();
  2231 + rn = "Performance3";
  2232 +// break;
2233 2233 case 4:
2234   -// gen_op_mfc0_performance4();
2235   - rn = "Performance4";
2236   -// break;
  2234 +// gen_op_mfc0_performance4();
  2235 + rn = "Performance4";
  2236 +// break;
2237 2237 case 5:
2238   -// gen_op_mfc0_performance5();
2239   - rn = "Performance5";
2240   -// break;
  2238 +// gen_op_mfc0_performance5();
  2239 + rn = "Performance5";
  2240 +// break;
2241 2241 case 6:
2242   -// gen_op_mfc0_performance6();
2243   - rn = "Performance6";
2244   -// break;
  2242 +// gen_op_mfc0_performance6();
  2243 + rn = "Performance6";
  2244 +// break;
2245 2245 case 7:
2246   -// gen_op_mfc0_performance7();
2247   - rn = "Performance7";
2248   -// break;
  2246 +// gen_op_mfc0_performance7();
  2247 + rn = "Performance7";
  2248 +// break;
2249 2249 default:
2250 2250 goto die;
2251 2251 }
... ... @@ -2257,8 +2257,8 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2257 2257 switch (sel) {
2258 2258 /* ignored */
2259 2259 case 0 ... 3:
2260   - rn = "CacheErr";
2261   - break;
  2260 + rn = "CacheErr";
  2261 + break;
2262 2262 default:
2263 2263 goto die;
2264 2264 }
... ... @@ -2306,9 +2306,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2306 2306 case 30:
2307 2307 switch (sel) {
2308 2308 case 0:
2309   - gen_op_mfc0_errorepc();
2310   - rn = "ErrorEPC";
2311   - break;
  2309 + gen_op_mfc0_errorepc();
  2310 + rn = "ErrorEPC";
  2311 + break;
2312 2312 default:
2313 2313 goto die;
2314 2314 }
... ... @@ -2316,9 +2316,9 @@ static void gen_mfc0 (DisasContext *ctx, int reg, int sel)
2316 2316 case 31:
2317 2317 switch (sel) {
2318 2318 case 0:
2319   - gen_op_mfc0_desave(); /* EJTAG support */
2320   - rn = "DESAVE";
2321   - break;
  2319 + gen_op_mfc0_desave(); /* EJTAG support */
  2320 + rn = "DESAVE";
  2321 + break;
2322 2322 default:
2323 2323 goto die;
2324 2324 }
... ... @@ -2356,17 +2356,17 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2356 2356 rn = "Index";
2357 2357 break;
2358 2358 case 1:
2359   -// gen_op_mtc0_mvpcontrol(); /* MT ASE */
  2359 +// gen_op_mtc0_mvpcontrol(); /* MT ASE */
2360 2360 rn = "MVPControl";
2361   -// break;
  2361 +// break;
2362 2362 case 2:
2363   -// gen_op_mtc0_mvpconf0(); /* MT ASE */
  2363 +// gen_op_mtc0_mvpconf0(); /* MT ASE */
2364 2364 rn = "MVPConf0";
2365   -// break;
  2365 +// break;
2366 2366 case 3:
2367   -// gen_op_mtc0_mvpconf1(); /* MT ASE */
  2367 +// gen_op_mtc0_mvpconf1(); /* MT ASE */
2368 2368 rn = "MVPConf1";
2369   -// break;
  2369 +// break;
2370 2370 default:
2371 2371 goto die;
2372 2372 }
... ... @@ -2374,37 +2374,37 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2374 2374 case 1:
2375 2375 switch (sel) {
2376 2376 case 0:
2377   - /* ignored */
  2377 + /* ignored */
2378 2378 rn = "Random";
2379   - break;
  2379 + break;
2380 2380 case 1:
2381   -// gen_op_mtc0_vpecontrol(); /* MT ASE */
  2381 +// gen_op_mtc0_vpecontrol(); /* MT ASE */
2382 2382 rn = "VPEControl";
2383   -// break;
  2383 +// break;
2384 2384 case 2:
2385   -// gen_op_mtc0_vpeconf0(); /* MT ASE */
  2385 +// gen_op_mtc0_vpeconf0(); /* MT ASE */
2386 2386 rn = "VPEConf0";
2387   -// break;
  2387 +// break;
2388 2388 case 3:
2389   -// gen_op_mtc0_vpeconf1(); /* MT ASE */
  2389 +// gen_op_mtc0_vpeconf1(); /* MT ASE */
2390 2390 rn = "VPEConf1";
2391   -// break;
  2391 +// break;
2392 2392 case 4:
2393   -// gen_op_mtc0_YQMask(); /* MT ASE */
  2393 +// gen_op_mtc0_YQMask(); /* MT ASE */
2394 2394 rn = "YQMask";
2395   -// break;
  2395 +// break;
2396 2396 case 5:
2397   -// gen_op_mtc0_vpeschedule(); /* MT ASE */
  2397 +// gen_op_mtc0_vpeschedule(); /* MT ASE */
2398 2398 rn = "VPESchedule";
2399   -// break;
  2399 +// break;
2400 2400 case 6:
2401   -// gen_op_mtc0_vpeschefback(); /* MT ASE */
  2401 +// gen_op_mtc0_vpeschefback(); /* MT ASE */
2402 2402 rn = "VPEScheFBack";
2403   -// break;
  2403 +// break;
2404 2404 case 7:
2405   -// gen_op_mtc0_vpeopt(); /* MT ASE */
  2405 +// gen_op_mtc0_vpeopt(); /* MT ASE */
2406 2406 rn = "VPEOpt";
2407   -// break;
  2407 +// break;
2408 2408 default:
2409 2409 goto die;
2410 2410 }
... ... @@ -2412,37 +2412,37 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2412 2412 case 2:
2413 2413 switch (sel) {
2414 2414 case 0:
2415   - gen_op_mtc0_entrylo0();
2416   - rn = "EntryLo0";
2417   - break;
  2415 + gen_op_mtc0_entrylo0();
  2416 + rn = "EntryLo0";
  2417 + break;
2418 2418 case 1:
2419   -// gen_op_mtc0_tcstatus(); /* MT ASE */
2420   - rn = "TCStatus";
2421   -// break;
  2419 +// gen_op_mtc0_tcstatus(); /* MT ASE */
  2420 + rn = "TCStatus";
  2421 +// break;
2422 2422 case 2:
2423   -// gen_op_mtc0_tcbind(); /* MT ASE */
2424   - rn = "TCBind";
2425   -// break;
  2423 +// gen_op_mtc0_tcbind(); /* MT ASE */
  2424 + rn = "TCBind";
  2425 +// break;
2426 2426 case 3:
2427   -// gen_op_mtc0_tcrestart(); /* MT ASE */
2428   - rn = "TCRestart";
2429   -// break;
  2427 +// gen_op_mtc0_tcrestart(); /* MT ASE */
  2428 + rn = "TCRestart";
  2429 +// break;
2430 2430 case 4:
2431   -// gen_op_mtc0_tchalt(); /* MT ASE */
2432   - rn = "TCHalt";
2433   -// break;
  2431 +// gen_op_mtc0_tchalt(); /* MT ASE */
  2432 + rn = "TCHalt";
  2433 +// break;
2434 2434 case 5:
2435   -// gen_op_mtc0_tccontext(); /* MT ASE */
2436   - rn = "TCContext";
2437   -// break;
  2435 +// gen_op_mtc0_tccontext(); /* MT ASE */
  2436 + rn = "TCContext";
  2437 +// break;
2438 2438 case 6:
2439   -// gen_op_mtc0_tcschedule(); /* MT ASE */
2440   - rn = "TCSchedule";
2441   -// break;
  2439 +// gen_op_mtc0_tcschedule(); /* MT ASE */
  2440 + rn = "TCSchedule";
  2441 +// break;
2442 2442 case 7:
2443   -// gen_op_mtc0_tcschefback(); /* MT ASE */
2444   - rn = "TCScheFBack";
2445   -// break;
  2443 +// gen_op_mtc0_tcschefback(); /* MT ASE */
  2444 + rn = "TCScheFBack";
  2445 +// break;
2446 2446 default:
2447 2447 goto die;
2448 2448 }
... ... @@ -2450,9 +2450,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2450 2450 case 3:
2451 2451 switch (sel) {
2452 2452 case 0:
2453   - gen_op_mtc0_entrylo1();
2454   - rn = "EntryLo1";
2455   - break;
  2453 + gen_op_mtc0_entrylo1();
  2454 + rn = "EntryLo1";
  2455 + break;
2456 2456 default:
2457 2457 goto die;
2458 2458 }
... ... @@ -2460,13 +2460,13 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2460 2460 case 4:
2461 2461 switch (sel) {
2462 2462 case 0:
2463   - gen_op_mtc0_context();
2464   - rn = "Context";
2465   - break;
  2463 + gen_op_mtc0_context();
  2464 + rn = "Context";
  2465 + break;
2466 2466 case 1:
2467   -// gen_op_mtc0_contextconfig(); /* SmartMIPS ASE */
2468   - rn = "ContextConfig";
2469   -// break;
  2467 +// gen_op_mtc0_contextconfig(); /* SmartMIPS ASE */
  2468 + rn = "ContextConfig";
  2469 +// break;
2470 2470 default:
2471 2471 goto die;
2472 2472 }
... ... @@ -2474,13 +2474,13 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2474 2474 case 5:
2475 2475 switch (sel) {
2476 2476 case 0:
2477   - gen_op_mtc0_pagemask();
2478   - rn = "PageMask";
2479   - break;
  2477 + gen_op_mtc0_pagemask();
  2478 + rn = "PageMask";
  2479 + break;
2480 2480 case 1:
2481   - gen_op_mtc0_pagegrain();
2482   - rn = "PageGrain";
2483   - break;
  2481 + gen_op_mtc0_pagegrain();
  2482 + rn = "PageGrain";
  2483 + break;
2484 2484 default:
2485 2485 goto die;
2486 2486 }
... ... @@ -2488,29 +2488,29 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2488 2488 case 6:
2489 2489 switch (sel) {
2490 2490 case 0:
2491   - gen_op_mtc0_wired();
2492   - rn = "Wired";
2493   - break;
  2491 + gen_op_mtc0_wired();
  2492 + rn = "Wired";
  2493 + break;
2494 2494 case 1:
2495   -// gen_op_mtc0_srsconf0(); /* shadow registers */
2496   - rn = "SRSConf0";
2497   -// break;
  2495 +// gen_op_mtc0_srsconf0(); /* shadow registers */
  2496 + rn = "SRSConf0";
  2497 +// break;
2498 2498 case 2:
2499   -// gen_op_mtc0_srsconf1(); /* shadow registers */
2500   - rn = "SRSConf1";
2501   -// break;
  2499 +// gen_op_mtc0_srsconf1(); /* shadow registers */
  2500 + rn = "SRSConf1";
  2501 +// break;
2502 2502 case 3:
2503   -// gen_op_mtc0_srsconf2(); /* shadow registers */
2504   - rn = "SRSConf2";
2505   -// break;
  2503 +// gen_op_mtc0_srsconf2(); /* shadow registers */
  2504 + rn = "SRSConf2";
  2505 +// break;
2506 2506 case 4:
2507   -// gen_op_mtc0_srsconf3(); /* shadow registers */
2508   - rn = "SRSConf3";
2509   -// break;
  2507 +// gen_op_mtc0_srsconf3(); /* shadow registers */
  2508 + rn = "SRSConf3";
  2509 +// break;
2510 2510 case 5:
2511   -// gen_op_mtc0_srsconf4(); /* shadow registers */
2512   - rn = "SRSConf4";
2513   -// break;
  2511 +// gen_op_mtc0_srsconf4(); /* shadow registers */
  2512 + rn = "SRSConf4";
  2513 +// break;
2514 2514 default:
2515 2515 goto die;
2516 2516 }
... ... @@ -2518,9 +2518,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2518 2518 case 7:
2519 2519 switch (sel) {
2520 2520 case 0:
2521   - gen_op_mtc0_hwrena();
2522   - rn = "HWREna";
2523   - break;
  2521 + gen_op_mtc0_hwrena();
  2522 + rn = "HWREna";
  2523 + break;
2524 2524 default:
2525 2525 goto die;
2526 2526 }
... ... @@ -2532,9 +2532,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2532 2532 case 9:
2533 2533 switch (sel) {
2534 2534 case 0:
2535   - gen_op_mtc0_count();
2536   - rn = "Count";
2537   - break;
  2535 + gen_op_mtc0_count();
  2536 + rn = "Count";
  2537 + break;
2538 2538 /* 6,7 are implementation dependent */
2539 2539 default:
2540 2540 goto die;
... ... @@ -2545,9 +2545,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2545 2545 case 10:
2546 2546 switch (sel) {
2547 2547 case 0:
2548   - gen_op_mtc0_entryhi();
2549   - rn = "EntryHi";
2550   - break;
  2548 + gen_op_mtc0_entryhi();
  2549 + rn = "EntryHi";
  2550 + break;
2551 2551 default:
2552 2552 goto die;
2553 2553 }
... ... @@ -2555,10 +2555,10 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2555 2555 case 11:
2556 2556 switch (sel) {
2557 2557 case 0:
2558   - gen_op_mtc0_compare();
2559   - rn = "Compare";
2560   - break;
2561   - /* 6,7 are implementation dependent */
  2558 + gen_op_mtc0_compare();
  2559 + rn = "Compare";
  2560 + break;
  2561 + /* 6,7 are implementation dependent */
2562 2562 default:
2563 2563 goto die;
2564 2564 }
... ... @@ -2568,21 +2568,21 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2568 2568 case 12:
2569 2569 switch (sel) {
2570 2570 case 0:
2571   - gen_op_mtc0_status();
2572   - rn = "Status";
2573   - break;
  2571 + gen_op_mtc0_status();
  2572 + rn = "Status";
  2573 + break;
2574 2574 case 1:
2575   - gen_op_mtc0_intctl();
2576   - rn = "IntCtl";
2577   - break;
  2575 + gen_op_mtc0_intctl();
  2576 + rn = "IntCtl";
  2577 + break;
2578 2578 case 2:
2579   - gen_op_mtc0_srsctl();
2580   - rn = "SRSCtl";
2581   - break;
  2579 + gen_op_mtc0_srsctl();
  2580 + rn = "SRSCtl";
  2581 + break;
2582 2582 case 3:
2583   -// gen_op_mtc0_srsmap(); /* shadow registers */
2584   - rn = "SRSMap";
2585   -// break;
  2583 +// gen_op_mtc0_srsmap(); /* shadow registers */
  2584 + rn = "SRSMap";
  2585 +// break;
2586 2586 default:
2587 2587 goto die;
2588 2588 }
... ... @@ -2592,9 +2592,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2592 2592 case 13:
2593 2593 switch (sel) {
2594 2594 case 0:
2595   - gen_op_mtc0_cause();
2596   - rn = "Cause";
2597   - break;
  2595 + gen_op_mtc0_cause();
  2596 + rn = "Cause";
  2597 + break;
2598 2598 default:
2599 2599 goto die;
2600 2600 }
... ... @@ -2604,9 +2604,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2604 2604 case 14:
2605 2605 switch (sel) {
2606 2606 case 0:
2607   - gen_op_mtc0_epc();
2608   - rn = "EPC";
2609   - break;
  2607 + gen_op_mtc0_epc();
  2608 + rn = "EPC";
  2609 + break;
2610 2610 default:
2611 2611 goto die;
2612 2612 }
... ... @@ -2614,13 +2614,13 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2614 2614 case 15:
2615 2615 switch (sel) {
2616 2616 case 0:
2617   - /* ignored */
2618   - rn = "PRid";
2619   - break;
  2617 + /* ignored */
  2618 + rn = "PRid";
  2619 + break;
2620 2620 case 1:
2621   - gen_op_mtc0_ebase();
2622   - rn = "EBase";
2623   - break;
  2621 + gen_op_mtc0_ebase();
  2622 + rn = "EBase";
  2623 + break;
2624 2624 default:
2625 2625 goto die;
2626 2626 }
... ... @@ -2630,6 +2630,8 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2630 2630 case 0:
2631 2631 gen_op_mtc0_config0();
2632 2632 rn = "Config";
  2633 + /* Stop translation as we may have switched the execution mode */
  2634 + ctx->bstate = BS_STOP;
2633 2635 break;
2634 2636 case 1:
2635 2637 /* ignored, read only */
... ... @@ -2638,6 +2640,8 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2638 2640 case 2:
2639 2641 gen_op_mtc0_config2();
2640 2642 rn = "Config2";
  2643 + /* Stop translation as we may have switched the execution mode */
  2644 + ctx->bstate = BS_STOP;
2641 2645 break;
2642 2646 case 3:
2643 2647 /* ignored, read only */
... ... @@ -2657,15 +2661,13 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2657 2661 rn = "Invalid config selector";
2658 2662 goto die;
2659 2663 }
2660   - /* Stop translation as we may have switched the execution mode */
2661   - ctx->bstate = BS_STOP;
2662 2664 break;
2663 2665 case 17:
2664 2666 switch (sel) {
2665 2667 case 0:
2666   - /* ignored */
2667   - rn = "LLAddr";
2668   - break;
  2668 + /* ignored */
  2669 + rn = "LLAddr";
  2670 + break;
2669 2671 default:
2670 2672 goto die;
2671 2673 }
... ... @@ -2673,37 +2675,37 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2673 2675 case 18:
2674 2676 switch (sel) {
2675 2677 case 0:
2676   - gen_op_mtc0_watchlo0();
2677   - rn = "WatchLo";
2678   - break;
  2678 + gen_op_mtc0_watchlo0();
  2679 + rn = "WatchLo";
  2680 + break;
2679 2681 case 1:
2680   -// gen_op_mtc0_watchlo1();
2681   - rn = "WatchLo1";
2682   -// break;
  2682 +// gen_op_mtc0_watchlo1();
  2683 + rn = "WatchLo1";
  2684 +// break;
2683 2685 case 2:
2684   -// gen_op_mtc0_watchlo2();
2685   - rn = "WatchLo2";
2686   -// break;
  2686 +// gen_op_mtc0_watchlo2();
  2687 + rn = "WatchLo2";
  2688 +// break;
2687 2689 case 3:
2688   -// gen_op_mtc0_watchlo3();
2689   - rn = "WatchLo3";
2690   -// break;
  2690 +// gen_op_mtc0_watchlo3();
  2691 + rn = "WatchLo3";
  2692 +// break;
2691 2693 case 4:
2692   -// gen_op_mtc0_watchlo4();
2693   - rn = "WatchLo4";
2694   -// break;
  2694 +// gen_op_mtc0_watchlo4();
  2695 + rn = "WatchLo4";
  2696 +// break;
2695 2697 case 5:
2696   -// gen_op_mtc0_watchlo5();
2697   - rn = "WatchLo5";
2698   -// break;
  2698 +// gen_op_mtc0_watchlo5();
  2699 + rn = "WatchLo5";
  2700 +// break;
2699 2701 case 6:
2700   -// gen_op_mtc0_watchlo6();
2701   - rn = "WatchLo6";
2702   -// break;
  2702 +// gen_op_mtc0_watchlo6();
  2703 + rn = "WatchLo6";
  2704 +// break;
2703 2705 case 7:
2704   -// gen_op_mtc0_watchlo7();
2705   - rn = "WatchLo7";
2706   -// break;
  2706 +// gen_op_mtc0_watchlo7();
  2707 + rn = "WatchLo7";
  2708 +// break;
2707 2709 default:
2708 2710 goto die;
2709 2711 }
... ... @@ -2711,37 +2713,37 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2711 2713 case 19:
2712 2714 switch (sel) {
2713 2715 case 0:
2714   - gen_op_mtc0_watchhi0();
2715   - rn = "WatchHi";
2716   - break;
  2716 + gen_op_mtc0_watchhi0();
  2717 + rn = "WatchHi";
  2718 + break;
2717 2719 case 1:
2718   -// gen_op_mtc0_watchhi1();
2719   - rn = "WatchHi1";
2720   -// break;
  2720 +// gen_op_mtc0_watchhi1();
  2721 + rn = "WatchHi1";
  2722 +// break;
2721 2723 case 2:
2722   -// gen_op_mtc0_watchhi2();
2723   - rn = "WatchHi2";
2724   -// break;
  2724 +// gen_op_mtc0_watchhi2();
  2725 + rn = "WatchHi2";
  2726 +// break;
2725 2727 case 3:
2726   -// gen_op_mtc0_watchhi3();
2727   - rn = "WatchHi3";
2728   -// break;
  2728 +// gen_op_mtc0_watchhi3();
  2729 + rn = "WatchHi3";
  2730 +// break;
2729 2731 case 4:
2730   -// gen_op_mtc0_watchhi4();
2731   - rn = "WatchHi4";
2732   -// break;
  2732 +// gen_op_mtc0_watchhi4();
  2733 + rn = "WatchHi4";
  2734 +// break;
2733 2735 case 5:
2734   -// gen_op_mtc0_watchhi5();
2735   - rn = "WatchHi5";
2736   -// break;
  2736 +// gen_op_mtc0_watchhi5();
  2737 + rn = "WatchHi5";
  2738 +// break;
2737 2739 case 6:
2738   -// gen_op_mtc0_watchhi6();
2739   - rn = "WatchHi6";
2740   -// break;
  2740 +// gen_op_mtc0_watchhi6();
  2741 + rn = "WatchHi6";
  2742 +// break;
2741 2743 case 7:
2742   -// gen_op_mtc0_watchhi7();
2743   - rn = "WatchHi7";
2744   -// break;
  2744 +// gen_op_mtc0_watchhi7();
  2745 + rn = "WatchHi7";
  2746 +// break;
2745 2747 default:
2746 2748 goto die;
2747 2749 }
... ... @@ -2749,10 +2751,10 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2749 2751 case 20:
2750 2752 switch (sel) {
2751 2753 case 0:
2752   - /* 64 bit MMU only */
2753   - /* Nothing writable in lower 32 bits */
2754   - rn = "XContext";
2755   - break;
  2754 + /* 64 bit MMU only */
  2755 + /* Nothing writable in lower 32 bits */
  2756 + rn = "XContext";
  2757 + break;
2756 2758 default:
2757 2759 goto die;
2758 2760 }
... ... @@ -2761,9 +2763,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2761 2763 /* Officially reserved, but sel 0 is used for R1x000 framemask */
2762 2764 switch (sel) {
2763 2765 case 0:
2764   - gen_op_mtc0_framemask();
2765   - rn = "Framemask";
2766   - break;
  2766 + gen_op_mtc0_framemask();
  2767 + rn = "Framemask";
  2768 + break;
2767 2769 default:
2768 2770 goto die;
2769 2771 }
... ... @@ -2771,41 +2773,41 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2771 2773 case 22:
2772 2774 /* ignored */
2773 2775 rn = "Diagnostic"; /* implementation dependent */
2774   - break;
  2776 + break;
2775 2777 case 23:
2776 2778 switch (sel) {
2777 2779 case 0:
2778   - gen_op_mtc0_debug(); /* EJTAG support */
2779   - rn = "Debug";
2780   - break;
  2780 + gen_op_mtc0_debug(); /* EJTAG support */
  2781 + rn = "Debug";
  2782 + break;
2781 2783 case 1:
2782   -// gen_op_mtc0_tracecontrol(); /* PDtrace support */
2783   - rn = "TraceControl";
2784   -// break;
  2784 +// gen_op_mtc0_tracecontrol(); /* PDtrace support */
  2785 + rn = "TraceControl";
  2786 +// break;
2785 2787 case 2:
2786   -// gen_op_mtc0_tracecontrol2(); /* PDtrace support */
2787   - rn = "TraceControl2";
2788   -// break;
  2788 +// gen_op_mtc0_tracecontrol2(); /* PDtrace support */
  2789 + rn = "TraceControl2";
  2790 +// break;
2789 2791 case 3:
2790   -// gen_op_mtc0_usertracedata(); /* PDtrace support */
2791   - rn = "UserTraceData";
2792   -// break;
  2792 +// gen_op_mtc0_usertracedata(); /* PDtrace support */
  2793 + rn = "UserTraceData";
  2794 +// break;
2793 2795 case 4:
2794   -// gen_op_mtc0_debug(); /* PDtrace support */
2795   - rn = "TraceBPC";
2796   -// break;
  2796 +// gen_op_mtc0_debug(); /* PDtrace support */
  2797 + rn = "TraceBPC";
  2798 +// break;
2797 2799 default:
2798 2800 goto die;
2799 2801 }
2800   - /* Stop translation as we may have switched the execution mode */
2801   - ctx->bstate = BS_STOP;
  2802 + /* Stop translation as we may have switched the execution mode */
  2803 + ctx->bstate = BS_STOP;
2802 2804 break;
2803 2805 case 24:
2804 2806 switch (sel) {
2805 2807 case 0:
2806   - gen_op_mtc0_depc(); /* EJTAG support */
2807   - rn = "DEPC";
2808   - break;
  2808 + gen_op_mtc0_depc(); /* EJTAG support */
  2809 + rn = "DEPC";
  2810 + break;
2809 2811 default:
2810 2812 goto die;
2811 2813 }
... ... @@ -2813,51 +2815,51 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2813 2815 case 25:
2814 2816 switch (sel) {
2815 2817 case 0:
2816   - gen_op_mtc0_performance0();
2817   - rn = "Performance0";
2818   - break;
  2818 + gen_op_mtc0_performance0();
  2819 + rn = "Performance0";
  2820 + break;
2819 2821 case 1:
2820   -// gen_op_mtc0_performance1();
2821   - rn = "Performance1";
2822   -// break;
  2822 +// gen_op_mtc0_performance1();
  2823 + rn = "Performance1";
  2824 +// break;
2823 2825 case 2:
2824   -// gen_op_mtc0_performance2();
2825   - rn = "Performance2";
2826   -// break;
  2826 +// gen_op_mtc0_performance2();
  2827 + rn = "Performance2";
  2828 +// break;
2827 2829 case 3:
2828   -// gen_op_mtc0_performance3();
2829   - rn = "Performance3";
2830   -// break;
  2830 +// gen_op_mtc0_performance3();
  2831 + rn = "Performance3";
  2832 +// break;
2831 2833 case 4:
2832   -// gen_op_mtc0_performance4();
2833   - rn = "Performance4";
2834   -// break;
  2834 +// gen_op_mtc0_performance4();
  2835 + rn = "Performance4";
  2836 +// break;
2835 2837 case 5:
2836   -// gen_op_mtc0_performance5();
2837   - rn = "Performance5";
2838   -// break;
  2838 +// gen_op_mtc0_performance5();
  2839 + rn = "Performance5";
  2840 +// break;
2839 2841 case 6:
2840   -// gen_op_mtc0_performance6();
2841   - rn = "Performance6";
2842   -// break;
  2842 +// gen_op_mtc0_performance6();
  2843 + rn = "Performance6";
  2844 +// break;
2843 2845 case 7:
2844   -// gen_op_mtc0_performance7();
2845   - rn = "Performance7";
2846   -// break;
  2846 +// gen_op_mtc0_performance7();
  2847 + rn = "Performance7";
  2848 +// break;
2847 2849 default:
2848 2850 goto die;
2849 2851 }
2850 2852 break;
2851 2853 case 26:
2852   - /* ignored */
  2854 + /* ignored */
2853 2855 rn = "ECC";
2854   - break;
  2856 + break;
2855 2857 case 27:
2856 2858 switch (sel) {
2857 2859 case 0 ... 3:
2858   - /* ignored */
2859   - rn = "CacheErr";
2860   - break;
  2860 + /* ignored */
  2861 + rn = "CacheErr";
  2862 + break;
2861 2863 default:
2862 2864 goto die;
2863 2865 }
... ... @@ -2875,7 +2877,7 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2875 2877 case 3:
2876 2878 case 5:
2877 2879 case 7:
2878   - gen_op_mtc0_datalo();
  2880 + gen_op_mtc0_datalo();
2879 2881 rn = "DataLo";
2880 2882 break;
2881 2883 default:
... ... @@ -2895,7 +2897,7 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2895 2897 case 3:
2896 2898 case 5:
2897 2899 case 7:
2898   - gen_op_mtc0_datahi();
  2900 + gen_op_mtc0_datahi();
2899 2901 rn = "DataHi";
2900 2902 break;
2901 2903 default:
... ... @@ -2906,9 +2908,9 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2906 2908 case 30:
2907 2909 switch (sel) {
2908 2910 case 0:
2909   - gen_op_mtc0_errorepc();
2910   - rn = "ErrorEPC";
2911   - break;
  2911 + gen_op_mtc0_errorepc();
  2912 + rn = "ErrorEPC";
  2913 + break;
2912 2914 default:
2913 2915 goto die;
2914 2916 }
... ... @@ -2916,14 +2918,14 @@ static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
2916 2918 case 31:
2917 2919 switch (sel) {
2918 2920 case 0:
2919   - gen_op_mtc0_desave(); /* EJTAG support */
2920   - rn = "DESAVE";
2921   - break;
  2921 + gen_op_mtc0_desave(); /* EJTAG support */
  2922 + rn = "DESAVE";
  2923 + break;
2922 2924 default:
2923 2925 goto die;
2924 2926 }
2925   - /* Stop translation as we may have switched the execution mode */
2926   - ctx->bstate = BS_STOP;
  2927 + /* Stop translation as we may have switched the execution mode */
  2928 + ctx->bstate = BS_STOP;
2927 2929 break;
2928 2930 default:
2929 2931 goto die;
... ... @@ -2955,21 +2957,21 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
2955 2957 case 0:
2956 2958 switch (sel) {
2957 2959 case 0:
2958   - gen_op_mfc0_index();
  2960 + gen_op_mfc0_index();
2959 2961 rn = "Index";
2960 2962 break;
2961 2963 case 1:
2962   -// gen_op_dmfc0_mvpcontrol(); /* MT ASE */
  2964 +// gen_op_dmfc0_mvpcontrol(); /* MT ASE */
2963 2965 rn = "MVPControl";
2964   -// break;
  2966 +// break;
2965 2967 case 2:
2966   -// gen_op_dmfc0_mvpconf0(); /* MT ASE */
  2968 +// gen_op_dmfc0_mvpconf0(); /* MT ASE */
2967 2969 rn = "MVPConf0";
2968   -// break;
  2970 +// break;
2969 2971 case 3:
2970   -// gen_op_dmfc0_mvpconf1(); /* MT ASE */
  2972 +// gen_op_dmfc0_mvpconf1(); /* MT ASE */
2971 2973 rn = "MVPConf1";
2972   -// break;
  2974 +// break;
2973 2975 default:
2974 2976 goto die;
2975 2977 }
... ... @@ -2979,35 +2981,35 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
2979 2981 case 0:
2980 2982 gen_op_mfc0_random();
2981 2983 rn = "Random";
2982   - break;
  2984 + break;
2983 2985 case 1:
2984   -// gen_op_dmfc0_vpecontrol(); /* MT ASE */
  2986 +// gen_op_dmfc0_vpecontrol(); /* MT ASE */
2985 2987 rn = "VPEControl";
2986   -// break;
  2988 +// break;
2987 2989 case 2:
2988   -// gen_op_dmfc0_vpeconf0(); /* MT ASE */
  2990 +// gen_op_dmfc0_vpeconf0(); /* MT ASE */
2989 2991 rn = "VPEConf0";
2990   -// break;
  2992 +// break;
2991 2993 case 3:
2992   -// gen_op_dmfc0_vpeconf1(); /* MT ASE */
  2994 +// gen_op_dmfc0_vpeconf1(); /* MT ASE */
2993 2995 rn = "VPEConf1";
2994   -// break;
  2996 +// break;
2995 2997 case 4:
2996   -// gen_op_dmfc0_YQMask(); /* MT ASE */
  2998 +// gen_op_dmfc0_YQMask(); /* MT ASE */
2997 2999 rn = "YQMask";
2998   -// break;
  3000 +// break;
2999 3001 case 5:
3000   -// gen_op_dmfc0_vpeschedule(); /* MT ASE */
  3002 +// gen_op_dmfc0_vpeschedule(); /* MT ASE */
3001 3003 rn = "VPESchedule";
3002   -// break;
  3004 +// break;
3003 3005 case 6:
3004   -// gen_op_dmfc0_vpeschefback(); /* MT ASE */
  3006 +// gen_op_dmfc0_vpeschefback(); /* MT ASE */
3005 3007 rn = "VPEScheFBack";
3006   -// break;
  3008 +// break;
3007 3009 case 7:
3008   -// gen_op_dmfc0_vpeopt(); /* MT ASE */
  3010 +// gen_op_dmfc0_vpeopt(); /* MT ASE */
3009 3011 rn = "VPEOpt";
3010   -// break;
  3012 +// break;
3011 3013 default:
3012 3014 goto die;
3013 3015 }
... ... @@ -3015,37 +3017,37 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3015 3017 case 2:
3016 3018 switch (sel) {
3017 3019 case 0:
3018   - gen_op_dmfc0_entrylo0();
3019   - rn = "EntryLo0";
3020   - break;
  3020 + gen_op_dmfc0_entrylo0();
  3021 + rn = "EntryLo0";
  3022 + break;
3021 3023 case 1:
3022   -// gen_op_dmfc0_tcstatus(); /* MT ASE */
3023   - rn = "TCStatus";
3024   -// break;
  3024 +// gen_op_dmfc0_tcstatus(); /* MT ASE */
  3025 + rn = "TCStatus";
  3026 +// break;
3025 3027 case 2:
3026   -// gen_op_dmfc0_tcbind(); /* MT ASE */
3027   - rn = "TCBind";
3028   -// break;
  3028 +// gen_op_dmfc0_tcbind(); /* MT ASE */
  3029 + rn = "TCBind";
  3030 +// break;
3029 3031 case 3:
3030   -// gen_op_dmfc0_tcrestart(); /* MT ASE */
3031   - rn = "TCRestart";
3032   -// break;
  3032 +// gen_op_dmfc0_tcrestart(); /* MT ASE */
  3033 + rn = "TCRestart";
  3034 +// break;
3033 3035 case 4:
3034   -// gen_op_dmfc0_tchalt(); /* MT ASE */
3035   - rn = "TCHalt";
3036   -// break;
  3036 +// gen_op_dmfc0_tchalt(); /* MT ASE */
  3037 + rn = "TCHalt";
  3038 +// break;
3037 3039 case 5:
3038   -// gen_op_dmfc0_tccontext(); /* MT ASE */
3039   - rn = "TCContext";
3040   -// break;
  3040 +// gen_op_dmfc0_tccontext(); /* MT ASE */
  3041 + rn = "TCContext";
  3042 +// break;
3041 3043 case 6:
3042   -// gen_op_dmfc0_tcschedule(); /* MT ASE */
3043   - rn = "TCSchedule";
3044   -// break;
  3044 +// gen_op_dmfc0_tcschedule(); /* MT ASE */
  3045 + rn = "TCSchedule";
  3046 +// break;
3045 3047 case 7:
3046   -// gen_op_dmfc0_tcschefback(); /* MT ASE */
3047   - rn = "TCScheFBack";
3048   -// break;
  3048 +// gen_op_dmfc0_tcschefback(); /* MT ASE */
  3049 + rn = "TCScheFBack";
  3050 +// break;
3049 3051 default:
3050 3052 goto die;
3051 3053 }
... ... @@ -3053,9 +3055,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3053 3055 case 3:
3054 3056 switch (sel) {
3055 3057 case 0:
3056   - gen_op_dmfc0_entrylo1();
3057   - rn = "EntryLo1";
3058   - break;
  3058 + gen_op_dmfc0_entrylo1();
  3059 + rn = "EntryLo1";
  3060 + break;
3059 3061 default:
3060 3062 goto die;
3061 3063 }
... ... @@ -3063,13 +3065,13 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3063 3065 case 4:
3064 3066 switch (sel) {
3065 3067 case 0:
3066   - gen_op_dmfc0_context();
3067   - rn = "Context";
3068   - break;
  3068 + gen_op_dmfc0_context();
  3069 + rn = "Context";
  3070 + break;
3069 3071 case 1:
3070   -// gen_op_dmfc0_contextconfig(); /* SmartMIPS ASE */
3071   - rn = "ContextConfig";
3072   -// break;
  3072 +// gen_op_dmfc0_contextconfig(); /* SmartMIPS ASE */
  3073 + rn = "ContextConfig";
  3074 +// break;
3073 3075 default:
3074 3076 goto die;
3075 3077 }
... ... @@ -3077,13 +3079,13 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3077 3079 case 5:
3078 3080 switch (sel) {
3079 3081 case 0:
3080   - gen_op_mfc0_pagemask();
3081   - rn = "PageMask";
3082   - break;
  3082 + gen_op_mfc0_pagemask();
  3083 + rn = "PageMask";
  3084 + break;
3083 3085 case 1:
3084   - gen_op_mfc0_pagegrain();
3085   - rn = "PageGrain";
3086   - break;
  3086 + gen_op_mfc0_pagegrain();
  3087 + rn = "PageGrain";
  3088 + break;
3087 3089 default:
3088 3090 goto die;
3089 3091 }
... ... @@ -3091,29 +3093,29 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3091 3093 case 6:
3092 3094 switch (sel) {
3093 3095 case 0:
3094   - gen_op_mfc0_wired();
3095   - rn = "Wired";
3096   - break;
  3096 + gen_op_mfc0_wired();
  3097 + rn = "Wired";
  3098 + break;
3097 3099 case 1:
3098   -// gen_op_dmfc0_srsconf0(); /* shadow registers */
3099   - rn = "SRSConf0";
3100   -// break;
  3100 +// gen_op_dmfc0_srsconf0(); /* shadow registers */
  3101 + rn = "SRSConf0";
  3102 +// break;
3101 3103 case 2:
3102   -// gen_op_dmfc0_srsconf1(); /* shadow registers */
3103   - rn = "SRSConf1";
3104   -// break;
  3104 +// gen_op_dmfc0_srsconf1(); /* shadow registers */
  3105 + rn = "SRSConf1";
  3106 +// break;
3105 3107 case 3:
3106   -// gen_op_dmfc0_srsconf2(); /* shadow registers */
3107   - rn = "SRSConf2";
3108   -// break;
  3108 +// gen_op_dmfc0_srsconf2(); /* shadow registers */
  3109 + rn = "SRSConf2";
  3110 +// break;
3109 3111 case 4:
3110   -// gen_op_dmfc0_srsconf3(); /* shadow registers */
3111   - rn = "SRSConf3";
3112   -// break;
  3112 +// gen_op_dmfc0_srsconf3(); /* shadow registers */
  3113 + rn = "SRSConf3";
  3114 +// break;
3113 3115 case 5:
3114   -// gen_op_dmfc0_srsconf4(); /* shadow registers */
3115   - rn = "SRSConf4";
3116   -// break;
  3116 +// gen_op_dmfc0_srsconf4(); /* shadow registers */
  3117 + rn = "SRSConf4";
  3118 +// break;
3117 3119 default:
3118 3120 goto die;
3119 3121 }
... ... @@ -3121,9 +3123,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3121 3123 case 7:
3122 3124 switch (sel) {
3123 3125 case 0:
3124   - gen_op_mfc0_hwrena();
3125   - rn = "HWREna";
3126   - break;
  3126 + gen_op_mfc0_hwrena();
  3127 + rn = "HWREna";
  3128 + break;
3127 3129 default:
3128 3130 goto die;
3129 3131 }
... ... @@ -3131,9 +3133,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3131 3133 case 8:
3132 3134 switch (sel) {
3133 3135 case 0:
3134   - gen_op_dmfc0_badvaddr();
3135   - rn = "BadVaddr";
3136   - break;
  3136 + gen_op_dmfc0_badvaddr();
  3137 + rn = "BadVaddr";
  3138 + break;
3137 3139 default:
3138 3140 goto die;
3139 3141 }
... ... @@ -3141,10 +3143,10 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3141 3143 case 9:
3142 3144 switch (sel) {
3143 3145 case 0:
3144   - gen_op_mfc0_count();
3145   - rn = "Count";
3146   - break;
3147   - /* 6,7 are implementation dependent */
  3146 + gen_op_mfc0_count();
  3147 + rn = "Count";
  3148 + break;
  3149 + /* 6,7 are implementation dependent */
3148 3150 default:
3149 3151 goto die;
3150 3152 }
... ... @@ -3152,9 +3154,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3152 3154 case 10:
3153 3155 switch (sel) {
3154 3156 case 0:
3155   - gen_op_dmfc0_entryhi();
3156   - rn = "EntryHi";
3157   - break;
  3157 + gen_op_dmfc0_entryhi();
  3158 + rn = "EntryHi";
  3159 + break;
3158 3160 default:
3159 3161 goto die;
3160 3162 }
... ... @@ -3162,9 +3164,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3162 3164 case 11:
3163 3165 switch (sel) {
3164 3166 case 0:
3165   - gen_op_mfc0_compare();
3166   - rn = "Compare";
3167   - break;
  3167 + gen_op_mfc0_compare();
  3168 + rn = "Compare";
  3169 + break;
3168 3170 /* 6,7 are implementation dependent */
3169 3171 default:
3170 3172 goto die;
... ... @@ -3173,21 +3175,21 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3173 3175 case 12:
3174 3176 switch (sel) {
3175 3177 case 0:
3176   - gen_op_mfc0_status();
3177   - rn = "Status";
3178   - break;
  3178 + gen_op_mfc0_status();
  3179 + rn = "Status";
  3180 + break;
3179 3181 case 1:
3180   - gen_op_mfc0_intctl();
3181   - rn = "IntCtl";
3182   - break;
  3182 + gen_op_mfc0_intctl();
  3183 + rn = "IntCtl";
  3184 + break;
3183 3185 case 2:
3184   - gen_op_mfc0_srsctl();
3185   - rn = "SRSCtl";
3186   - break;
  3186 + gen_op_mfc0_srsctl();
  3187 + rn = "SRSCtl";
  3188 + break;
3187 3189 case 3:
3188   - gen_op_mfc0_srsmap(); /* shadow registers */
3189   - rn = "SRSMap";
3190   - break;
  3190 + gen_op_mfc0_srsmap(); /* shadow registers */
  3191 + rn = "SRSMap";
  3192 + break;
3191 3193 default:
3192 3194 goto die;
3193 3195 }
... ... @@ -3195,9 +3197,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3195 3197 case 13:
3196 3198 switch (sel) {
3197 3199 case 0:
3198   - gen_op_mfc0_cause();
3199   - rn = "Cause";
3200   - break;
  3200 + gen_op_mfc0_cause();
  3201 + rn = "Cause";
  3202 + break;
3201 3203 default:
3202 3204 goto die;
3203 3205 }
... ... @@ -3205,9 +3207,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3205 3207 case 14:
3206 3208 switch (sel) {
3207 3209 case 0:
3208   - gen_op_dmfc0_epc();
3209   - rn = "EPC";
3210   - break;
  3210 + gen_op_dmfc0_epc();
  3211 + rn = "EPC";
  3212 + break;
3211 3213 default:
3212 3214 goto die;
3213 3215 }
... ... @@ -3215,13 +3217,13 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3215 3217 case 15:
3216 3218 switch (sel) {
3217 3219 case 0:
3218   - gen_op_mfc0_prid();
3219   - rn = "PRid";
3220   - break;
  3220 + gen_op_mfc0_prid();
  3221 + rn = "PRid";
  3222 + break;
3221 3223 case 1:
3222   - gen_op_mfc0_ebase();
3223   - rn = "EBase";
3224   - break;
  3224 + gen_op_mfc0_ebase();
  3225 + rn = "EBase";
  3226 + break;
3225 3227 default:
3226 3228 goto die;
3227 3229 }
... ... @@ -3229,19 +3231,19 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3229 3231 case 16:
3230 3232 switch (sel) {
3231 3233 case 0:
3232   - gen_op_mfc0_config0();
  3234 + gen_op_mfc0_config0();
3233 3235 rn = "Config";
3234 3236 break;
3235 3237 case 1:
3236   - gen_op_mfc0_config1();
  3238 + gen_op_mfc0_config1();
3237 3239 rn = "Config1";
3238 3240 break;
3239 3241 case 2:
3240   - gen_op_mfc0_config2();
  3242 + gen_op_mfc0_config2();
3241 3243 rn = "Config2";
3242 3244 break;
3243 3245 case 3:
3244   - gen_op_mfc0_config3();
  3246 + gen_op_mfc0_config3();
3245 3247 rn = "Config3";
3246 3248 break;
3247 3249 /* 6,7 are implementation dependent */
... ... @@ -3252,9 +3254,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3252 3254 case 17:
3253 3255 switch (sel) {
3254 3256 case 0:
3255   - gen_op_dmfc0_lladdr();
3256   - rn = "LLAddr";
3257   - break;
  3257 + gen_op_dmfc0_lladdr();
  3258 + rn = "LLAddr";
  3259 + break;
3258 3260 default:
3259 3261 goto die;
3260 3262 }
... ... @@ -3262,37 +3264,37 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3262 3264 case 18:
3263 3265 switch (sel) {
3264 3266 case 0:
3265   - gen_op_dmfc0_watchlo0();
3266   - rn = "WatchLo";
3267   - break;
  3267 + gen_op_dmfc0_watchlo0();
  3268 + rn = "WatchLo";
  3269 + break;
3268 3270 case 1:
3269   -// gen_op_dmfc0_watchlo1();
3270   - rn = "WatchLo1";
3271   -// break;
  3271 +// gen_op_dmfc0_watchlo1();
  3272 + rn = "WatchLo1";
  3273 +// break;
3272 3274 case 2:
3273   -// gen_op_dmfc0_watchlo2();
3274   - rn = "WatchLo2";
3275   -// break;
  3275 +// gen_op_dmfc0_watchlo2();
  3276 + rn = "WatchLo2";
  3277 +// break;
3276 3278 case 3:
3277   -// gen_op_dmfc0_watchlo3();
3278   - rn = "WatchLo3";
3279   -// break;
  3279 +// gen_op_dmfc0_watchlo3();
  3280 + rn = "WatchLo3";
  3281 +// break;
3280 3282 case 4:
3281   -// gen_op_dmfc0_watchlo4();
3282   - rn = "WatchLo4";
3283   -// break;
  3283 +// gen_op_dmfc0_watchlo4();
  3284 + rn = "WatchLo4";
  3285 +// break;
3284 3286 case 5:
3285   -// gen_op_dmfc0_watchlo5();
3286   - rn = "WatchLo5";
3287   -// break;
  3287 +// gen_op_dmfc0_watchlo5();
  3288 + rn = "WatchLo5";
  3289 +// break;
3288 3290 case 6:
3289   -// gen_op_dmfc0_watchlo6();
3290   - rn = "WatchLo6";
3291   -// break;
  3291 +// gen_op_dmfc0_watchlo6();
  3292 + rn = "WatchLo6";
  3293 +// break;
3292 3294 case 7:
3293   -// gen_op_dmfc0_watchlo7();
3294   - rn = "WatchLo7";
3295   -// break;
  3295 +// gen_op_dmfc0_watchlo7();
  3296 + rn = "WatchLo7";
  3297 +// break;
3296 3298 default:
3297 3299 goto die;
3298 3300 }
... ... @@ -3300,37 +3302,37 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3300 3302 case 19:
3301 3303 switch (sel) {
3302 3304 case 0:
3303   - gen_op_mfc0_watchhi0();
3304   - rn = "WatchHi";
3305   - break;
  3305 + gen_op_mfc0_watchhi0();
  3306 + rn = "WatchHi";
  3307 + break;
3306 3308 case 1:
3307   -// gen_op_mfc0_watchhi1();
3308   - rn = "WatchHi1";
3309   -// break;
  3309 +// gen_op_mfc0_watchhi1();
  3310 + rn = "WatchHi1";
  3311 +// break;
3310 3312 case 2:
3311   -// gen_op_mfc0_watchhi2();
3312   - rn = "WatchHi2";
3313   -// break;
  3313 +// gen_op_mfc0_watchhi2();
  3314 + rn = "WatchHi2";
  3315 +// break;
3314 3316 case 3:
3315   -// gen_op_mfc0_watchhi3();
3316   - rn = "WatchHi3";
3317   -// break;
  3317 +// gen_op_mfc0_watchhi3();
  3318 + rn = "WatchHi3";
  3319 +// break;
3318 3320 case 4:
3319   -// gen_op_mfc0_watchhi4();
3320   - rn = "WatchHi4";
3321   -// break;
  3321 +// gen_op_mfc0_watchhi4();
  3322 + rn = "WatchHi4";
  3323 +// break;
3322 3324 case 5:
3323   -// gen_op_mfc0_watchhi5();
3324   - rn = "WatchHi5";
3325   -// break;
  3325 +// gen_op_mfc0_watchhi5();
  3326 + rn = "WatchHi5";
  3327 +// break;
3326 3328 case 6:
3327   -// gen_op_mfc0_watchhi6();
3328   - rn = "WatchHi6";
3329   -// break;
  3329 +// gen_op_mfc0_watchhi6();
  3330 + rn = "WatchHi6";
  3331 +// break;
3330 3332 case 7:
3331   -// gen_op_mfc0_watchhi7();
3332   - rn = "WatchHi7";
3333   -// break;
  3333 +// gen_op_mfc0_watchhi7();
  3334 + rn = "WatchHi7";
  3335 +// break;
3334 3336 default:
3335 3337 goto die;
3336 3338 }
... ... @@ -3338,10 +3340,10 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3338 3340 case 20:
3339 3341 switch (sel) {
3340 3342 case 0:
3341   - /* 64 bit MMU only */
3342   - gen_op_dmfc0_xcontext();
3343   - rn = "XContext";
3344   - break;
  3343 + /* 64 bit MMU only */
  3344 + gen_op_dmfc0_xcontext();
  3345 + rn = "XContext";
  3346 + break;
3345 3347 default:
3346 3348 goto die;
3347 3349 }
... ... @@ -3350,39 +3352,39 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3350 3352 /* Officially reserved, but sel 0 is used for R1x000 framemask */
3351 3353 switch (sel) {
3352 3354 case 0:
3353   - gen_op_mfc0_framemask();
3354   - rn = "Framemask";
3355   - break;
  3355 + gen_op_mfc0_framemask();
  3356 + rn = "Framemask";
  3357 + break;
3356 3358 default:
3357 3359 goto die;
3358 3360 }
3359 3361 break;
3360 3362 case 22:
3361   - /* ignored */
3362   - rn = "'Diagnostic"; /* implementation dependent */
3363   - break;
  3363 + /* ignored */
  3364 + rn = "'Diagnostic"; /* implementation dependent */
  3365 + break;
3364 3366 case 23:
3365 3367 switch (sel) {
3366 3368 case 0:
3367   - gen_op_mfc0_debug(); /* EJTAG support */
3368   - rn = "Debug";
3369   - break;
  3369 + gen_op_mfc0_debug(); /* EJTAG support */
  3370 + rn = "Debug";
  3371 + break;
3370 3372 case 1:
3371   -// gen_op_dmfc0_tracecontrol(); /* PDtrace support */
3372   - rn = "TraceControl";
3373   -// break;
  3373 +// gen_op_dmfc0_tracecontrol(); /* PDtrace support */
  3374 + rn = "TraceControl";
  3375 +// break;
3374 3376 case 2:
3375   -// gen_op_dmfc0_tracecontrol2(); /* PDtrace support */
3376   - rn = "TraceControl2";
3377   -// break;
  3377 +// gen_op_dmfc0_tracecontrol2(); /* PDtrace support */
  3378 + rn = "TraceControl2";
  3379 +// break;
3378 3380 case 3:
3379   -// gen_op_dmfc0_usertracedata(); /* PDtrace support */
3380   - rn = "UserTraceData";
3381   -// break;
  3381 +// gen_op_dmfc0_usertracedata(); /* PDtrace support */
  3382 + rn = "UserTraceData";
  3383 +// break;
3382 3384 case 4:
3383   -// gen_op_dmfc0_debug(); /* PDtrace support */
3384   - rn = "TraceBPC";
3385   -// break;
  3385 +// gen_op_dmfc0_debug(); /* PDtrace support */
  3386 + rn = "TraceBPC";
  3387 +// break;
3386 3388 default:
3387 3389 goto die;
3388 3390 }
... ... @@ -3390,9 +3392,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3390 3392 case 24:
3391 3393 switch (sel) {
3392 3394 case 0:
3393   - gen_op_dmfc0_depc(); /* EJTAG support */
3394   - rn = "DEPC";
3395   - break;
  3395 + gen_op_dmfc0_depc(); /* EJTAG support */
  3396 + rn = "DEPC";
  3397 + break;
3396 3398 default:
3397 3399 goto die;
3398 3400 }
... ... @@ -3400,37 +3402,37 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3400 3402 case 25:
3401 3403 switch (sel) {
3402 3404 case 0:
3403   - gen_op_mfc0_performance0();
3404   - rn = "Performance0";
  3405 + gen_op_mfc0_performance0();
  3406 + rn = "Performance0";
3405 3407 break;
3406 3408 case 1:
3407   -// gen_op_dmfc0_performance1();
3408   - rn = "Performance1";
3409   -// break;
  3409 +// gen_op_dmfc0_performance1();
  3410 + rn = "Performance1";
  3411 +// break;
3410 3412 case 2:
3411   -// gen_op_dmfc0_performance2();
3412   - rn = "Performance2";
3413   -// break;
  3413 +// gen_op_dmfc0_performance2();
  3414 + rn = "Performance2";
  3415 +// break;
3414 3416 case 3:
3415   -// gen_op_dmfc0_performance3();
3416   - rn = "Performance3";
3417   -// break;
  3417 +// gen_op_dmfc0_performance3();
  3418 + rn = "Performance3";
  3419 +// break;
3418 3420 case 4:
3419   -// gen_op_dmfc0_performance4();
3420   - rn = "Performance4";
3421   -// break;
  3421 +// gen_op_dmfc0_performance4();
  3422 + rn = "Performance4";
  3423 +// break;
3422 3424 case 5:
3423   -// gen_op_dmfc0_performance5();
3424   - rn = "Performance5";
3425   -// break;
  3425 +// gen_op_dmfc0_performance5();
  3426 + rn = "Performance5";
  3427 +// break;
3426 3428 case 6:
3427   -// gen_op_dmfc0_performance6();
3428   - rn = "Performance6";
3429   -// break;
  3429 +// gen_op_dmfc0_performance6();
  3430 + rn = "Performance6";
  3431 +// break;
3430 3432 case 7:
3431   -// gen_op_dmfc0_performance7();
3432   - rn = "Performance7";
3433   -// break;
  3433 +// gen_op_dmfc0_performance7();
  3434 + rn = "Performance7";
  3435 +// break;
3434 3436 default:
3435 3437 goto die;
3436 3438 }
... ... @@ -3442,8 +3444,8 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3442 3444 switch (sel) {
3443 3445 /* ignored */
3444 3446 case 0 ... 3:
3445   - rn = "CacheErr";
3446   - break;
  3447 + rn = "CacheErr";
  3448 + break;
3447 3449 default:
3448 3450 goto die;
3449 3451 }
... ... @@ -3491,9 +3493,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3491 3493 case 30:
3492 3494 switch (sel) {
3493 3495 case 0:
3494   - gen_op_dmfc0_errorepc();
3495   - rn = "ErrorEPC";
3496   - break;
  3496 + gen_op_dmfc0_errorepc();
  3497 + rn = "ErrorEPC";
  3498 + break;
3497 3499 default:
3498 3500 goto die;
3499 3501 }
... ... @@ -3501,9 +3503,9 @@ static void gen_dmfc0 (DisasContext *ctx, int reg, int sel)
3501 3503 case 31:
3502 3504 switch (sel) {
3503 3505 case 0:
3504   - gen_op_mfc0_desave(); /* EJTAG support */
3505   - rn = "DESAVE";
3506   - break;
  3506 + gen_op_mfc0_desave(); /* EJTAG support */
  3507 + rn = "DESAVE";
  3508 + break;
3507 3509 default:
3508 3510 goto die;
3509 3511 }
... ... @@ -3541,17 +3543,17 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3541 3543 rn = "Index";
3542 3544 break;
3543 3545 case 1:
3544   -// gen_op_dmtc0_mvpcontrol(); /* MT ASE */
  3546 +// gen_op_dmtc0_mvpcontrol(); /* MT ASE */
3545 3547 rn = "MVPControl";
3546   -// break;
  3548 +// break;
3547 3549 case 2:
3548   -// gen_op_dmtc0_mvpconf0(); /* MT ASE */
  3550 +// gen_op_dmtc0_mvpconf0(); /* MT ASE */
3549 3551 rn = "MVPConf0";
3550   -// break;
  3552 +// break;
3551 3553 case 3:
3552   -// gen_op_dmtc0_mvpconf1(); /* MT ASE */
  3554 +// gen_op_dmtc0_mvpconf1(); /* MT ASE */
3553 3555 rn = "MVPConf1";
3554   -// break;
  3556 +// break;
3555 3557 default:
3556 3558 goto die;
3557 3559 }
... ... @@ -3559,37 +3561,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3559 3561 case 1:
3560 3562 switch (sel) {
3561 3563 case 0:
3562   - /* ignored */
  3564 + /* ignored */
3563 3565 rn = "Random";
3564   - break;
  3566 + break;
3565 3567 case 1:
3566   -// gen_op_dmtc0_vpecontrol(); /* MT ASE */
  3568 +// gen_op_dmtc0_vpecontrol(); /* MT ASE */
3567 3569 rn = "VPEControl";
3568   -// break;
  3570 +// break;
3569 3571 case 2:
3570   -// gen_op_dmtc0_vpeconf0(); /* MT ASE */
  3572 +// gen_op_dmtc0_vpeconf0(); /* MT ASE */
3571 3573 rn = "VPEConf0";
3572   -// break;
  3574 +// break;
3573 3575 case 3:
3574   -// gen_op_dmtc0_vpeconf1(); /* MT ASE */
  3576 +// gen_op_dmtc0_vpeconf1(); /* MT ASE */
3575 3577 rn = "VPEConf1";
3576   -// break;
  3578 +// break;
3577 3579 case 4:
3578   -// gen_op_dmtc0_YQMask(); /* MT ASE */
  3580 +// gen_op_dmtc0_YQMask(); /* MT ASE */
3579 3581 rn = "YQMask";
3580   -// break;
  3582 +// break;
3581 3583 case 5:
3582   -// gen_op_dmtc0_vpeschedule(); /* MT ASE */
  3584 +// gen_op_dmtc0_vpeschedule(); /* MT ASE */
3583 3585 rn = "VPESchedule";
3584   -// break;
  3586 +// break;
3585 3587 case 6:
3586   -// gen_op_dmtc0_vpeschefback(); /* MT ASE */
  3588 +// gen_op_dmtc0_vpeschefback(); /* MT ASE */
3587 3589 rn = "VPEScheFBack";
3588   -// break;
  3590 +// break;
3589 3591 case 7:
3590   -// gen_op_dmtc0_vpeopt(); /* MT ASE */
  3592 +// gen_op_dmtc0_vpeopt(); /* MT ASE */
3591 3593 rn = "VPEOpt";
3592   -// break;
  3594 +// break;
3593 3595 default:
3594 3596 goto die;
3595 3597 }
... ... @@ -3597,37 +3599,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3597 3599 case 2:
3598 3600 switch (sel) {
3599 3601 case 0:
3600   - gen_op_dmtc0_entrylo0();
3601   - rn = "EntryLo0";
3602   - break;
  3602 + gen_op_dmtc0_entrylo0();
  3603 + rn = "EntryLo0";
  3604 + break;
3603 3605 case 1:
3604   -// gen_op_dmtc0_tcstatus(); /* MT ASE */
3605   - rn = "TCStatus";
3606   -// break;
  3606 +// gen_op_dmtc0_tcstatus(); /* MT ASE */
  3607 + rn = "TCStatus";
  3608 +// break;
3607 3609 case 2:
3608   -// gen_op_dmtc0_tcbind(); /* MT ASE */
3609   - rn = "TCBind";
3610   -// break;
  3610 +// gen_op_dmtc0_tcbind(); /* MT ASE */
  3611 + rn = "TCBind";
  3612 +// break;
3611 3613 case 3:
3612   -// gen_op_dmtc0_tcrestart(); /* MT ASE */
3613   - rn = "TCRestart";
3614   -// break;
  3614 +// gen_op_dmtc0_tcrestart(); /* MT ASE */
  3615 + rn = "TCRestart";
  3616 +// break;
3615 3617 case 4:
3616   -// gen_op_dmtc0_tchalt(); /* MT ASE */
3617   - rn = "TCHalt";
3618   -// break;
  3618 +// gen_op_dmtc0_tchalt(); /* MT ASE */
  3619 + rn = "TCHalt";
  3620 +// break;
3619 3621 case 5:
3620   -// gen_op_dmtc0_tccontext(); /* MT ASE */
3621   - rn = "TCContext";
3622   -// break;
  3622 +// gen_op_dmtc0_tccontext(); /* MT ASE */
  3623 + rn = "TCContext";
  3624 +// break;
3623 3625 case 6:
3624   -// gen_op_dmtc0_tcschedule(); /* MT ASE */
3625   - rn = "TCSchedule";
3626   -// break;
  3626 +// gen_op_dmtc0_tcschedule(); /* MT ASE */
  3627 + rn = "TCSchedule";
  3628 +// break;
3627 3629 case 7:
3628   -// gen_op_dmtc0_tcschefback(); /* MT ASE */
3629   - rn = "TCScheFBack";
3630   -// break;
  3630 +// gen_op_dmtc0_tcschefback(); /* MT ASE */
  3631 + rn = "TCScheFBack";
  3632 +// break;
3631 3633 default:
3632 3634 goto die;
3633 3635 }
... ... @@ -3635,9 +3637,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3635 3637 case 3:
3636 3638 switch (sel) {
3637 3639 case 0:
3638   - gen_op_dmtc0_entrylo1();
3639   - rn = "EntryLo1";
3640   - break;
  3640 + gen_op_dmtc0_entrylo1();
  3641 + rn = "EntryLo1";
  3642 + break;
3641 3643 default:
3642 3644 goto die;
3643 3645 }
... ... @@ -3645,13 +3647,13 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3645 3647 case 4:
3646 3648 switch (sel) {
3647 3649 case 0:
3648   - gen_op_dmtc0_context();
3649   - rn = "Context";
3650   - break;
  3650 + gen_op_dmtc0_context();
  3651 + rn = "Context";
  3652 + break;
3651 3653 case 1:
3652   -// gen_op_dmtc0_contextconfig(); /* SmartMIPS ASE */
3653   - rn = "ContextConfig";
3654   -// break;
  3654 +// gen_op_dmtc0_contextconfig(); /* SmartMIPS ASE */
  3655 + rn = "ContextConfig";
  3656 +// break;
3655 3657 default:
3656 3658 goto die;
3657 3659 }
... ... @@ -3659,13 +3661,13 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3659 3661 case 5:
3660 3662 switch (sel) {
3661 3663 case 0:
3662   - gen_op_mtc0_pagemask();
3663   - rn = "PageMask";
3664   - break;
  3664 + gen_op_mtc0_pagemask();
  3665 + rn = "PageMask";
  3666 + break;
3665 3667 case 1:
3666   - gen_op_mtc0_pagegrain();
3667   - rn = "PageGrain";
3668   - break;
  3668 + gen_op_mtc0_pagegrain();
  3669 + rn = "PageGrain";
  3670 + break;
3669 3671 default:
3670 3672 goto die;
3671 3673 }
... ... @@ -3673,29 +3675,29 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3673 3675 case 6:
3674 3676 switch (sel) {
3675 3677 case 0:
3676   - gen_op_mtc0_wired();
3677   - rn = "Wired";
3678   - break;
  3678 + gen_op_mtc0_wired();
  3679 + rn = "Wired";
  3680 + break;
3679 3681 case 1:
3680   -// gen_op_dmtc0_srsconf0(); /* shadow registers */
3681   - rn = "SRSConf0";
3682   -// break;
  3682 +// gen_op_dmtc0_srsconf0(); /* shadow registers */
  3683 + rn = "SRSConf0";
  3684 +// break;
3683 3685 case 2:
3684   -// gen_op_dmtc0_srsconf1(); /* shadow registers */
3685   - rn = "SRSConf1";
3686   -// break;
  3686 +// gen_op_dmtc0_srsconf1(); /* shadow registers */
  3687 + rn = "SRSConf1";
  3688 +// break;
3687 3689 case 3:
3688   -// gen_op_dmtc0_srsconf2(); /* shadow registers */
3689   - rn = "SRSConf2";
3690   -// break;
  3690 +// gen_op_dmtc0_srsconf2(); /* shadow registers */
  3691 + rn = "SRSConf2";
  3692 +// break;
3691 3693 case 4:
3692   -// gen_op_dmtc0_srsconf3(); /* shadow registers */
3693   - rn = "SRSConf3";
3694   -// break;
  3694 +// gen_op_dmtc0_srsconf3(); /* shadow registers */
  3695 + rn = "SRSConf3";
  3696 +// break;
3695 3697 case 5:
3696   -// gen_op_dmtc0_srsconf4(); /* shadow registers */
3697   - rn = "SRSConf4";
3698   -// break;
  3698 +// gen_op_dmtc0_srsconf4(); /* shadow registers */
  3699 + rn = "SRSConf4";
  3700 +// break;
3699 3701 default:
3700 3702 goto die;
3701 3703 }
... ... @@ -3703,9 +3705,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3703 3705 case 7:
3704 3706 switch (sel) {
3705 3707 case 0:
3706   - gen_op_mtc0_hwrena();
3707   - rn = "HWREna";
3708   - break;
  3708 + gen_op_mtc0_hwrena();
  3709 + rn = "HWREna";
  3710 + break;
3709 3711 default:
3710 3712 goto die;
3711 3713 }
... ... @@ -3717,9 +3719,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3717 3719 case 9:
3718 3720 switch (sel) {
3719 3721 case 0:
3720   - gen_op_mtc0_count();
3721   - rn = "Count";
3722   - break;
  3722 + gen_op_mtc0_count();
  3723 + rn = "Count";
  3724 + break;
3723 3725 /* 6,7 are implementation dependent */
3724 3726 default:
3725 3727 goto die;
... ... @@ -3730,9 +3732,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3730 3732 case 10:
3731 3733 switch (sel) {
3732 3734 case 0:
3733   - gen_op_mtc0_entryhi();
3734   - rn = "EntryHi";
3735   - break;
  3735 + gen_op_mtc0_entryhi();
  3736 + rn = "EntryHi";
  3737 + break;
3736 3738 default:
3737 3739 goto die;
3738 3740 }
... ... @@ -3740,9 +3742,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3740 3742 case 11:
3741 3743 switch (sel) {
3742 3744 case 0:
3743   - gen_op_mtc0_compare();
3744   - rn = "Compare";
3745   - break;
  3745 + gen_op_mtc0_compare();
  3746 + rn = "Compare";
  3747 + break;
3746 3748 /* 6,7 are implementation dependent */
3747 3749 default:
3748 3750 goto die;
... ... @@ -3753,22 +3755,22 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3753 3755 case 12:
3754 3756 switch (sel) {
3755 3757 case 0:
3756   - gen_op_mtc0_status();
3757   - rn = "Status";
3758   - break;
  3758 + gen_op_mtc0_status();
  3759 + rn = "Status";
  3760 + break;
3759 3761 case 1:
3760   - gen_op_mtc0_intctl();
3761   - rn = "IntCtl";
3762   - break;
  3762 + gen_op_mtc0_intctl();
  3763 + rn = "IntCtl";
  3764 + break;
3763 3765 case 2:
3764   - gen_op_mtc0_srsctl();
3765   - rn = "SRSCtl";
3766   - break;
  3766 + gen_op_mtc0_srsctl();
  3767 + rn = "SRSCtl";
  3768 + break;
3767 3769 case 3:
3768   - gen_op_mtc0_srsmap(); /* shadow registers */
3769   - rn = "SRSMap";
3770   - break;
3771   - default:
  3770 + gen_op_mtc0_srsmap(); /* shadow registers */
  3771 + rn = "SRSMap";
  3772 + break;
  3773 + default:
3772 3774 goto die;
3773 3775 }
3774 3776 /* Stop translation as we may have switched the execution mode */
... ... @@ -3777,9 +3779,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3777 3779 case 13:
3778 3780 switch (sel) {
3779 3781 case 0:
3780   - gen_op_mtc0_cause();
3781   - rn = "Cause";
3782   - break;
  3782 + gen_op_mtc0_cause();
  3783 + rn = "Cause";
  3784 + break;
3783 3785 default:
3784 3786 goto die;
3785 3787 }
... ... @@ -3789,9 +3791,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3789 3791 case 14:
3790 3792 switch (sel) {
3791 3793 case 0:
3792   - gen_op_dmtc0_epc();
3793   - rn = "EPC";
3794   - break;
  3794 + gen_op_dmtc0_epc();
  3795 + rn = "EPC";
  3796 + break;
3795 3797 default:
3796 3798 goto die;
3797 3799 }
... ... @@ -3799,13 +3801,13 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3799 3801 case 15:
3800 3802 switch (sel) {
3801 3803 case 0:
3802   - /* ignored */
3803   - rn = "PRid";
3804   - break;
  3804 + /* ignored */
  3805 + rn = "PRid";
  3806 + break;
3805 3807 case 1:
3806   - gen_op_mtc0_ebase();
3807   - rn = "EBase";
3808   - break;
  3808 + gen_op_mtc0_ebase();
  3809 + rn = "EBase";
  3810 + break;
3809 3811 default:
3810 3812 goto die;
3811 3813 }
... ... @@ -3815,17 +3817,21 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3815 3817 case 0:
3816 3818 gen_op_mtc0_config0();
3817 3819 rn = "Config";
  3820 + /* Stop translation as we may have switched the execution mode */
  3821 + ctx->bstate = BS_STOP;
3818 3822 break;
3819 3823 case 1:
3820   - /* ignored */
  3824 + /* ignored */
3821 3825 rn = "Config1";
3822 3826 break;
3823 3827 case 2:
3824 3828 gen_op_mtc0_config2();
3825 3829 rn = "Config2";
  3830 + /* Stop translation as we may have switched the execution mode */
  3831 + ctx->bstate = BS_STOP;
3826 3832 break;
3827 3833 case 3:
3828   - /* ignored */
  3834 + /* ignored */
3829 3835 rn = "Config3";
3830 3836 break;
3831 3837 /* 6,7 are implementation dependent */
... ... @@ -3833,15 +3839,13 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3833 3839 rn = "Invalid config selector";
3834 3840 goto die;
3835 3841 }
3836   - /* Stop translation as we may have switched the execution mode */
3837   - ctx->bstate = BS_STOP;
3838 3842 break;
3839 3843 case 17:
3840 3844 switch (sel) {
3841 3845 case 0:
3842   - /* ignored */
3843   - rn = "LLAddr";
3844   - break;
  3846 + /* ignored */
  3847 + rn = "LLAddr";
  3848 + break;
3845 3849 default:
3846 3850 goto die;
3847 3851 }
... ... @@ -3849,37 +3853,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3849 3853 case 18:
3850 3854 switch (sel) {
3851 3855 case 0:
3852   - gen_op_dmtc0_watchlo0();
3853   - rn = "WatchLo";
3854   - break;
  3856 + gen_op_dmtc0_watchlo0();
  3857 + rn = "WatchLo";
  3858 + break;
3855 3859 case 1:
3856   -// gen_op_dmtc0_watchlo1();
3857   - rn = "WatchLo1";
3858   -// break;
  3860 +// gen_op_dmtc0_watchlo1();
  3861 + rn = "WatchLo1";
  3862 +// break;
3859 3863 case 2:
3860   -// gen_op_dmtc0_watchlo2();
3861   - rn = "WatchLo2";
3862   -// break;
  3864 +// gen_op_dmtc0_watchlo2();
  3865 + rn = "WatchLo2";
  3866 +// break;
3863 3867 case 3:
3864   -// gen_op_dmtc0_watchlo3();
3865   - rn = "WatchLo3";
3866   -// break;
  3868 +// gen_op_dmtc0_watchlo3();
  3869 + rn = "WatchLo3";
  3870 +// break;
3867 3871 case 4:
3868   -// gen_op_dmtc0_watchlo4();
3869   - rn = "WatchLo4";
3870   -// break;
  3872 +// gen_op_dmtc0_watchlo4();
  3873 + rn = "WatchLo4";
  3874 +// break;
3871 3875 case 5:
3872   -// gen_op_dmtc0_watchlo5();
3873   - rn = "WatchLo5";
3874   -// break;
  3876 +// gen_op_dmtc0_watchlo5();
  3877 + rn = "WatchLo5";
  3878 +// break;
3875 3879 case 6:
3876   -// gen_op_dmtc0_watchlo6();
3877   - rn = "WatchLo6";
3878   -// break;
  3880 +// gen_op_dmtc0_watchlo6();
  3881 + rn = "WatchLo6";
  3882 +// break;
3879 3883 case 7:
3880   -// gen_op_dmtc0_watchlo7();
3881   - rn = "WatchLo7";
3882   -// break;
  3884 +// gen_op_dmtc0_watchlo7();
  3885 + rn = "WatchLo7";
  3886 +// break;
3883 3887 default:
3884 3888 goto die;
3885 3889 }
... ... @@ -3887,37 +3891,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3887 3891 case 19:
3888 3892 switch (sel) {
3889 3893 case 0:
3890   - gen_op_mtc0_watchhi0();
3891   - rn = "WatchHi";
3892   - break;
  3894 + gen_op_mtc0_watchhi0();
  3895 + rn = "WatchHi";
  3896 + break;
3893 3897 case 1:
3894   -// gen_op_dmtc0_watchhi1();
3895   - rn = "WatchHi1";
3896   -// break;
  3898 +// gen_op_dmtc0_watchhi1();
  3899 + rn = "WatchHi1";
  3900 +// break;
3897 3901 case 2:
3898   -// gen_op_dmtc0_watchhi2();
3899   - rn = "WatchHi2";
3900   -// break;
  3902 +// gen_op_dmtc0_watchhi2();
  3903 + rn = "WatchHi2";
  3904 +// break;
3901 3905 case 3:
3902   -// gen_op_dmtc0_watchhi3();
3903   - rn = "WatchHi3";
3904   -// break;
  3906 +// gen_op_dmtc0_watchhi3();
  3907 + rn = "WatchHi3";
  3908 +// break;
3905 3909 case 4:
3906   -// gen_op_dmtc0_watchhi4();
3907   - rn = "WatchHi4";
3908   -// break;
  3910 +// gen_op_dmtc0_watchhi4();
  3911 + rn = "WatchHi4";
  3912 +// break;
3909 3913 case 5:
3910   -// gen_op_dmtc0_watchhi5();
3911   - rn = "WatchHi5";
3912   -// break;
  3914 +// gen_op_dmtc0_watchhi5();
  3915 + rn = "WatchHi5";
  3916 +// break;
3913 3917 case 6:
3914   -// gen_op_dmtc0_watchhi6();
3915   - rn = "WatchHi6";
3916   -// break;
  3918 +// gen_op_dmtc0_watchhi6();
  3919 + rn = "WatchHi6";
  3920 +// break;
3917 3921 case 7:
3918   -// gen_op_dmtc0_watchhi7();
3919   - rn = "WatchHi7";
3920   -// break;
  3922 +// gen_op_dmtc0_watchhi7();
  3923 + rn = "WatchHi7";
  3924 +// break;
3921 3925 default:
3922 3926 goto die;
3923 3927 }
... ... @@ -3925,10 +3929,10 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3925 3929 case 20:
3926 3930 switch (sel) {
3927 3931 case 0:
3928   - /* 64 bit MMU only */
3929   - gen_op_dmtc0_xcontext();
3930   - rn = "XContext";
3931   - break;
  3932 + /* 64 bit MMU only */
  3933 + gen_op_dmtc0_xcontext();
  3934 + rn = "XContext";
  3935 + break;
3932 3936 default:
3933 3937 goto die;
3934 3938 }
... ... @@ -3937,9 +3941,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3937 3941 /* Officially reserved, but sel 0 is used for R1x000 framemask */
3938 3942 switch (sel) {
3939 3943 case 0:
3940   - gen_op_mtc0_framemask();
3941   - rn = "Framemask";
3942   - break;
  3944 + gen_op_mtc0_framemask();
  3945 + rn = "Framemask";
  3946 + break;
3943 3947 default:
3944 3948 goto die;
3945 3949 }
... ... @@ -3951,37 +3955,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3951 3955 case 23:
3952 3956 switch (sel) {
3953 3957 case 0:
3954   - gen_op_mtc0_debug(); /* EJTAG support */
3955   - rn = "Debug";
3956   - break;
  3958 + gen_op_mtc0_debug(); /* EJTAG support */
  3959 + rn = "Debug";
  3960 + break;
3957 3961 case 1:
3958   -// gen_op_dmtc0_tracecontrol(); /* PDtrace support */
3959   - rn = "TraceControl";
3960   -// break;
  3962 +// gen_op_dmtc0_tracecontrol(); /* PDtrace support */
  3963 + rn = "TraceControl";
  3964 +// break;
3961 3965 case 2:
3962   -// gen_op_dmtc0_tracecontrol2(); /* PDtrace support */
3963   - rn = "TraceControl2";
3964   -// break;
  3966 +// gen_op_dmtc0_tracecontrol2(); /* PDtrace support */
  3967 + rn = "TraceControl2";
  3968 +// break;
3965 3969 case 3:
3966   -// gen_op_dmtc0_usertracedata(); /* PDtrace support */
3967   - rn = "UserTraceData";
3968   -// break;
  3970 +// gen_op_dmtc0_usertracedata(); /* PDtrace support */
  3971 + rn = "UserTraceData";
  3972 +// break;
3969 3973 case 4:
3970   -// gen_op_dmtc0_debug(); /* PDtrace support */
3971   - rn = "TraceBPC";
3972   -// break;
  3974 +// gen_op_dmtc0_debug(); /* PDtrace support */
  3975 + rn = "TraceBPC";
  3976 +// break;
3973 3977 default:
3974 3978 goto die;
3975 3979 }
3976   - /* Stop translation as we may have switched the execution mode */
3977   - ctx->bstate = BS_STOP;
  3980 + /* Stop translation as we may have switched the execution mode */
  3981 + ctx->bstate = BS_STOP;
3978 3982 break;
3979 3983 case 24:
3980 3984 switch (sel) {
3981 3985 case 0:
3982   - gen_op_dmtc0_depc(); /* EJTAG support */
3983   - rn = "DEPC";
3984   - break;
  3986 + gen_op_dmtc0_depc(); /* EJTAG support */
  3987 + rn = "DEPC";
  3988 + break;
3985 3989 default:
3986 3990 goto die;
3987 3991 }
... ... @@ -3989,37 +3993,37 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
3989 3993 case 25:
3990 3994 switch (sel) {
3991 3995 case 0:
3992   - gen_op_mtc0_performance0();
3993   - rn = "Performance0";
3994   - break;
  3996 + gen_op_mtc0_performance0();
  3997 + rn = "Performance0";
  3998 + break;
3995 3999 case 1:
3996   -// gen_op_dmtc0_performance1();
3997   - rn = "Performance1";
3998   -// break;
  4000 +// gen_op_dmtc0_performance1();
  4001 + rn = "Performance1";
  4002 +// break;
3999 4003 case 2:
4000   -// gen_op_dmtc0_performance2();
4001   - rn = "Performance2";
4002   -// break;
  4004 +// gen_op_dmtc0_performance2();
  4005 + rn = "Performance2";
  4006 +// break;
4003 4007 case 3:
4004   -// gen_op_dmtc0_performance3();
4005   - rn = "Performance3";
4006   -// break;
  4008 +// gen_op_dmtc0_performance3();
  4009 + rn = "Performance3";
  4010 +// break;
4007 4011 case 4:
4008   -// gen_op_dmtc0_performance4();
4009   - rn = "Performance4";
4010   -// break;
  4012 +// gen_op_dmtc0_performance4();
  4013 + rn = "Performance4";
  4014 +// break;
4011 4015 case 5:
4012   -// gen_op_dmtc0_performance5();
4013   - rn = "Performance5";
4014   -// break;
  4016 +// gen_op_dmtc0_performance5();
  4017 + rn = "Performance5";
  4018 +// break;
4015 4019 case 6:
4016   -// gen_op_dmtc0_performance6();
4017   - rn = "Performance6";
4018   -// break;
  4020 +// gen_op_dmtc0_performance6();
  4021 + rn = "Performance6";
  4022 +// break;
4019 4023 case 7:
4020   -// gen_op_dmtc0_performance7();
4021   - rn = "Performance7";
4022   -// break;
  4024 +// gen_op_dmtc0_performance7();
  4025 + rn = "Performance7";
  4026 +// break;
4023 4027 default:
4024 4028 goto die;
4025 4029 }
... ... @@ -4031,9 +4035,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
4031 4035 case 27:
4032 4036 switch (sel) {
4033 4037 case 0 ... 3:
4034   - /* ignored */
4035   - rn = "CacheErr";
4036   - break;
  4038 + /* ignored */
  4039 + rn = "CacheErr";
  4040 + break;
4037 4041 default:
4038 4042 goto die;
4039 4043 }
... ... @@ -4051,7 +4055,7 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
4051 4055 case 3:
4052 4056 case 5:
4053 4057 case 7:
4054   - gen_op_mtc0_datalo();
  4058 + gen_op_mtc0_datalo();
4055 4059 rn = "DataLo";
4056 4060 break;
4057 4061 default:
... ... @@ -4071,7 +4075,7 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
4071 4075 case 3:
4072 4076 case 5:
4073 4077 case 7:
4074   - gen_op_mtc0_datahi();
  4078 + gen_op_mtc0_datahi();
4075 4079 rn = "DataHi";
4076 4080 break;
4077 4081 default:
... ... @@ -4082,9 +4086,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
4082 4086 case 30:
4083 4087 switch (sel) {
4084 4088 case 0:
4085   - gen_op_dmtc0_errorepc();
4086   - rn = "ErrorEPC";
4087   - break;
  4089 + gen_op_dmtc0_errorepc();
  4090 + rn = "ErrorEPC";
  4091 + break;
4088 4092 default:
4089 4093 goto die;
4090 4094 }
... ... @@ -4092,9 +4096,9 @@ static void gen_dmtc0 (DisasContext *ctx, int reg, int sel)
4092 4096 case 31:
4093 4097 switch (sel) {
4094 4098 case 0:
4095   - gen_op_mtc0_desave(); /* EJTAG support */
4096   - rn = "DESAVE";
4097   - break;
  4099 + gen_op_mtc0_desave(); /* EJTAG support */
  4100 + rn = "DESAVE";
  4101 + break;
4098 4102 default:
4099 4103 goto die;
4100 4104 }
... ... @@ -4716,7 +4720,6 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
4716 4720 break;
4717 4721 case OPC_SYSCALL:
4718 4722 generate_exception(ctx, EXCP_SYSCALL);
4719   - ctx->bstate = BS_EXCP;
4720 4723 break;
4721 4724 case OPC_BREAK:
4722 4725 generate_exception(ctx, EXCP_BREAK);
... ...