Commit 1ef4ef4e640cae84d9706a1fbb8f3916a4bc08ab
1 parent
6ba8dcd7
target-alpha: small optimizations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5238 c046a42c-6fe2-441c-8c8c-71466251a162
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2 deletions
target-alpha/translate.c
| ... | ... | @@ -516,7 +516,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
| 516 | 516 | goto invalid_opc; |
| 517 | 517 | case 0x08: |
| 518 | 518 | /* LDA */ |
| 519 | - if (ra != 31) { | |
| 519 | + if (likely(ra != 31)) { | |
| 520 | 520 | if (rb != 31) |
| 521 | 521 | tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16); |
| 522 | 522 | else |
| ... | ... | @@ -525,7 +525,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
| 525 | 525 | break; |
| 526 | 526 | case 0x09: |
| 527 | 527 | /* LDAH */ |
| 528 | - if (ra != 31) { | |
| 528 | + if (likely(ra != 31)) { | |
| 529 | 529 | if (rb != 31) |
| 530 | 530 | tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16 << 16); |
| 531 | 531 | else | ... | ... |