gwj / at91sam9263 · Commits

Commit 1931e26054fdf2b1b84091f0b9662979eb6931ec

Authored by ths
1 parent 647de6ca

Check the Galilleo config register instead of hardcoding the endianness. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3417 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 8 additions and 22 deletions
hw/gt64xxx.c
  View file @1931e26
@@ -306,9 +306,8 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, @@ -306,9 +306,8 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr,
306 GT64120State *s = opaque; 306 GT64120State *s = opaque;
307 uint32_t saddr; 307 uint32_t saddr;
308 308
309 -#ifdef TARGET_WORDS_BIGENDIAN  
310 - val = bswap32(val);  
311 -#endif 309 + if (!(s->regs[GT_PCI0_CMD] & 1))
  310 + val = bswap32(val);
312 311
313 saddr = (addr & 0xfff) >> 2; 312 saddr = (addr & 0xfff) >> 2;
314 switch (saddr) { 313 switch (saddr) {
@@ -528,8 +527,7 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, @@ -528,8 +527,7 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr,
528 s->pci->config_reg = val & 0x80fffffc; 527 s->pci->config_reg = val & 0x80fffffc;
529 break; 528 break;
530 case GT_PCI0_CFGDATA: 529 case GT_PCI0_CFGDATA:
531 - if (s->pci->config_reg & (1u << 31))  
532 - pci_host_data_writel(s->pci, 0, val); 530 + pci_host_data_writel(s->pci, 0, val);
533 break; 531 break;
534 532
535 /* Interrupts */ 533 /* Interrupts */
@@ -585,9 +583,7 @@ static uint32_t gt64120_readl (void *opaque, @@ -585,9 +583,7 @@ static uint32_t gt64120_readl (void *opaque,
585 uint32_t val; 583 uint32_t val;
586 uint32_t saddr; 584 uint32_t saddr;
587 585
588 - val = 0;  
589 saddr = (addr & 0xfff) >> 2; 586 saddr = (addr & 0xfff) >> 2;
590 -  
591 switch (saddr) { 587 switch (saddr) {
592 588
593 /* CPU Configuration */ 589 /* CPU Configuration */
@@ -768,10 +764,7 @@ static uint32_t gt64120_readl (void *opaque, @@ -768,10 +764,7 @@ static uint32_t gt64120_readl (void *opaque,
768 val = s->pci->config_reg; 764 val = s->pci->config_reg;
769 break; 765 break;
770 case GT_PCI0_CFGDATA: 766 case GT_PCI0_CFGDATA:
771 - if (!(s->pci->config_reg & (1u << 31)))  
772 - val = 0xffffffff;  
773 - else  
774 - val = pci_host_data_readl(s->pci, 0); 767 + val = pci_host_data_readl(s->pci, 0);
775 break; 768 break;
776 769
777 case GT_PCI0_CMD: 770 case GT_PCI0_CMD:
@@ -844,9 +837,9 @@ static uint32_t gt64120_readl (void *opaque, @@ -844,9 +837,9 @@ static uint32_t gt64120_readl (void *opaque,
844 break; 837 break;
845 } 838 }
846 839
847 -#ifdef TARGET_WORDS_BIGENDIAN  
848 - val = bswap32(val);  
849 -#endif 840 + if (!(s->regs[GT_PCI0_CMD] & 1))
  841 + val = bswap32(val);
  842 +
850 return val; 843 return val;
851 } 844 }
852 845
@@ -1083,19 +1076,12 @@ void gt64120_reset(void *opaque) @@ -1083,19 +1076,12 @@ void gt64120_reset(void *opaque)
1083 1076
1084 static uint32_t gt64120_read_config(PCIDevice *d, uint32_t address, int len) 1077 static uint32_t gt64120_read_config(PCIDevice *d, uint32_t address, int len)
1085 { 1078 {
1086 - uint32_t val = pci_default_read_config(d, address, len);  
1087 -#ifdef TARGET_WORDS_BIGENDIAN  
1088 - val = bswap32(val);  
1089 -#endif  
1090 - return val; 1079 + return pci_default_read_config(d, address, len);
1091 } 1080 }
1092 1081
1093 static void gt64120_write_config(PCIDevice *d, uint32_t address, uint32_t val, 1082 static void gt64120_write_config(PCIDevice *d, uint32_t address, uint32_t val,
1094 int len) 1083 int len)
1095 { 1084 {
1096 -#ifdef TARGET_WORDS_BIGENDIAN  
1097 - val = bswap32(val);  
1098 -#endif  
1099 pci_default_write_config(d, address, val, len); 1085 pci_default_write_config(d, address, val, len);
1100 } 1086 }
1101 1087