Commit 02ce600c1e485a7da4a26166b5a75b68c6013fe1
1 parent
38641a52
Convert SD cards code to use qemu_irq too.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3671 c046a42c-6fe2-441c-8c8c-71466251a162
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6 changed files
with
22 additions
and
63 deletions
hw/omap_mmc.c
... | ... | @@ -25,7 +25,6 @@ struct omap_mmc_s { |
25 | 25 | target_phys_addr_t base; |
26 | 26 | qemu_irq irq; |
27 | 27 | qemu_irq *dma; |
28 | - qemu_irq handler[2]; | |
29 | 28 | omap_clk clk; |
30 | 29 | SDState *card; |
31 | 30 | uint16_t last_cmd; |
... | ... | @@ -507,22 +506,6 @@ void omap_mmc_reset(struct omap_mmc_s *host) |
507 | 506 | host->transfer = 0; |
508 | 507 | } |
509 | 508 | |
510 | -static void omap_mmc_ro_cb(void *opaque, int level) | |
511 | -{ | |
512 | - struct omap_mmc_s *s = (struct omap_mmc_s *) opaque; | |
513 | - | |
514 | - if (s->handler[0]) | |
515 | - qemu_set_irq(s->handler[0], level); | |
516 | -} | |
517 | - | |
518 | -static void omap_mmc_cover_cb(void *opaque, int level) | |
519 | -{ | |
520 | - struct omap_mmc_s *s = (struct omap_mmc_s *) opaque; | |
521 | - | |
522 | - if (s->handler[1]) | |
523 | - qemu_set_irq(s->handler[1], level); | |
524 | -} | |
525 | - | |
526 | 509 | struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, |
527 | 510 | qemu_irq irq, qemu_irq dma[], omap_clk clk) |
528 | 511 | { |
... | ... | @@ -542,13 +525,10 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base, |
542 | 525 | /* Instantiate the storage */ |
543 | 526 | s->card = sd_init(sd_bdrv); |
544 | 527 | |
545 | - sd_set_cb(s->card, s, omap_mmc_ro_cb, omap_mmc_cover_cb); | |
546 | - | |
547 | 528 | return s; |
548 | 529 | } |
549 | 530 | |
550 | 531 | void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover) |
551 | 532 | { |
552 | - s->handler[0] = ro; | |
553 | - s->handler[1] = cover; | |
533 | + sd_set_cb(s->card, ro, cover); | |
554 | 534 | } | ... | ... |
hw/pxa.h
... | ... | @@ -96,9 +96,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle); |
96 | 96 | struct pxa2xx_mmci_s; |
97 | 97 | struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base, |
98 | 98 | qemu_irq irq, void *dma); |
99 | -void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque, | |
100 | - void (*readonly_cb)(void *, int), | |
101 | - void (*coverswitch_cb)(void *, int)); | |
99 | +void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly, | |
100 | + qemu_irq coverswitch); | |
102 | 101 | |
103 | 102 | /* pxa2xx_pcmcia.c */ |
104 | 103 | struct pxa2xx_pcmcia_s; | ... | ... |
hw/pxa2xx_mmci.c
... | ... | @@ -545,9 +545,8 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base, |
545 | 545 | return s; |
546 | 546 | } |
547 | 547 | |
548 | -void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque, | |
549 | - void (*readonly_cb)(void *, int), | |
550 | - void (*coverswitch_cb)(void *, int)) | |
548 | +void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly, | |
549 | + qemu_irq coverswitch) | |
551 | 550 | { |
552 | - sd_set_cb(s->card, opaque, readonly_cb, coverswitch_cb); | |
551 | + sd_set_cb(s->card, read, coverswitch); | |
553 | 552 | } | ... | ... |
hw/sd.c
... | ... | @@ -90,9 +90,8 @@ struct SDState { |
90 | 90 | uint32_t data_start; |
91 | 91 | uint32_t data_offset; |
92 | 92 | uint8_t data[512]; |
93 | - void (*readonly_cb)(void *, int); | |
94 | - void (*inserted_cb)(void *, int); | |
95 | - void *opaque; | |
93 | + qemu_irq readonly_cb; | |
94 | + qemu_irq inserted_cb; | |
96 | 95 | BlockDriverState *bdrv; |
97 | 96 | }; |
98 | 97 | |
... | ... | @@ -372,6 +371,8 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv) |
372 | 371 | |
373 | 372 | sd->bdrv = bdrv; |
374 | 373 | |
374 | + if (s->wp_groups) | |
375 | + qemu_free(s->wp_groups); | |
375 | 376 | sd->wp_switch = bdrv_is_read_only(bdrv); |
376 | 377 | sd->wp_groups = (int *) qemu_mallocz(sizeof(int) * sect); |
377 | 378 | memset(sd->wp_groups, 0, sizeof(int) * sect); |
... | ... | @@ -386,12 +387,10 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv) |
386 | 387 | static void sd_cardchange(void *opaque) |
387 | 388 | { |
388 | 389 | SDState *sd = opaque; |
389 | - if (sd->inserted_cb) | |
390 | - sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv)); | |
390 | + qemu_set_irq(sd->inserted_cb, bdrv_is_inserted(sd->bdrv)); | |
391 | 391 | if (bdrv_is_inserted(sd->bdrv)) { |
392 | 392 | sd_reset(sd, sd->bdrv); |
393 | - if (sd->readonly_cb) | |
394 | - sd->readonly_cb(sd->opaque, sd->wp_switch); | |
393 | + qemu_set_irq(s->readonly_cb, sd->wp_switch); | |
395 | 394 | } |
396 | 395 | } |
397 | 396 | |
... | ... | @@ -401,21 +400,16 @@ SDState *sd_init(BlockDriverState *bs) |
401 | 400 | |
402 | 401 | sd = (SDState *) qemu_mallocz(sizeof(SDState)); |
403 | 402 | sd_reset(sd, bs); |
403 | + bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd); | |
404 | 404 | return sd; |
405 | 405 | } |
406 | 406 | |
407 | -void sd_set_cb(SDState *sd, void *opaque, | |
408 | - void (*readonly_cb)(void *, int), | |
409 | - void (*inserted_cb)(void *, int)) | |
407 | +void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert) | |
410 | 408 | { |
411 | - sd->opaque = opaque; | |
412 | - sd->readonly_cb = readonly_cb; | |
413 | - sd->inserted_cb = inserted_cb; | |
414 | - if (sd->readonly_cb) | |
415 | - sd->readonly_cb(sd->opaque, bdrv_is_read_only(sd->bdrv)); | |
416 | - if (sd->inserted_cb) | |
417 | - sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv)); | |
418 | - bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd); | |
409 | + sd->readonly_cb = readonly; | |
410 | + sd->inserted_cb = insert; | |
411 | + qemu_set_irq(readonly, bdrv_is_read_only(sd->bdrv)); | |
412 | + qemu_set_irq(insert, bdrv_is_inserted(sd->bdrv)); | |
419 | 413 | } |
420 | 414 | |
421 | 415 | static void sd_erase(SDState *sd) | ... | ... |
hw/sd.h
... | ... | @@ -74,9 +74,7 @@ int sd_do_command(SDState *sd, struct sd_request_s *req, |
74 | 74 | uint8_t *response); |
75 | 75 | void sd_write_data(SDState *sd, uint8_t value); |
76 | 76 | uint8_t sd_read_data(SDState *sd); |
77 | -void sd_set_cb(SDState *sd, void *opaque, | |
78 | - void (*readonly_cb)(void *, int), | |
79 | - void (*inserted_cb)(void *, int)); | |
77 | +void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert); | |
80 | 78 | int sd_data_ready(SDState *sd); |
81 | 79 | |
82 | 80 | #endif /* __hw_sd_h */ | ... | ... |
hw/spitz.c
... | ... | @@ -1069,18 +1069,6 @@ static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
1069 | 1069 | spitz_hsync ^= 1; |
1070 | 1070 | } |
1071 | 1071 | |
1072 | -static void spitz_mmc_coverswitch_change(void *opaque, int in) | |
1073 | -{ | |
1074 | - struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque; | |
1075 | - qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT], in); | |
1076 | -} | |
1077 | - | |
1078 | -static void spitz_mmc_writeprotect_change(void *opaque, int wp) | |
1079 | -{ | |
1080 | - struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque; | |
1081 | - qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], wp); | |
1082 | -} | |
1083 | - | |
1084 | 1072 | static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots) |
1085 | 1073 | { |
1086 | 1074 | qemu_irq lcd_hsync; |
... | ... | @@ -1096,8 +1084,9 @@ static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots) |
1096 | 1084 | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); |
1097 | 1085 | |
1098 | 1086 | /* MMC/SD host */ |
1099 | - pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change, | |
1100 | - spitz_mmc_coverswitch_change); | |
1087 | + pxa2xx_mmci_handlers(cpu->mmc, | |
1088 | + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], | |
1089 | + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]); | |
1101 | 1090 | |
1102 | 1091 | /* Battery lock always closed */ |
1103 | 1092 | qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]); | ... | ... |