gwj / at91sam9263 · Commits

Commit 38641a52f2335c470349c55d9b1679112da99399

Authored by balrog
1 parent 6c41b272

Convert PXA2xx GPIOs and SCOOP GPIOs to a qemu_irq based api (similar to omap, m… 

…ax7310 and s3c gpios).
Convert spitz and gumstix boards to use new api.
Remove now obsolete gpio_handler_t definition.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3670 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 7 changed files with 157 additions and 169 deletions
hw/gumstix.c
  View file @38641a5
... ... @@ -10,13 +10,6 @@
10 10  
11 11 #include "vl.h"
12 12  
13   -static void connex_smc_irq(void *opaque, int line, int level)
14   -{
15   - /* Interrupt line of NIC is connected to GPIO line 36 */
16   - struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
17   - pxa2xx_gpio_set(cpu->gpio, 36, level);
18   -}
19   -
20 13 /* Board init. */
21 14 enum gumstix_model_e { connex };
22 15  
... ... @@ -52,8 +45,9 @@ static void gumstix_common_init(int ram_size, int vga_ram_size,
52 45  
53 46 cpu->env->regs[15] = 0x00000000;
54 47  
55   - qemu_irq *irq = qemu_allocate_irqs(connex_smc_irq, cpu, 1);
56   - smc91c111_init(&nd_table[0], 0x04000300, *irq);
  48 + /* Interrupt line of NIC is connected to GPIO line 36 */
  49 + smc91c111_init(&nd_table[0], 0x04000300,
  50 + pxa2xx_gpio_in_get(cpu->gpio)[36]);
57 51 }
58 52  
59 53 static void connex_init(int ram_size, int vga_ram_size,
... ...
hw/pxa.h
  View file @38641a5
... ... @@ -72,11 +72,10 @@ void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4);
72 72 struct pxa2xx_gpio_info_s;
73 73 struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base,
74 74 CPUState *env, qemu_irq *pic, int lines);
75   -void pxa2xx_gpio_set(struct pxa2xx_gpio_info_s *s, int line, int level);
76   -void pxa2xx_gpio_handler_set(struct pxa2xx_gpio_info_s *s, int line,
77   - gpio_handler_t handler, void *opaque);
78   -void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s,
79   - void (*handler)(void *opaque), void *opaque);
  75 +qemu_irq *pxa2xx_gpio_in_get(struct pxa2xx_gpio_info_s *s);
  76 +void pxa2xx_gpio_out_set(struct pxa2xx_gpio_info_s *s,
  77 + int line, qemu_irq handler);
  78 +void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s, qemu_irq handler);
80 79  
81 80 /* pxa2xx_dma.c */
82 81 struct pxa2xx_dma_state_s;
... ... @@ -90,8 +89,7 @@ void pxa2xx_dma_request(struct pxa2xx_dma_state_s *s, int req_num, int on);
90 89 struct pxa2xx_lcdc_s;
91 90 struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base,
92 91 qemu_irq irq, DisplayState *ds);
93   -void pxa2xx_lcd_vsync_cb(struct pxa2xx_lcdc_s *s,
94   - void (*cb)(void *opaque), void *opaque);
  92 +void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler);
95 93 void pxa2xx_lcdc_oritentation(void *opaque, int angle);
96 94  
97 95 /* pxa2xx_mmci.c */
... ... @@ -126,6 +124,7 @@ struct pxa2xx_fir_s;
126 124 struct pxa2xx_state_s {
127 125 CPUState *env;
128 126 qemu_irq *pic;
  127 + qemu_irq reset;
129 128 struct pxa2xx_dma_state_s *dma;
130 129 struct pxa2xx_gpio_info_s *gpio;
131 130 struct pxa2xx_lcdc_s *lcd;
... ... @@ -209,6 +208,4 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds,
209 208 const char *revision);
210 209 struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);
211 210  
212   -void pxa2xx_reset(int line, int level, void *opaque);
213   -
214 211 #endif /* PXA_H */
... ...
hw/pxa2xx.c
  View file @38641a5
... ... @@ -2013,9 +2013,10 @@ static struct pxa2xx_fir_s *pxa2xx_fir_init(target_phys_addr_t base,
2013 2013 return s;
2014 2014 }
2015 2015  
2016   -void pxa2xx_reset(int line, int level, void *opaque)
  2016 +static void pxa2xx_reset(void *opaque, int line, int level)
2017 2017 {
2018 2018 struct pxa2xx_state_s *s = (struct pxa2xx_state_s *) opaque;
  2019 +
2019 2020 if (level && (s->pm_regs[PCFR >> 2] & 0x10)) { /* GPR_EN */
2020 2021 cpu_reset(s->env);
2021 2022 /* TODO: reset peripherals */
... ... @@ -2046,6 +2047,8 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2046 2047 register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load,
2047 2048 s->env);
2048 2049  
  2050 + s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
  2051 +
2049 2052 /* SDRAM & Internal Memory Storage */
2050 2053 cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
2051 2054 sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
... ... @@ -2139,7 +2142,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2139 2142  
2140 2143 /* GPIO1 resets the processor */
2141 2144 /* The handler can be overridden by board-specific code */
2142   - pxa2xx_gpio_handler_set(s->gpio, 1, pxa2xx_reset, s);
  2145 + pxa2xx_gpio_out_set(s->gpio, 1, s->reset);
2143 2146 return s;
2144 2147 }
2145 2148  
... ... @@ -2161,6 +2164,8 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2161 2164 register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load,
2162 2165 s->env);
2163 2166  
  2167 + s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
  2168 +
2164 2169 /* SDRAM & Internal Memory Storage */
2165 2170 cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size,
2166 2171 qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
... ... @@ -2253,6 +2258,6 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2253 2258  
2254 2259 /* GPIO1 resets the processor */
2255 2260 /* The handler can be overridden by board-specific code */
2256   - pxa2xx_gpio_handler_set(s->gpio, 1, pxa2xx_reset, s);
  2261 + pxa2xx_gpio_out_set(s->gpio, 1, s->reset);
2257 2262 return s;
2258 2263 }
... ...
hw/pxa2xx_gpio.c
  View file @38641a5
... ... @@ -16,6 +16,7 @@ struct pxa2xx_gpio_info_s {
16 16 qemu_irq *pic;
17 17 int lines;
18 18 CPUState *cpu_env;
  19 + qemu_irq *in;
19 20  
20 21 /* XXX: GNU C vectors are more suitable */
21 22 uint32_t ilevel[PXA2XX_GPIO_BANKS];
... ... @@ -28,13 +29,8 @@ struct pxa2xx_gpio_info_s {
28 29 uint32_t gafr[PXA2XX_GPIO_BANKS * 2];
29 30  
30 31 uint32_t prev_level[PXA2XX_GPIO_BANKS];
31   - struct {
32   - gpio_handler_t fn;
33   - void *opaque;
34   - } handler[PXA2XX_GPIO_BANKS * 32];
35   -
36   - void (*read_notify)(void *opaque);
37   - void *opaque;
  32 + qemu_irq handler[PXA2XX_GPIO_BANKS * 32];
  33 + qemu_irq read_notify;
38 34 };
39 35  
40 36 static struct {
... ... @@ -86,12 +82,13 @@ static void pxa2xx_gpio_irq_update(struct pxa2xx_gpio_info_s *s)
86 82 }
87 83  
88 84 /* Bitmap of pins used as standby and sleep wake-up sources. */
89   -const int pxa2xx_gpio_wake[PXA2XX_GPIO_BANKS] = {
  85 +static const int pxa2xx_gpio_wake[PXA2XX_GPIO_BANKS] = {
90 86 0x8003fe1b, 0x002001fc, 0xec080000, 0x0012007f,
91 87 };
92 88  
93   -void pxa2xx_gpio_set(struct pxa2xx_gpio_info_s *s, int line, int level)
  89 +static void pxa2xx_gpio_set(void *opaque, int line, int level)
94 90 {
  91 + struct pxa2xx_gpio_info_s *s = (struct pxa2xx_gpio_info_s *) opaque;
95 92 int bank;
96 93 uint32_t mask;
97 94  
... ... @@ -130,9 +127,7 @@ static void pxa2xx_gpio_handler_update(struct pxa2xx_gpio_info_s *s) {
130 127 for (diff = s->prev_level[i] ^ level; diff; diff ^= 1 << bit) {
131 128 bit = ffs(diff) - 1;
132 129 line = bit + 32 * i;
133   - if (s->handler[line].fn)
134   - s->handler[line].fn(line, (level >> bit) & 1,
135   - s->handler[line].opaque);
  130 + qemu_set_irq(s->handler[line], (level >> bit) & 1);
136 131 }
137 132  
138 133 s->prev_level[i] = level;
... ... @@ -173,8 +168,7 @@ static uint32_t pxa2xx_gpio_read(void *opaque, target_phys_addr_t offset)
173 168 case GPLR: /* GPIO Pin-Level registers */
174 169 ret = (s->olevel[bank] & s->dir[bank]) |
175 170 (s->ilevel[bank] & ~s->dir[bank]);
176   - if (s->read_notify)
177   - s->read_notify(s->opaque);
  171 + qemu_irq_raise(s->read_notify);
178 172 return ret;
179 173  
180 174 case GEDR: /* GPIO Edge Detect Status registers */
... ... @@ -312,6 +306,7 @@ struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base,
312 306 s->pic = pic;
313 307 s->lines = lines;
314 308 s->cpu_env = env;
  309 + s->in = qemu_allocate_irqs(pxa2xx_gpio_set, s, lines);
315 310  
316 311 iomemtype = cpu_register_io_memory(0, pxa2xx_gpio_readfn,
317 312 pxa2xx_gpio_writefn, s);
... ... @@ -323,23 +318,27 @@ struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base,
323 318 return s;
324 319 }
325 320  
326   -void pxa2xx_gpio_handler_set(struct pxa2xx_gpio_info_s *s, int line,
327   - gpio_handler_t handler, void *opaque) {
  321 +qemu_irq *pxa2xx_gpio_in_get(struct pxa2xx_gpio_info_s *s)
  322 +{
  323 + return s->in;
  324 +}
  325 +
  326 +void pxa2xx_gpio_out_set(struct pxa2xx_gpio_info_s *s,
  327 + int line, qemu_irq handler)
  328 +{
328 329 if (line >= s->lines) {
329 330 printf("%s: No GPIO pin %i\n", __FUNCTION__, line);
330 331 return;
331 332 }
332 333  
333   - s->handler[line].fn = handler;
334   - s->handler[line].opaque = opaque;
  334 + s->handler[line] = handler;
335 335 }
336 336  
337 337 /*
338 338 * Registers a callback to notify on GPLR reads. This normally
339 339 * shouldn't be needed but it is used for the hack on Spitz machines.
340 340 */
341   -void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s,
342   - void (*handler)(void *opaque), void *opaque) {
  341 +void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s, qemu_irq handler)
  342 +{
343 343 s->read_notify = handler;
344   - s->opaque = opaque;
345 344 }
... ...
hw/pxa2xx_lcd.c
  View file @38641a5
... ... @@ -62,8 +62,7 @@ struct pxa2xx_lcdc_s {
62 62 uint32_t command;
63 63 } dma_ch[7];
64 64  
65   - void (*vsync_cb)(void *opaque);
66   - void *opaque;
  65 + qemu_irq vsync_cb;
67 66 int orientation;
68 67 };
69 68  
... ... @@ -865,8 +864,7 @@ static void pxa2xx_update_display(void *opaque)
865 864 dpy_update(s->ds, 0, miny, s->xres, maxy);
866 865 pxa2xx_lcdc_int_update(s);
867 866  
868   - if (s->vsync_cb)
869   - s->vsync_cb(s->opaque);
  867 + qemu_irq_raise(s->vsync_cb);
870 868 }
871 869  
872 870 static void pxa2xx_invalidate_display(void *opaque)
... ... @@ -1042,8 +1040,7 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
1042 1040 return s;
1043 1041 }
1044 1042  
1045   -void pxa2xx_lcd_vsync_cb(struct pxa2xx_lcdc_s *s,
1046   - void (*cb)(void *opaque), void *opaque) {
1047   - s->vsync_cb = cb;
1048   - s->opaque = opaque;
  1043 +void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler)
  1044 +{
  1045 + s->vsync_cb = handler;
1049 1046 }
... ...
hw/spitz.c
  View file @38641a5
... ... @@ -217,7 +217,9 @@ static const int spitz_gpiomap[5] = {
217 217 static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };
218 218  
219 219 struct spitz_keyboard_s {
220   - struct pxa2xx_state_s *cpu;
  220 + qemu_irq sense[SPITZ_KEY_SENSE_NUM];
  221 + qemu_irq *strobe;
  222 + qemu_irq gpiomap[5];
221 223 int keymap[0x80];
222 224 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
223 225 uint16_t strobe_state;
... ... @@ -240,28 +242,23 @@ static void spitz_keyboard_sense_update(struct spitz_keyboard_s *s)
240 242 if (strobe) {
241 243 sense |= 1 << i;
242 244 if (!(s->sense_state & (1 << i)))
243   - pxa2xx_gpio_set(s->cpu->gpio, spitz_gpio_key_sense[i], 1);
  245 + qemu_irq_raise(s->sense[i]);
244 246 } else if (s->sense_state & (1 << i))
245   - pxa2xx_gpio_set(s->cpu->gpio, spitz_gpio_key_sense[i], 0);
  247 + qemu_irq_lower(s->sense[i]);
246 248 }
247 249  
248 250 s->sense_state = sense;
249 251 }
250 252  
251   -static void spitz_keyboard_strobe(int line, int level,
252   - struct spitz_keyboard_s *s)
  253 +static void spitz_keyboard_strobe(void *opaque, int line, int level)
253 254 {
254   - int i;
255   - for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
256   - if (spitz_gpio_key_strobe[i] == line) {
257   - if (level)
258   - s->strobe_state |= 1 << i;
259   - else
260   - s->strobe_state &= ~(1 << i);
261   -
262   - spitz_keyboard_sense_update(s);
263   - break;
264   - }
  255 + struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
  256 +
  257 + if (level)
  258 + s->strobe_state |= 1 << line;
  259 + else
  260 + s->strobe_state &= ~(1 << line);
  261 + spitz_keyboard_sense_update(s);
265 262 }
266 263  
267 264 static void spitz_keyboard_keydown(struct spitz_keyboard_s *s, int keycode)
... ... @@ -272,8 +269,7 @@ static void spitz_keyboard_keydown(struct spitz_keyboard_s *s, int keycode)
272 269  
273 270 /* Handle the additional keys */
274 271 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
275   - pxa2xx_gpio_set(s->cpu->gpio, spitz_gpiomap[spitz_keycode & 0xf],
276   - (keycode < 0x80) ^
  272 + qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^
277 273 spitz_gpio_invert[spitz_keycode & 0xf]);
278 274 return;
279 275 }
... ... @@ -486,7 +482,6 @@ static void spitz_keyboard_register(struct pxa2xx_state_s *cpu)
486 482 s = (struct spitz_keyboard_s *)
487 483 qemu_mallocz(sizeof(struct spitz_keyboard_s));
488 484 memset(s, 0, sizeof(struct spitz_keyboard_s));
489   - s->cpu = cpu;
490 485  
491 486 for (i = 0; i < 0x80; i ++)
492 487 s->keymap[i] = -1;
... ... @@ -495,9 +490,16 @@ static void spitz_keyboard_register(struct pxa2xx_state_s *cpu)
495 490 if (spitz_keymap[i][j] != -1)
496 491 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
497 492  
  493 + for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
  494 + s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]];
  495 +
  496 + for (i = 0; i < 5; i ++)
  497 + s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]];
  498 +
  499 + s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s,
  500 + SPITZ_KEY_STROBE_NUM);
498 501 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
499   - pxa2xx_gpio_handler_set(cpu->gpio, spitz_gpio_key_strobe[i],
500   - (gpio_handler_t) spitz_keyboard_strobe, s);
  502 + pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]);
501 503  
502 504 spitz_keyboard_pre_map(s);
503 505 qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);
... ... @@ -510,15 +512,13 @@ static void spitz_keyboard_register(struct pxa2xx_state_s *cpu)
510 512  
511 513 struct scoop_info_s {
512 514 target_phys_addr_t target_base;
  515 + qemu_irq handler[16];
  516 + qemu_irq *in;
513 517 uint16_t status;
514 518 uint16_t power;
515 519 uint32_t gpio_level;
516 520 uint32_t gpio_dir;
517 521 uint32_t prev_level;
518   - struct {
519   - gpio_handler_t fn;
520   - void *opaque;
521   - } handler[16];
522 522  
523 523 uint16_t mcr;
524 524 uint16_t cdr;
... ... @@ -548,9 +548,7 @@ static inline void scoop_gpio_handler_update(struct scoop_info_s *s) {
548 548  
549 549 for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
550 550 bit = ffs(diff) - 1;
551   - if (s->handler[bit].fn)
552   - s->handler[bit].fn(bit, (level >> bit) & 1,
553   - s->handler[bit].opaque);
  551 + qemu_set_irq(s->handler[bit], (level >> bit) & 1);
554 552 }
555 553  
556 554 s->prev_level = level;
... ... @@ -648,12 +646,9 @@ CPUWriteMemoryFunc *scoop_writefn[] = {
648 646 scoop_writeb,
649 647 };
650 648  
651   -static inline void scoop_gpio_set(struct scoop_info_s *s, int line, int level)
  649 +static void scoop_gpio_set(void *opaque, int line, int level)
652 650 {
653   - if (line >= 16) {
654   - spitz_printf("No GPIO pin %i\n", line);
655   - return;
656   - }
  651 + struct scoop_info_s *s = (struct scoop_info_s *) s;
657 652  
658 653 if (level)
659 654 s->gpio_level |= (1 << line);
... ... @@ -661,15 +656,19 @@ static inline void scoop_gpio_set(struct scoop_info_s *s, int line, int level)
661 656 s->gpio_level &= ~(1 << line);
662 657 }
663 658  
664   -static inline void scoop_gpio_handler_set(struct scoop_info_s *s, int line,
665   - gpio_handler_t handler, void *opaque) {
  659 +static inline qemu_irq *scoop_gpio_in_get(struct scoop_info_s *s)
  660 +{
  661 + return s->in;
  662 +}
  663 +
  664 +static inline void scoop_gpio_out_set(struct scoop_info_s *s, int line,
  665 + qemu_irq handler) {
666 666 if (line >= 16) {
667 667 spitz_printf("No GPIO pin %i\n", line);
668 668 return;
669 669 }
670 670  
671   - s->handler[line].fn = handler;
672   - s->handler[line].opaque = opaque;
  671 + s->handler[line] = handler;
673 672 }
674 673  
675 674 static void scoop_save(QEMUFile *f, void *opaque)
... ... @@ -723,6 +722,7 @@ static struct scoop_info_s *spitz_scoop_init(struct pxa2xx_state_s *cpu,
723 722 s[0].status = 0x02;
724 723 s[1].status = 0x02;
725 724  
  725 + s[0].in = qemu_allocate_irqs(scoop_gpio_set, &s[0], 16);
726 726 iomemtype = cpu_register_io_memory(0, scoop_readfn,
727 727 scoop_writefn, &s[0]);
728 728 cpu_register_physical_memory(s[0].target_base, 0x1000, iomemtype);
... ... @@ -731,6 +731,7 @@ static struct scoop_info_s *spitz_scoop_init(struct pxa2xx_state_s *cpu,
731 731 if (count < 2)
732 732 return s;
733 733  
  734 + s[1].in = qemu_allocate_irqs(scoop_gpio_set, &s[1], 16);
734 735 iomemtype = cpu_register_io_memory(0, scoop_readfn,
735 736 scoop_writefn, &s[1]);
736 737 cpu_register_physical_memory(s[1].target_base, 0x1000, iomemtype);
... ... @@ -760,7 +761,7 @@ static void spitz_bl_update(struct pxa2xx_state_s *s)
760 761 spitz_printf("LCD Backlight now off\n");
761 762 }
762 763  
763   -static void spitz_bl_bit5(int line, int level, void *opaque)
  764 +static inline void spitz_bl_bit5(void *opaque, int line, int level)
764 765 {
765 766 int prev = bl_intensity;
766 767  
... ... @@ -773,7 +774,7 @@ static void spitz_bl_bit5(int line, int level, void *opaque)
773 774 spitz_bl_update((struct pxa2xx_state_s *) opaque);
774 775 }
775 776  
776   -static void spitz_bl_power(int line, int level, void *opaque)
  777 +static inline void spitz_bl_power(void *opaque, int line, int level)
777 778 {
778 779 bl_power = !!level;
779 780 spitz_bl_update((struct pxa2xx_state_s *) opaque);
... ... @@ -841,14 +842,19 @@ static void corgi_ssp_write(void *opaque, uint32_t value)
841 842 max111x_write(max1111, value);
842 843 }
843 844  
844   -static void corgi_ssp_gpio_cs(int line, int level, struct pxa2xx_state_s *s)
  845 +static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
845 846 {
846   - if (line == SPITZ_GPIO_LCDCON_CS)
  847 + switch (line) {
  848 + case 0:
847 849 lcd_en = !level;
848   - else if (line == SPITZ_GPIO_ADS7846_CS)
  850 + break;
  851 + case 1:
849 852 ads_en = !level;
850   - else if (line == SPITZ_GPIO_MAX1111_CS)
  853 + break;
  854 + case 2:
851 855 max_en = !level;
  856 + break;
  857 + }
852 858 }
853 859  
854 860 #define MAX1111_BATT_VOLT 1
... ... @@ -859,7 +865,7 @@ static void corgi_ssp_gpio_cs(int line, int level, struct pxa2xx_state_s *s)
859 865 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
860 866 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
861 867  
862   -static void spitz_adc_temp_on(int line, int level, void *opaque)
  868 +static void spitz_adc_temp_on(void *opaque, int line, int level)
863 869 {
864 870 if (!max1111)
865 871 return;
... ... @@ -870,12 +876,6 @@ static void spitz_adc_temp_on(int line, int level, void *opaque)
870 876 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
871 877 }
872 878  
873   -static void spitz_pendown_set(void *opaque, int line, int level)
874   -{
875   - struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
876   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_TP_INT, level);
877   -}
878   -
879 879 static void spitz_ssp_save(QEMUFile *f, void *opaque)
880 880 {
881 881 qemu_put_be32(f, lcd_en);
... ... @@ -898,9 +898,11 @@ static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id)
898 898  
899 899 static void spitz_ssp_attach(struct pxa2xx_state_s *cpu)
900 900 {
  901 + qemu_irq *chipselects;
  902 +
901 903 lcd_en = ads_en = max_en = 0;
902 904  
903   - ads7846 = ads7846_init(qemu_allocate_irqs(spitz_pendown_set, cpu, 1)[0]);
  905 + ads7846 = ads7846_init(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]);
904 906  
905 907 max1111 = max1111_init(0);
906 908 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
... ... @@ -910,12 +912,10 @@ static void spitz_ssp_attach(struct pxa2xx_state_s *cpu)
910 912 pxa2xx_ssp_attach(cpu->ssp[CORGI_SSP_PORT - 1], corgi_ssp_read,
911 913 corgi_ssp_write, cpu);
912 914  
913   - pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
914   - (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
915   - pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
916   - (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
917   - pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
918   - (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
  915 + chipselects = qemu_allocate_irqs(corgi_ssp_gpio_cs, cpu, 3);
  916 + pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, chipselects[0]);
  917 + pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, chipselects[1]);
  918 + pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, chipselects[2]);
919 919  
920 920 bl_intensity = 0x20;
921 921 bl_power = 0;
... ... @@ -945,7 +945,7 @@ static void spitz_microdrive_attach(struct pxa2xx_state_s *cpu)
945 945 #define SPITZ_GPIO_WM 5
946 946  
947 947 #ifdef HAS_AUDIO
948   -static void spitz_wm8750_addr(int line, int level, void *opaque)
  948 +static void spitz_wm8750_addr(void *opaque, int line, int level)
949 949 {
950 950 i2c_slave *wm = (i2c_slave *) opaque;
951 951 if (level)
... ... @@ -970,8 +970,9 @@ static void spitz_i2c_setup(struct pxa2xx_state_s *cpu)
970 970 /* Attach a WM8750 to the bus */
971 971 wm = wm8750_init(bus, audio);
972 972  
973   - spitz_wm8750_addr(0, 0, wm);
974   - pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_WM, spitz_wm8750_addr, wm);
  973 + spitz_wm8750_addr(wm, 0, 0);
  974 + pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM,
  975 + qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
975 976 /* .. and to the sound interface. */
976 977 cpu->i2s->opaque = wm;
977 978 cpu->i2s->codec_out = wm8750_dac_dat;
... ... @@ -989,24 +990,31 @@ static void spitz_akita_i2c_setup(struct pxa2xx_state_s *cpu)
989 990  
990 991 /* Other peripherals */
991 992  
992   -static void spitz_charge_switch(int line, int level, void *opaque)
  993 +static void spitz_out_switch(void *opaque, int line, int level)
993 994 {
994   - spitz_printf("Charging %s.\n", level ? "off" : "on");
995   -}
996   -
997   -static void spitz_discharge_switch(int line, int level, void *opaque)
998   -{
999   - spitz_printf("Discharging %s.\n", level ? "on" : "off");
1000   -}
1001   -
1002   -static void spitz_greenled_switch(int line, int level, void *opaque)
1003   -{
1004   - spitz_printf("Green LED %s.\n", level ? "on" : "off");
1005   -}
1006   -
1007   -static void spitz_orangeled_switch(int line, int level, void *opaque)
1008   -{
1009   - spitz_printf("Orange LED %s.\n", level ? "on" : "off");
  995 + switch (line) {
  996 + case 0:
  997 + spitz_printf("Charging %s.\n", level ? "off" : "on");
  998 + break;
  999 + case 1:
  1000 + spitz_printf("Discharging %s.\n", level ? "on" : "off");
  1001 + break;
  1002 + case 2:
  1003 + spitz_printf("Green LED %s.\n", level ? "on" : "off");
  1004 + break;
  1005 + case 3:
  1006 + spitz_printf("Orange LED %s.\n", level ? "on" : "off");
  1007 + break;
  1008 + case 4:
  1009 + spitz_bl_bit5(opaque, line, level);
  1010 + break;
  1011 + case 5:
  1012 + spitz_bl_power(opaque, line, level);
  1013 + break;
  1014 + case 6:
  1015 + spitz_adc_temp_on(opaque, line, level);
  1016 + break;
  1017 + }
1010 1018 }
1011 1019  
1012 1020 #define SPITZ_SCP_LED_GREEN 1
... ... @@ -1027,24 +1035,19 @@ static void spitz_orangeled_switch(int line, int level, void *opaque)
1027 1035 static void spitz_scoop_gpio_setup(struct pxa2xx_state_s *cpu,
1028 1036 struct scoop_info_s *scp, int num)
1029 1037 {
1030   - scoop_gpio_handler_set(&scp[0], SPITZ_SCP_CHRG_ON,
1031   - spitz_charge_switch, cpu);
1032   - scoop_gpio_handler_set(&scp[0], SPITZ_SCP_JK_B,
1033   - spitz_discharge_switch, cpu);
1034   - scoop_gpio_handler_set(&scp[0], SPITZ_SCP_LED_GREEN,
1035   - spitz_greenled_switch, cpu);
1036   - scoop_gpio_handler_set(&scp[0], SPITZ_SCP_LED_ORANGE,
1037   - spitz_orangeled_switch, cpu);
  1038 + qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
  1039 +
  1040 + scoop_gpio_out_set(&scp[0], SPITZ_SCP_CHRG_ON, outsignals[0]);
  1041 + scoop_gpio_out_set(&scp[0], SPITZ_SCP_JK_B, outsignals[1]);
  1042 + scoop_gpio_out_set(&scp[0], SPITZ_SCP_LED_GREEN, outsignals[2]);
  1043 + scoop_gpio_out_set(&scp[0], SPITZ_SCP_LED_ORANGE, outsignals[3]);
1038 1044  
1039 1045 if (num >= 2) {
1040   - scoop_gpio_handler_set(&scp[1], SPITZ_SCP2_BACKLIGHT_CONT,
1041   - spitz_bl_bit5, cpu);
1042   - scoop_gpio_handler_set(&scp[1], SPITZ_SCP2_BACKLIGHT_ON,
1043   - spitz_bl_power, cpu);
  1046 + scoop_gpio_out_set(&scp[1], SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
  1047 + scoop_gpio_out_set(&scp[1], SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
1044 1048 }
1045 1049  
1046   - scoop_gpio_handler_set(&scp[0], SPITZ_SCP_ADC_TEMP_ON,
1047   - spitz_adc_temp_on, cpu);
  1050 + scoop_gpio_out_set(&scp[0], SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
1048 1051 }
1049 1052  
1050 1053 #define SPITZ_GPIO_HSYNC 22
... ... @@ -1057,40 +1060,30 @@ static void spitz_scoop_gpio_setup(struct pxa2xx_state_s *cpu,
1057 1060 #define SPITZ_GPIO_CF2_IRQ 106
1058 1061 #define SPITZ_GPIO_CF2_CD 93
1059 1062  
1060   -int spitz_hsync;
  1063 +static int spitz_hsync;
1061 1064  
1062   -static void spitz_lcd_hsync_handler(void *opaque)
  1065 +static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
1063 1066 {
1064 1067 struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
1065   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_HSYNC, spitz_hsync);
  1068 + qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync);
1066 1069 spitz_hsync ^= 1;
1067 1070 }
1068 1071  
1069 1072 static void spitz_mmc_coverswitch_change(void *opaque, int in)
1070 1073 {
1071 1074 struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
1072   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SD_DETECT, in);
  1075 + qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT], in);
1073 1076 }
1074 1077  
1075 1078 static void spitz_mmc_writeprotect_change(void *opaque, int wp)
1076 1079 {
1077 1080 struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
1078   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SD_WP, wp);
1079   -}
1080   -
1081   -static void spitz_pcmcia_cb(void *opaque, int line, int level)
1082   -{
1083   - struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
1084   - static const int gpio_map[] = {
1085   - SPITZ_GPIO_CF1_IRQ, SPITZ_GPIO_CF1_CD,
1086   - SPITZ_GPIO_CF2_IRQ, SPITZ_GPIO_CF2_CD,
1087   - };
1088   - pxa2xx_gpio_set(cpu->gpio, gpio_map[line], level);
  1081 + qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], wp);
1089 1082 }
1090 1083  
1091 1084 static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
1092 1085 {
1093   - qemu_irq *pcmcia_cb;
  1086 + qemu_irq lcd_hsync;
1094 1087 /*
1095 1088 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
1096 1089 * read to satisfy broken guests that poll-wait for hsync.
... ... @@ -1098,25 +1091,29 @@ static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
1098 1091 * wouldn't guarantee that a guest ever exits the loop.
1099 1092 */
1100 1093 spitz_hsync = 0;
1101   - pxa2xx_gpio_read_notifier(cpu->gpio, spitz_lcd_hsync_handler, cpu);
1102   - pxa2xx_lcd_vsync_cb(cpu->lcd, spitz_lcd_hsync_handler, cpu);
  1094 + lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
  1095 + pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
  1096 + pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
1103 1097  
1104 1098 /* MMC/SD host */
1105 1099 pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change,
1106 1100 spitz_mmc_coverswitch_change);
1107 1101  
1108 1102 /* Battery lock always closed */
1109   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_BAT_COVER, 1);
  1103 + qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
1110 1104  
1111 1105 /* Handle reset */
1112   - pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_ON_RESET, pxa2xx_reset, cpu);
  1106 + pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
1113 1107  
1114 1108 /* PCMCIA signals: card's IRQ and Card-Detect */
1115   - pcmcia_cb = qemu_allocate_irqs(spitz_pcmcia_cb, cpu, slots * 2);
1116 1109 if (slots >= 1)
1117   - pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], pcmcia_cb[0], pcmcia_cb[1]);
  1110 + pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
  1111 + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ],
  1112 + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]);
1118 1113 if (slots >= 2)
1119   - pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], pcmcia_cb[2], pcmcia_cb[3]);
  1114 + pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
  1115 + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ],
  1116 + pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]);
1120 1117  
1121 1118 /* Initialise the screen rotation related signals */
1122 1119 spitz_gpio_invert[3] = 0; /* Always open */
... ... @@ -1125,8 +1122,10 @@ static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
1125 1122 } else { /* Portrait mode */
1126 1123 spitz_gpio_invert[4] = 1;
1127 1124 }
1128   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SWA, spitz_gpio_invert[3]);
1129   - pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SWB, spitz_gpio_invert[4]);
  1125 + qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA],
  1126 + spitz_gpio_invert[3]);
  1127 + qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB],
  1128 + spitz_gpio_invert[4]);
1130 1129 }
1131 1130  
1132 1131 /* Write the bootloader parameters memory area. */
... ...
... ... @@ -1420,9 +1420,6 @@ void ecc_reset(struct ecc_state_s *s);
1420 1420 void ecc_put(QEMUFile *f, struct ecc_state_s *s);
1421 1421 void ecc_get(QEMUFile *f, struct ecc_state_s *s);
1422 1422  
1423   -/* GPIO */
1424   -typedef void (*gpio_handler_t)(int line, int level, void *opaque);
1425   -
1426 1423 /* ads7846.c */
1427 1424 struct ads7846_state_s;
1428 1425 uint32_t ads7846_read(void *opaque);
... ...