|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
|
/*
* defines common to all virtual CPUs
*
* Copyright (c) 2003 Fabrice Bellard
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef CPU_ALL_H
#define CPU_ALL_H
|
|
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
#if defined(__arm__) || defined(__sparc__)
#define WORDS_ALIGNED
#endif
/* some important defines:
*
* WORDS_ALIGNED : if defined, the host cpu can only make word aligned
* memory accesses.
*
* WORDS_BIGENDIAN : if defined, the host cpu is big endian and
* otherwise little endian.
*
* (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
*
* TARGET_WORDS_BIGENDIAN : same for target cpu
*/
|
|
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
|
#include "bswap.h"
#if defined(WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
#define BSWAP_NEEDED
#endif
#ifdef BSWAP_NEEDED
static inline uint16_t tswap16(uint16_t s)
{
return bswap16(s);
}
static inline uint32_t tswap32(uint32_t s)
{
return bswap32(s);
}
static inline uint64_t tswap64(uint64_t s)
{
return bswap64(s);
}
static inline void tswap16s(uint16_t *s)
{
*s = bswap16(*s);
}
static inline void tswap32s(uint32_t *s)
{
*s = bswap32(*s);
}
static inline void tswap64s(uint64_t *s)
{
*s = bswap64(*s);
}
#else
static inline uint16_t tswap16(uint16_t s)
{
return s;
}
static inline uint32_t tswap32(uint32_t s)
{
return s;
}
static inline uint64_t tswap64(uint64_t s)
{
return s;
}
static inline void tswap16s(uint16_t *s)
{
}
static inline void tswap32s(uint32_t *s)
{
}
static inline void tswap64s(uint64_t *s)
{
}
#endif
#if TARGET_LONG_SIZE == 4
#define tswapl(s) tswap32(s)
#define tswapls(s) tswap32s((uint32_t *)(s))
#else
#define tswapl(s) tswap64(s)
#define tswapls(s) tswap64s((uint64_t *)(s))
#endif
|
|
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
|
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
typedef union {
double d;
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
struct {
uint32_t lower;
uint32_t upper;
} l;
#else
struct {
uint32_t upper;
uint32_t lower;
} l;
#endif
uint64_t ll;
} CPU_DoubleU;
|
|
134
135
|
/* CPU memory access without any memory or io remapping */
|
|
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
|
/*
* the generic syntax for the memory accesses is:
*
* load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
*
* store: st{type}{size}{endian}_{access_type}(ptr, val)
*
* type is:
* (empty): integer access
* f : float access
*
* sign is:
* (empty): for floats or 32 bit size
* u : unsigned
* s : signed
*
* size is:
* b: 8 bits
* w: 16 bits
* l: 32 bits
* q: 64 bits
*
* endian is:
* (empty): target cpu endianness or 8 bit access
* r : reversed target cpu endianness (not implemented yet)
* be : big endian (not implemented yet)
* le : little endian (not implemented yet)
*
* access_type is:
* raw : host memory access
* user : user mode access using soft MMU
* kernel : kernel mode access using soft MMU
*/
|
|
169
|
static inline int ldub_p(void *ptr)
|
|
170
171
172
173
|
{
return *(uint8_t *)ptr;
}
|
|
174
|
static inline int ldsb_p(void *ptr)
|
|
175
176
177
178
|
{
return *(int8_t *)ptr;
}
|
|
179
|
static inline void stb_p(void *ptr, int v)
|
|
180
181
182
183
184
185
186
|
{
*(uint8_t *)ptr = v;
}
/* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
kernel handles unaligned load/stores may give better results, but
it is a system wide setting : bad */
|
|
187
|
#if !defined(TARGET_WORDS_BIGENDIAN) && (defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED))
|
|
188
189
|
/* conservative code for little endian unaligned accesses */
|
|
190
|
static inline int lduw_p(void *ptr)
|
|
191
192
193
194
195
196
197
198
199
200
201
|
{
#ifdef __powerpc__
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
#else
uint8_t *p = ptr;
return p[0] | (p[1] << 8);
#endif
}
|
|
202
|
static inline int ldsw_p(void *ptr)
|
|
203
204
205
206
207
208
209
210
211
212
213
|
{
#ifdef __powerpc__
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return (int16_t)val;
#else
uint8_t *p = ptr;
return (int16_t)(p[0] | (p[1] << 8));
#endif
}
|
|
214
|
static inline int ldl_p(void *ptr)
|
|
215
216
217
218
219
220
221
222
223
224
225
|
{
#ifdef __powerpc__
int val;
__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
#else
uint8_t *p = ptr;
return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
#endif
}
|
|
226
|
static inline uint64_t ldq_p(void *ptr)
|
|
227
228
229
|
{
uint8_t *p = ptr;
uint32_t v1, v2;
|
|
230
231
|
v1 = ldl_p(p);
v2 = ldl_p(p + 4);
|
|
232
233
234
|
return v1 | ((uint64_t)v2 << 32);
}
|
|
235
|
static inline void stw_p(void *ptr, int v)
|
|
236
237
238
239
240
241
242
243
244
245
|
{
#ifdef __powerpc__
__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
#else
uint8_t *p = ptr;
p[0] = v;
p[1] = v >> 8;
#endif
}
|
|
246
|
static inline void stl_p(void *ptr, int v)
|
|
247
248
249
250
251
252
253
254
255
256
257
258
|
{
#ifdef __powerpc__
__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
#else
uint8_t *p = ptr;
p[0] = v;
p[1] = v >> 8;
p[2] = v >> 16;
p[3] = v >> 24;
#endif
}
|
|
259
|
static inline void stq_p(void *ptr, uint64_t v)
|
|
260
261
|
{
uint8_t *p = ptr;
|
|
262
263
|
stl_p(p, (uint32_t)v);
stl_p(p + 4, v >> 32);
|
|
264
265
266
267
|
}
/* float access */
|
|
268
|
static inline float ldfl_p(void *ptr)
|
|
269
270
271
272
273
|
{
union {
float f;
uint32_t i;
} u;
|
|
274
|
u.i = ldl_p(ptr);
|
|
275
276
277
|
return u.f;
}
|
|
278
|
static inline void stfl_p(void *ptr, float v)
|
|
279
280
281
282
283
284
|
{
union {
float f;
uint32_t i;
} u;
u.f = v;
|
|
285
|
stl_p(ptr, u.i);
|
|
286
287
|
}
|
|
288
|
static inline double ldfq_p(void *ptr)
|
|
289
|
{
|
|
290
|
CPU_DoubleU u;
|
|
291
292
|
u.l.lower = ldl_p(ptr);
u.l.upper = ldl_p(ptr + 4);
|
|
293
294
295
|
return u.d;
}
|
|
296
|
static inline void stfq_p(void *ptr, double v)
|
|
297
|
{
|
|
298
|
CPU_DoubleU u;
|
|
299
|
u.d = v;
|
|
300
301
|
stl_p(ptr, u.l.lower);
stl_p(ptr + 4, u.l.upper);
|
|
302
303
|
}
|
|
304
|
#elif defined(TARGET_WORDS_BIGENDIAN) && (!defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED))
|
|
305
|
|
|
306
|
static inline int lduw_p(void *ptr)
|
|
307
|
{
|
|
308
309
310
311
312
313
314
315
|
#if defined(__i386__)
int val;
asm volatile ("movzwl %1, %0\n"
"xchgb %b0, %h0\n"
: "=q" (val)
: "m" (*(uint16_t *)ptr));
return val;
#else
|
|
316
|
uint8_t *b = (uint8_t *) ptr;
|
|
317
318
|
return ((b[0] << 8) | b[1]);
#endif
|
|
319
320
|
}
|
|
321
|
static inline int ldsw_p(void *ptr)
|
|
322
|
{
|
|
323
324
325
326
327
328
329
330
331
332
333
|
#if defined(__i386__)
int val;
asm volatile ("movzwl %1, %0\n"
"xchgb %b0, %h0\n"
: "=q" (val)
: "m" (*(uint16_t *)ptr));
return (int16_t)val;
#else
uint8_t *b = (uint8_t *) ptr;
return (int16_t)((b[0] << 8) | b[1]);
#endif
|
|
334
335
|
}
|
|
336
|
static inline int ldl_p(void *ptr)
|
|
337
|
{
|
|
338
|
#if defined(__i386__) || defined(__x86_64__)
|
|
339
340
341
342
343
344
345
|
int val;
asm volatile ("movl %1, %0\n"
"bswap %0\n"
: "=r" (val)
: "m" (*(uint32_t *)ptr));
return val;
#else
|
|
346
|
uint8_t *b = (uint8_t *) ptr;
|
|
347
348
|
return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];
#endif
|
|
349
350
|
}
|
|
351
|
static inline uint64_t ldq_p(void *ptr)
|
|
352
353
|
{
uint32_t a,b;
|
|
354
355
|
a = ldl_p(ptr);
b = ldl_p(ptr+4);
|
|
356
357
358
|
return (((uint64_t)a<<32)|b);
}
|
|
359
|
static inline void stw_p(void *ptr, int v)
|
|
360
|
{
|
|
361
362
363
364
365
366
|
#if defined(__i386__)
asm volatile ("xchgb %b0, %h0\n"
"movw %w0, %1\n"
: "=q" (v)
: "m" (*(uint16_t *)ptr), "0" (v));
#else
|
|
367
368
369
|
uint8_t *d = (uint8_t *) ptr;
d[0] = v >> 8;
d[1] = v;
|
|
370
|
#endif
|
|
371
372
|
}
|
|
373
|
static inline void stl_p(void *ptr, int v)
|
|
374
|
{
|
|
375
|
#if defined(__i386__) || defined(__x86_64__)
|
|
376
377
378
379
380
|
asm volatile ("bswap %0\n"
"movl %0, %1\n"
: "=r" (v)
: "m" (*(uint32_t *)ptr), "0" (v));
#else
|
|
381
382
383
384
385
|
uint8_t *d = (uint8_t *) ptr;
d[0] = v >> 24;
d[1] = v >> 16;
d[2] = v >> 8;
d[3] = v;
|
|
386
|
#endif
|
|
387
388
|
}
|
|
389
|
static inline void stq_p(void *ptr, uint64_t v)
|
|
390
|
{
|
|
391
392
|
stl_p(ptr, v >> 32);
stl_p(ptr + 4, v);
|
|
393
394
395
396
|
}
/* float access */
|
|
397
|
static inline float ldfl_p(void *ptr)
|
|
398
399
400
401
402
|
{
union {
float f;
uint32_t i;
} u;
|
|
403
|
u.i = ldl_p(ptr);
|
|
404
405
406
|
return u.f;
}
|
|
407
|
static inline void stfl_p(void *ptr, float v)
|
|
408
409
410
411
412
413
|
{
union {
float f;
uint32_t i;
} u;
u.f = v;
|
|
414
|
stl_p(ptr, u.i);
|
|
415
416
|
}
|
|
417
|
static inline double ldfq_p(void *ptr)
|
|
418
419
|
{
CPU_DoubleU u;
|
|
420
421
|
u.l.upper = ldl_p(ptr);
u.l.lower = ldl_p(ptr + 4);
|
|
422
423
424
|
return u.d;
}
|
|
425
|
static inline void stfq_p(void *ptr, double v)
|
|
426
427
428
|
{
CPU_DoubleU u;
u.d = v;
|
|
429
430
|
stl_p(ptr, u.l.upper);
stl_p(ptr + 4, u.l.lower);
|
|
431
432
|
}
|
|
433
434
|
#else
|
|
435
|
static inline int lduw_p(void *ptr)
|
|
436
437
438
439
|
{
return *(uint16_t *)ptr;
}
|
|
440
|
static inline int ldsw_p(void *ptr)
|
|
441
442
443
444
|
{
return *(int16_t *)ptr;
}
|
|
445
|
static inline int ldl_p(void *ptr)
|
|
446
447
448
449
|
{
return *(uint32_t *)ptr;
}
|
|
450
|
static inline uint64_t ldq_p(void *ptr)
|
|
451
452
453
454
|
{
return *(uint64_t *)ptr;
}
|
|
455
|
static inline void stw_p(void *ptr, int v)
|
|
456
457
458
459
|
{
*(uint16_t *)ptr = v;
}
|
|
460
|
static inline void stl_p(void *ptr, int v)
|
|
461
462
463
464
|
{
*(uint32_t *)ptr = v;
}
|
|
465
|
static inline void stq_p(void *ptr, uint64_t v)
|
|
466
467
468
469
470
471
|
{
*(uint64_t *)ptr = v;
}
/* float access */
|
|
472
|
static inline float ldfl_p(void *ptr)
|
|
473
474
475
476
|
{
return *(float *)ptr;
}
|
|
477
|
static inline double ldfq_p(void *ptr)
|
|
478
479
480
481
|
{
return *(double *)ptr;
}
|
|
482
|
static inline void stfl_p(void *ptr, float v)
|
|
483
484
485
486
|
{
*(float *)ptr = v;
}
|
|
487
|
static inline void stfq_p(void *ptr, double v)
|
|
488
489
490
491
492
|
{
*(double *)ptr = v;
}
#endif
|
|
493
494
|
/* MMU memory access macros */
|
|
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
|
/* NOTE: we use double casts if pointers and target_ulong have
different sizes */
#define ldub_raw(p) ldub_p((uint8_t *)(long)(p))
#define ldsb_raw(p) ldsb_p((uint8_t *)(long)(p))
#define lduw_raw(p) lduw_p((uint8_t *)(long)(p))
#define ldsw_raw(p) ldsw_p((uint8_t *)(long)(p))
#define ldl_raw(p) ldl_p((uint8_t *)(long)(p))
#define ldq_raw(p) ldq_p((uint8_t *)(long)(p))
#define ldfl_raw(p) ldfl_p((uint8_t *)(long)(p))
#define ldfq_raw(p) ldfq_p((uint8_t *)(long)(p))
#define stb_raw(p, v) stb_p((uint8_t *)(long)(p), v)
#define stw_raw(p, v) stw_p((uint8_t *)(long)(p), v)
#define stl_raw(p, v) stl_p((uint8_t *)(long)(p), v)
#define stq_raw(p, v) stq_p((uint8_t *)(long)(p), v)
#define stfl_raw(p, v) stfl_p((uint8_t *)(long)(p), v)
#define stfq_raw(p, v) stfq_p((uint8_t *)(long)(p), v)
|
|
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
|
#if defined(CONFIG_USER_ONLY)
/* if user mode, no other memory access functions */
#define ldub(p) ldub_raw(p)
#define ldsb(p) ldsb_raw(p)
#define lduw(p) lduw_raw(p)
#define ldsw(p) ldsw_raw(p)
#define ldl(p) ldl_raw(p)
#define ldq(p) ldq_raw(p)
#define ldfl(p) ldfl_raw(p)
#define ldfq(p) ldfq_raw(p)
#define stb(p, v) stb_raw(p, v)
#define stw(p, v) stw_raw(p, v)
#define stl(p, v) stl_raw(p, v)
#define stq(p, v) stq_raw(p, v)
#define stfl(p, v) stfl_raw(p, v)
#define stfq(p, v) stfq_raw(p, v)
#define ldub_code(p) ldub_raw(p)
#define ldsb_code(p) ldsb_raw(p)
#define lduw_code(p) lduw_raw(p)
#define ldsw_code(p) ldsw_raw(p)
#define ldl_code(p) ldl_raw(p)
#define ldub_kernel(p) ldub_raw(p)
#define ldsb_kernel(p) ldsb_raw(p)
#define lduw_kernel(p) lduw_raw(p)
#define ldsw_kernel(p) ldsw_raw(p)
#define ldl_kernel(p) ldl_raw(p)
|
|
542
543
|
#define ldfl_kernel(p) ldfl_raw(p)
#define ldfq_kernel(p) ldfq_raw(p)
|
|
544
545
546
547
|
#define stb_kernel(p, v) stb_raw(p, v)
#define stw_kernel(p, v) stw_raw(p, v)
#define stl_kernel(p, v) stl_raw(p, v)
#define stq_kernel(p, v) stq_raw(p, v)
|
|
548
549
|
#define stfl_kernel(p, v) stfl_raw(p, v)
#define stfq_kernel(p, vt) stfq_raw(p, v)
|
|
550
551
552
|
#endif /* defined(CONFIG_USER_ONLY) */
|
|
553
554
555
556
557
558
|
/* page related stuff */
#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
|
|
559
560
561
562
|
extern unsigned long qemu_real_host_page_size;
extern unsigned long qemu_host_page_bits;
extern unsigned long qemu_host_page_size;
extern unsigned long qemu_host_page_mask;
|
|
563
|
|
|
564
|
#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
|
|
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
|
/* same as PROT_xxx */
#define PAGE_READ 0x0001
#define PAGE_WRITE 0x0002
#define PAGE_EXEC 0x0004
#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
#define PAGE_VALID 0x0008
/* original state of the write flag (used when tracking self-modifying
code */
#define PAGE_WRITE_ORG 0x0010
void page_dump(FILE *f);
int page_get_flags(unsigned long address);
void page_set_flags(unsigned long start, unsigned long end, int flags);
void page_unprotect_range(uint8_t *data, unsigned long data_size);
#define SINGLE_CPU_DEFINES
#ifdef SINGLE_CPU_DEFINES
#if defined(TARGET_I386)
#define CPUState CPUX86State
#define cpu_init cpu_x86_init
#define cpu_exec cpu_x86_exec
#define cpu_gen_code cpu_x86_gen_code
#define cpu_signal_handler cpu_x86_signal_handler
#elif defined(TARGET_ARM)
#define CPUState CPUARMState
#define cpu_init cpu_arm_init
#define cpu_exec cpu_arm_exec
#define cpu_gen_code cpu_arm_gen_code
#define cpu_signal_handler cpu_arm_signal_handler
|
|
600
601
602
603
604
605
606
607
|
#elif defined(TARGET_SPARC)
#define CPUState CPUSPARCState
#define cpu_init cpu_sparc_init
#define cpu_exec cpu_sparc_exec
#define cpu_gen_code cpu_sparc_gen_code
#define cpu_signal_handler cpu_sparc_signal_handler
|
|
608
609
610
611
612
613
614
615
|
#elif defined(TARGET_PPC)
#define CPUState CPUPPCState
#define cpu_init cpu_ppc_init
#define cpu_exec cpu_ppc_exec
#define cpu_gen_code cpu_ppc_gen_code
#define cpu_signal_handler cpu_ppc_signal_handler
|
|
616
617
618
619
620
621
|
#else
#error unsupported target CPU
#endif
|
|
622
623
|
#endif /* SINGLE_CPU_DEFINES */
|
|
624
625
626
627
|
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
int flags);
|
|
628
|
void cpu_abort(CPUState *env, const char *fmt, ...);
|
|
629
|
extern CPUState *cpu_single_env;
|
|
630
|
extern int code_copy_enabled;
|
|
631
|
|
|
632
633
634
|
#define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */
#define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
|
|
635
|
#define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
|
|
636
|
void cpu_interrupt(CPUState *s, int mask);
|
|
637
|
void cpu_reset_interrupt(CPUState *env, int mask);
|
|
638
|
|
|
639
640
|
int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
int cpu_breakpoint_remove(CPUState *env, target_ulong pc);
|
|
641
|
void cpu_single_step(CPUState *env, int enabled);
|
|
642
|
void cpu_reset(CPUState *s);
|
|
643
|
|
|
644
645
646
647
648
|
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
|
|
649
650
|
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
|
|
651
652
653
654
655
|
#define CPU_LOG_TB_OP (1 << 2)
#define CPU_LOG_TB_OP_OPT (1 << 3)
#define CPU_LOG_INT (1 << 4)
#define CPU_LOG_EXEC (1 << 5)
#define CPU_LOG_PCALL (1 << 6)
|
|
656
|
#define CPU_LOG_IOPORT (1 << 7)
|
|
657
|
#define CPU_LOG_TB_CPU (1 << 8)
|
|
658
659
660
661
662
663
664
665
666
667
|
/* define log items */
typedef struct CPULogItem {
int mask;
const char *name;
const char *help;
} CPULogItem;
extern CPULogItem cpu_log_items[];
|
|
668
669
|
void cpu_set_log(int log_flags);
void cpu_set_log_filename(const char *filename);
|
|
670
|
int cpu_str_to_log_mask(const char *str);
|
|
671
|
|
|
672
673
674
675
676
677
678
679
680
681
682
683
684
|
/* IO ports API */
/* NOTE: as these functions may be even used when there is an isa
brige on non x86 targets, we always defined them */
#ifndef NO_CPU_IO_DEFS
void cpu_outb(CPUState *env, int addr, int val);
void cpu_outw(CPUState *env, int addr, int val);
void cpu_outl(CPUState *env, int addr, int val);
int cpu_inb(CPUState *env, int addr);
int cpu_inw(CPUState *env, int addr);
int cpu_inl(CPUState *env, int addr);
#endif
|
|
685
686
|
/* memory API */
|
|
687
688
689
|
extern int phys_ram_size;
extern int phys_ram_fd;
extern uint8_t *phys_ram_base;
|
|
690
|
extern uint8_t *phys_ram_dirty;
|
|
691
692
693
694
695
696
697
698
699
|
/* physical memory access */
#define IO_MEM_NB_ENTRIES 256
#define TLB_INVALID_MASK (1 << 3)
#define IO_MEM_SHIFT 4
#define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */
#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
|
|
700
701
|
#define IO_MEM_CODE (3 << IO_MEM_SHIFT) /* used internally, never use directly */
#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
|
|
702
|
|
|
703
704
|
typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
|
|
705
|
|
|
706
707
708
|
void cpu_register_physical_memory(target_phys_addr_t start_addr,
unsigned long size,
unsigned long phys_offset);
|
|
709
710
|
int cpu_register_io_memory(int io_index,
CPUReadMemoryFunc **mem_read,
|
|
711
712
|
CPUWriteMemoryFunc **mem_write,
void *opaque);
|
|
713
714
|
CPUWriteMemoryFunc **cpu_get_io_memory_write(int io_index);
CPUReadMemoryFunc **cpu_get_io_memory_read(int io_index);
|
|
715
|
|
|
716
|
void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
|
|
717
|
int len, int is_write);
|
|
718
719
|
static inline void cpu_physical_memory_read(target_phys_addr_t addr,
uint8_t *buf, int len)
|
|
720
721
722
|
{
cpu_physical_memory_rw(addr, buf, len, 0);
}
|
|
723
724
|
static inline void cpu_physical_memory_write(target_phys_addr_t addr,
const uint8_t *buf, int len)
|
|
725
726
727
728
729
730
|
{
cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
}
int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
uint8_t *buf, int len, int is_write);
|
|
731
|
|
|
732
733
734
735
736
737
738
739
740
741
742
743
744
|
/* read dirty bit (return 0 or 1) */
static inline int cpu_physical_memory_is_dirty(target_ulong addr)
{
return phys_ram_dirty[addr >> TARGET_PAGE_BITS];
}
static inline void cpu_physical_memory_set_dirty(target_ulong addr)
{
phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 1;
}
void cpu_physical_memory_reset_dirty(target_ulong start, target_ulong end);
|
|
745
|
#endif /* CPU_ALL_H */
|