Commit b54ad0498e58cd81f35f815ecb887af2f44ab6f6

Authored by bellard
1 parent 4399059e

PIC reset fix (initial patch by Hidemi KAWAI)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@836 c046a42c-6fe2-441c-8c8c-71466251a162
Changelog
... ... @@ -13,6 +13,7 @@ version 0.5.6:
13 13 - NE2K PCI support
14 14 - dummy VGA PCI support
15 15 - VGA font selection fix (Daniel Serpell)
  16 + - PIC reset fix (Hidemi KAWAI)
16 17  
17 18 version 0.5.5:
18 19  
... ...
cpu-all.h
... ... @@ -569,7 +569,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
569 569 #define cpu_init cpu_x86_init
570 570 #define cpu_exec cpu_x86_exec
571 571 #define cpu_gen_code cpu_x86_gen_code
572   -#define cpu_interrupt cpu_x86_interrupt
573 572 #define cpu_signal_handler cpu_x86_signal_handler
574 573 #define cpu_dump_state cpu_x86_dump_state
575 574  
... ... @@ -579,7 +578,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
579 578 #define cpu_init cpu_arm_init
580 579 #define cpu_exec cpu_arm_exec
581 580 #define cpu_gen_code cpu_arm_gen_code
582   -#define cpu_interrupt cpu_arm_interrupt
583 581 #define cpu_signal_handler cpu_arm_signal_handler
584 582 #define cpu_dump_state cpu_arm_dump_state
585 583  
... ... @@ -589,7 +587,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
589 587 #define cpu_init cpu_sparc_init
590 588 #define cpu_exec cpu_sparc_exec
591 589 #define cpu_gen_code cpu_sparc_gen_code
592   -#define cpu_interrupt cpu_sparc_interrupt
593 590 #define cpu_signal_handler cpu_sparc_signal_handler
594 591 #define cpu_dump_state cpu_sparc_dump_state
595 592  
... ... @@ -599,7 +596,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
599 596 #define cpu_init cpu_ppc_init
600 597 #define cpu_exec cpu_ppc_exec
601 598 #define cpu_gen_code cpu_ppc_gen_code
602   -#define cpu_interrupt cpu_ppc_interrupt
603 599 #define cpu_signal_handler cpu_ppc_signal_handler
604 600 #define cpu_dump_state cpu_ppc_dump_state
605 601  
... ... @@ -620,6 +616,7 @@ extern int code_copy_enabled;
620 616 #define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
621 617 #define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
622 618 void cpu_interrupt(CPUState *s, int mask);
  619 +void cpu_reset_interrupt(CPUState *env, int mask);
623 620  
624 621 int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
625 622 int cpu_breakpoint_remove(CPUState *env, target_ulong pc);
... ...
... ... @@ -1112,6 +1112,11 @@ void cpu_interrupt(CPUState *env, int mask)
1112 1112 }
1113 1113 }
1114 1114  
  1115 +void cpu_reset_interrupt(CPUState *env, int mask)
  1116 +{
  1117 + env->interrupt_request &= ~mask;
  1118 +}
  1119 +
1115 1120 CPULogItem cpu_log_items[] = {
1116 1121 { CPU_LOG_TB_OUT_ASM, "out_asm",
1117 1122 "show generated host assembly code for each compiled TB" },
... ...
hw/i8259.c
... ... @@ -231,6 +231,8 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
231 231 tmp = s->elcr_mask;
232 232 memset(s, 0, sizeof(PicState));
233 233 s->elcr_mask = tmp;
  234 + /* deassert a pending interrupt */
  235 + cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
234 236  
235 237 s->init_state = 1;
236 238 s->init4 = val & 1;
... ...