gwj / at91sam9263 · Commits

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call the helpers directly from the micro-ops.
Avoid duplicated code for tlbsx. implementation.


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Add comments about some unimplemented storage control dedicated SPRs.


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Fix critical input interrupt generation.


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(crash reported by Andreas Farber when using default CPU).


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(problem reported by Andreas Farber).
: ----------------------------------------------------------------------


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- New mtmsr/mtmsrd form that just update RI and EE bits
- New hrfid, lq and stq instructions
- Add support for supervisor and hypervisor modes process priority update
- Code provision for hypervisor SPR accesses
* Actually implement the wait instruction
* Bugfixes (missing RETURN in micro-op / missing #ifdef)


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* fix invalid instructions bits masks
* new wait instruction
* more comments about effect of cache instructions on the MMU


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This is a rework of Stefan Weil proposed patch.


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as defined in the PowerPC 2.04 specification.


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as the PowerPC registers only store double-precision floats,
  use float64_to_float32 & float32_to_float64 to do the appropriate conversion.
Implement stfiwx.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3280 c046a42c-6fe2-441c-8c8c-71466251a162

according to the PowerPC 2.04 specification.


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Share most code with the time-base management routines.
Remove time-base write routines from user-mode emulation environments.


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