Commit fefe54e3f0ea9c5b292b7a7875b1c9809f492b35

Authored by aliguori
1 parent f8b237af

cirrus: cleanup reset handler (Jan Kiszka)

We should not re-register the cirrus io-memory regions on each reset.
Moreover, this patch removes some dead code and pushes other static
field initializations from reset to init_common.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6385 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 27 additions and 34 deletions
hw/cirrus_vga.c
@@ -3183,22 +3183,13 @@ static void cirrus_reset(void *opaque) @@ -3183,22 +3183,13 @@ static void cirrus_reset(void *opaque)
3183 /* 4MB 64 bit memory config, always PCI */ 3183 /* 4MB 64 bit memory config, always PCI */
3184 s->sr[0x1F] = 0x2d; // MemClock 3184 s->sr[0x1F] = 0x2d; // MemClock
3185 s->gr[0x18] = 0x0f; // fastest memory configuration 3185 s->gr[0x18] = 0x0f; // fastest memory configuration
3186 -#if 1  
3187 s->sr[0x0f] = 0x98; 3186 s->sr[0x0f] = 0x98;
3188 s->sr[0x17] = 0x20; 3187 s->sr[0x17] = 0x20;
3189 s->sr[0x15] = 0x04; /* memory size, 3=2MB, 4=4MB */ 3188 s->sr[0x15] = 0x04; /* memory size, 3=2MB, 4=4MB */
3190 - s->real_vram_size = 4096 * 1024;  
3191 -#else  
3192 - s->sr[0x0f] = 0x18;  
3193 - s->sr[0x17] = 0x20;  
3194 - s->sr[0x15] = 0x03; /* memory size, 3=2MB, 4=4MB */  
3195 - s->real_vram_size = 2048 * 1024;  
3196 -#endif  
3197 } else { 3189 } else {
3198 s->sr[0x1F] = 0x22; // MemClock 3190 s->sr[0x1F] = 0x22; // MemClock
3199 s->sr[0x0F] = CIRRUS_MEMSIZE_2M; 3191 s->sr[0x0F] = CIRRUS_MEMSIZE_2M;
3200 s->sr[0x17] = s->bustype; 3192 s->sr[0x17] = s->bustype;
3201 - s->real_vram_size = 2048 * 1024;  
3202 s->sr[0x15] = 0x03; /* memory size, 3=2MB, 4=4MB */ 3193 s->sr[0x15] = 0x03; /* memory size, 3=2MB, 4=4MB */
3203 } 3194 }
3204 s->cr[0x27] = s->device_id; 3195 s->cr[0x27] = s->device_id;
@@ -3209,31 +3200,6 @@ static void cirrus_reset(void *opaque) @@ -3209,31 +3200,6 @@ static void cirrus_reset(void *opaque)
3209 3200
3210 s->cirrus_hidden_dac_lockindex = 5; 3201 s->cirrus_hidden_dac_lockindex = 5;
3211 s->cirrus_hidden_dac_data = 0; 3202 s->cirrus_hidden_dac_data = 0;
3212 -  
3213 - /* I/O handler for LFB */  
3214 - s->cirrus_linear_io_addr =  
3215 - cpu_register_io_memory(0, cirrus_linear_read, cirrus_linear_write,  
3216 - s);  
3217 - s->cirrus_linear_write = cpu_get_io_memory_write(s->cirrus_linear_io_addr);  
3218 -  
3219 - /* I/O handler for LFB */  
3220 - s->cirrus_linear_bitblt_io_addr =  
3221 - cpu_register_io_memory(0, cirrus_linear_bitblt_read, cirrus_linear_bitblt_write,  
3222 - s);  
3223 -  
3224 - /* I/O handler for memory-mapped I/O */  
3225 - s->cirrus_mmio_io_addr =  
3226 - cpu_register_io_memory(0, cirrus_mmio_read, cirrus_mmio_write, s);  
3227 -  
3228 - /* XXX: s->vram_size must be a power of two */  
3229 - s->cirrus_addr_mask = s->real_vram_size - 1;  
3230 - s->linear_mmio_mask = s->real_vram_size - 256;  
3231 -  
3232 - s->get_bpp = cirrus_get_bpp;  
3233 - s->get_offsets = cirrus_get_offsets;  
3234 - s->get_resolution = cirrus_get_resolution;  
3235 - s->cursor_invalidate = cirrus_cursor_invalidate;  
3236 - s->cursor_draw_line = cirrus_cursor_draw_line;  
3237 } 3203 }
3238 3204
3239 static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci) 3205 static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
@@ -3288,6 +3254,33 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci) @@ -3288,6 +3254,33 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
3288 s->vga_io_memory); 3254 s->vga_io_memory);
3289 qemu_register_coalesced_mmio(isa_mem_base + 0x000a0000, 0x20000); 3255 qemu_register_coalesced_mmio(isa_mem_base + 0x000a0000, 0x20000);
3290 3256
  3257 + /* I/O handler for LFB */
  3258 + s->cirrus_linear_io_addr =
  3259 + cpu_register_io_memory(0, cirrus_linear_read, cirrus_linear_write, s);
  3260 + s->cirrus_linear_write = cpu_get_io_memory_write(s->cirrus_linear_io_addr);
  3261 +
  3262 + /* I/O handler for LFB */
  3263 + s->cirrus_linear_bitblt_io_addr =
  3264 + cpu_register_io_memory(0, cirrus_linear_bitblt_read,
  3265 + cirrus_linear_bitblt_write, s);
  3266 +
  3267 + /* I/O handler for memory-mapped I/O */
  3268 + s->cirrus_mmio_io_addr =
  3269 + cpu_register_io_memory(0, cirrus_mmio_read, cirrus_mmio_write, s);
  3270 +
  3271 + s->real_vram_size =
  3272 + (s->device_id == CIRRUS_ID_CLGD5446) ? 4096 * 1024 : 2048 * 1024;
  3273 +
  3274 + /* XXX: s->vram_size must be a power of two */
  3275 + s->cirrus_addr_mask = s->real_vram_size - 1;
  3276 + s->linear_mmio_mask = s->real_vram_size - 256;
  3277 +
  3278 + s->get_bpp = cirrus_get_bpp;
  3279 + s->get_offsets = cirrus_get_offsets;
  3280 + s->get_resolution = cirrus_get_resolution;
  3281 + s->cursor_invalidate = cirrus_cursor_invalidate;
  3282 + s->cursor_draw_line = cirrus_cursor_draw_line;
  3283 +
3291 qemu_register_reset(cirrus_reset, s); 3284 qemu_register_reset(cirrus_reset, s);
3292 cirrus_reset(s); 3285 cirrus_reset(s);
3293 register_savevm("cirrus_vga", 0, 2, cirrus_vga_save, cirrus_vga_load, s); 3286 register_savevm("cirrus_vga", 0, 2, cirrus_vga_save, cirrus_vga_load, s);