Commit feeb3b6a7afd6be80ea31842171f25ec0c36693d

Authored by Paul Brook
1 parent 53e3c4f9

Fix MIPS SC

Fix botched merge of op_ldst_sc calls to match actual implementation.
Thanks to Aurelien Jarno for diagnosing this.

Signed-off-by: Paul Brook <paul@codesourcery.com>
Showing 1 changed file with 2 additions and 2 deletions
target-mips/translate.c
... ... @@ -1174,13 +1174,13 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
1174 1174 #if defined(TARGET_MIPS64)
1175 1175 case OPC_SCD:
1176 1176 save_cpu_state(ctx, 0);
1177   - op_ldst_scd(t0, t1, t0, ctx);
  1177 + op_ldst_scd(t1, t0, rt, ctx);
1178 1178 opn = "scd";
1179 1179 break;
1180 1180 #endif
1181 1181 case OPC_SC:
1182 1182 save_cpu_state(ctx, 0);
1183   - op_ldst_sc(t0, t1, t0, ctx);
  1183 + op_ldst_sc(t1, t0, rt, ctx);
1184 1184 opn = "sc";
1185 1185 break;
1186 1186 }
... ...