gwj / at91sam9263 · Commits

Commit fe75bcf70d2032e523c4aec8a19a0a1472780c6c

Authored by aurel32
1 parent 44e6acb0

tcg: use TCGV_EQUAL_I{32,64} 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6800 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 11 additions and 11 deletions
tcg/tcg-op.h
  View file @fe75bcf
@@ -318,7 +318,7 @@ static inline void tcg_gen_br(int label) @@ -318,7 +318,7 @@ static inline void tcg_gen_br(int label)
318 318
319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg) 319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
320 { 320 {
321 - if (GET_TCGV_I32(ret) != GET_TCGV_I32(arg)) 321 + if (!TCGV_EQUAL_I32(ret, arg))
322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg); 322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
323 } 323 }
324 324
@@ -625,7 +625,7 @@ static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) @@ -625,7 +625,7 @@ static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
625 625
626 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg) 626 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
627 { 627 {
628 - if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) { 628 + if (!TCGV_EQUAL_I64(ret, arg)) {
629 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 629 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
630 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); 630 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
631 } 631 }
@@ -858,7 +858,7 @@ static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) @@ -858,7 +858,7 @@ static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
858 858
859 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg) 859 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
860 { 860 {
861 - if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) 861 + if (!TCGV_EQUAL_I64(ret, arg))
862 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg); 862 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
863 } 863 }
864 864
@@ -1545,27 +1545,27 @@ static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) @@ -1545,27 +1545,27 @@ static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1545 1545
1546 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1546 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1547 { 1547 {
1548 - if (GET_TCGV_I32(arg1) != GET_TCGV_I32(arg2)) { 1548 + if (TCGV_EQUAL_I32(arg1, arg2)) {
  1549 + tcg_gen_not_i32(ret, arg1);
  1550 + } else {
1549 TCGv_i32 t0; 1551 TCGv_i32 t0;
1550 t0 = tcg_temp_new_i32(); 1552 t0 = tcg_temp_new_i32();
1551 tcg_gen_or_i32(t0, arg1, arg2); 1553 tcg_gen_or_i32(t0, arg1, arg2);
1552 tcg_gen_not_i32(ret, t0); 1554 tcg_gen_not_i32(ret, t0);
1553 tcg_temp_free_i32(t0); 1555 tcg_temp_free_i32(t0);
1554 - } else {  
1555 - tcg_gen_not_i32(ret, arg1);  
1556 } 1556 }
1557 } 1557 }
1558 1558
1559 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1559 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1560 { 1560 {
1561 - if (GET_TCGV_I64(arg1) != GET_TCGV_I64(arg2)) { 1561 + if (TCGV_EQUAL_I64(arg1, arg2)) {
  1562 + tcg_gen_not_i64(ret, arg1);
  1563 + } else {
1562 TCGv_i64 t0; 1564 TCGv_i64 t0;
1563 t0 = tcg_temp_new_i64(); 1565 t0 = tcg_temp_new_i64();
1564 tcg_gen_or_i64(t0, arg1, arg2); 1566 tcg_gen_or_i64(t0, arg1, arg2);
1565 tcg_gen_not_i64(ret, t0); 1567 tcg_gen_not_i64(ret, t0);
1566 tcg_temp_free_i64(t0); 1568 tcg_temp_free_i64(t0);
1567 - } else {  
1568 - tcg_gen_not_i64(ret, arg1);  
1569 } 1569 }
1570 } 1570 }
1571 1571
@@ -1742,7 +1742,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1742,7 +1742,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1742 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32 1742 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1743 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32 1743 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
1744 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x) 1744 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
1745 -#define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b)) 1745 +#define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
1746 #else 1746 #else
1747 #define TCGv TCGv_i64 1747 #define TCGv TCGv_i64
1748 #define tcg_temp_new() tcg_temp_new_i64() 1748 #define tcg_temp_new() tcg_temp_new_i64()
@@ -1753,7 +1753,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1753,7 +1753,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1753 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64 1753 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1754 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64 1754 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
1755 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x) 1755 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
1756 -#define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b)) 1756 +#define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
1757 #endif 1757 #endif
1758 1758
1759 /* debug info: write the PC of the corresponding QEMU CPU instruction */ 1759 /* debug info: write the PC of the corresponding QEMU CPU instruction */