Commit fe09612978318b456558826ef2635ce914eb00b6
1 parent
ea026b2f
Sun4m use 0 for nonexistent devices (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6127 c046a42c-6fe2-441c-8c8c-71466251a162
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1 changed file
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5 additions
and
28 deletions
hw/sun4m.c
... | ... | @@ -505,7 +505,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, |
505 | 505 | cpu_irqs, |
506 | 506 | hwdef->clock_irq); |
507 | 507 | |
508 | - if (hwdef->idreg_base != (target_phys_addr_t)-1) { | |
508 | + if (hwdef->idreg_base) { | |
509 | 509 | static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 }; |
510 | 510 | |
511 | 511 | idreg_offset = qemu_ram_alloc(sizeof(idreg_data)); |
... | ... | @@ -563,7 +563,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, |
563 | 563 | slavio_irq[hwdef->me_irq], cpu_halt[0], |
564 | 564 | &fdc_tc); |
565 | 565 | |
566 | - if (hwdef->fd_base != (target_phys_addr_t)-1) { | |
566 | + if (hwdef->fd_base) { | |
567 | 567 | /* there is zero or one floppy drive */ |
568 | 568 | memset(fd, 0, sizeof(fd)); |
569 | 569 | drive_index = drive_get_index(IF_FLOPPY, 0, 0); |
... | ... | @@ -590,7 +590,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, |
590 | 590 | esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i); |
591 | 591 | } |
592 | 592 | |
593 | - if (hwdef->cs_base != (target_phys_addr_t)-1) | |
593 | + if (hwdef->cs_base) | |
594 | 594 | cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); |
595 | 595 | |
596 | 596 | kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename, |
... | ... | @@ -601,7 +601,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, |
601 | 601 | graphic_height, graphic_depth, hwdef->nvram_machine_id, |
602 | 602 | "Sun4m"); |
603 | 603 | |
604 | - if (hwdef->ecc_base != (target_phys_addr_t)-1) | |
604 | + if (hwdef->ecc_base) | |
605 | 605 | ecc_init(hwdef->ecc_base, slavio_irq[hwdef->ecc_irq], |
606 | 606 | hwdef->ecc_version); |
607 | 607 | |
... | ... | @@ -647,7 +647,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
647 | 647 | .apc_base = 0x6a000000, |
648 | 648 | .aux1_base = 0x71900000, |
649 | 649 | .aux2_base = 0x71910000, |
650 | - .ecc_base = -1, | |
651 | 650 | .vram_size = 0x00100000, |
652 | 651 | .nvram_size = 0x2000, |
653 | 652 | .esp_irq = 18, |
... | ... | @@ -673,7 +672,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
673 | 672 | { |
674 | 673 | .iommu_base = 0xfe0000000ULL, |
675 | 674 | .tcx_base = 0xe20000000ULL, |
676 | - .cs_base = -1, | |
677 | 675 | .slavio_base = 0xff0000000ULL, |
678 | 676 | .ms_kb_base = 0xff1000000ULL, |
679 | 677 | .serial_base = 0xff1100000ULL, |
... | ... | @@ -700,7 +698,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
700 | 698 | .ser_irq = 15, |
701 | 699 | .fd_irq = 22, |
702 | 700 | .me_irq = 30, |
703 | - .cs_irq = -1, | |
704 | 701 | .ecc_irq = 28, |
705 | 702 | .nvram_machine_id = 0x72, |
706 | 703 | .machine_id = ss10_id, |
... | ... | @@ -716,15 +713,12 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
716 | 713 | { |
717 | 714 | .iommu_base = 0xfe0000000ULL, |
718 | 715 | .tcx_base = 0xe20000000ULL, |
719 | - .cs_base = -1, | |
720 | 716 | .slavio_base = 0xff0000000ULL, |
721 | 717 | .ms_kb_base = 0xff1000000ULL, |
722 | 718 | .serial_base = 0xff1100000ULL, |
723 | 719 | .nvram_base = 0xff1200000ULL, |
724 | - .fd_base = -1, | |
725 | 720 | .counter_base = 0xff1300000ULL, |
726 | 721 | .intctl_base = 0xff1400000ULL, |
727 | - .idreg_base = -1, | |
728 | 722 | .dma_base = 0xef0081000ULL, |
729 | 723 | .esp_base = 0xef0080000ULL, |
730 | 724 | .le_base = 0xef0060000ULL, |
... | ... | @@ -743,7 +737,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
743 | 737 | .ser_irq = 15, |
744 | 738 | .fd_irq = 22, |
745 | 739 | .me_irq = 30, |
746 | - .cs_irq = -1, | |
747 | 740 | .ecc_irq = 28, |
748 | 741 | .nvram_machine_id = 0x71, |
749 | 742 | .machine_id = ss600mp_id, |
... | ... | @@ -759,7 +752,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
759 | 752 | { |
760 | 753 | .iommu_base = 0xfe0000000ULL, |
761 | 754 | .tcx_base = 0xe20000000ULL, |
762 | - .cs_base = -1, | |
763 | 755 | .slavio_base = 0xff0000000ULL, |
764 | 756 | .ms_kb_base = 0xff1000000ULL, |
765 | 757 | .serial_base = 0xff1100000ULL, |
... | ... | @@ -786,7 +778,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
786 | 778 | .ser_irq = 15, |
787 | 779 | .fd_irq = 22, |
788 | 780 | .me_irq = 30, |
789 | - .cs_irq = -1, | |
790 | 781 | .ecc_irq = 28, |
791 | 782 | .nvram_machine_id = 0x72, |
792 | 783 | .machine_id = ss20_id, |
... | ... | @@ -802,7 +793,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
802 | 793 | { |
803 | 794 | .iommu_base = 0x10000000, |
804 | 795 | .tcx_base = 0x50000000, |
805 | - .cs_base = -1, | |
806 | 796 | .slavio_base = 0x70000000, |
807 | 797 | .ms_kb_base = 0x71000000, |
808 | 798 | .serial_base = 0x71100000, |
... | ... | @@ -817,7 +807,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
817 | 807 | .apc_base = 0x71300000, // pmc |
818 | 808 | .aux1_base = 0x71900000, |
819 | 809 | .aux2_base = 0x71910000, |
820 | - .ecc_base = -1, | |
821 | 810 | .vram_size = 0x00100000, |
822 | 811 | .nvram_size = 0x2000, |
823 | 812 | .esp_irq = 18, |
... | ... | @@ -828,7 +817,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
828 | 817 | .ser_irq = 15, |
829 | 818 | .fd_irq = 22, |
830 | 819 | .me_irq = 30, |
831 | - .cs_irq = -1, | |
832 | 820 | .nvram_machine_id = 0x80, |
833 | 821 | .machine_id = vger_id, |
834 | 822 | .iommu_version = 0x05000000, |
... | ... | @@ -843,7 +831,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
843 | 831 | { |
844 | 832 | .iommu_base = 0x10000000, |
845 | 833 | .tcx_base = 0x50000000, |
846 | - .cs_base = -1, | |
847 | 834 | .slavio_base = 0x70000000, |
848 | 835 | .ms_kb_base = 0x71000000, |
849 | 836 | .serial_base = 0x71100000, |
... | ... | @@ -855,10 +842,8 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
855 | 842 | .dma_base = 0x78400000, |
856 | 843 | .esp_base = 0x78800000, |
857 | 844 | .le_base = 0x78c00000, |
858 | - .apc_base = -1, | |
859 | 845 | .aux1_base = 0x71900000, |
860 | 846 | .aux2_base = 0x71910000, |
861 | - .ecc_base = -1, | |
862 | 847 | .vram_size = 0x00100000, |
863 | 848 | .nvram_size = 0x2000, |
864 | 849 | .esp_irq = 18, |
... | ... | @@ -869,7 +854,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
869 | 854 | .ser_irq = 15, |
870 | 855 | .fd_irq = 22, |
871 | 856 | .me_irq = 30, |
872 | - .cs_irq = -1, | |
873 | 857 | .nvram_machine_id = 0x80, |
874 | 858 | .machine_id = lx_id, |
875 | 859 | .iommu_version = 0x04000000, |
... | ... | @@ -899,7 +883,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
899 | 883 | .apc_base = 0x6a000000, |
900 | 884 | .aux1_base = 0x71900000, |
901 | 885 | .aux2_base = 0x71910000, |
902 | - .ecc_base = -1, | |
903 | 886 | .vram_size = 0x00100000, |
904 | 887 | .nvram_size = 0x2000, |
905 | 888 | .esp_irq = 18, |
... | ... | @@ -925,7 +908,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
925 | 908 | { |
926 | 909 | .iommu_base = 0x10000000, |
927 | 910 | .tcx_base = 0x50000000, |
928 | - .cs_base = -1, | |
929 | 911 | .slavio_base = 0x70000000, |
930 | 912 | .ms_kb_base = 0x71000000, |
931 | 913 | .serial_base = 0x71100000, |
... | ... | @@ -940,7 +922,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
940 | 922 | .apc_base = 0x6a000000, |
941 | 923 | .aux1_base = 0x71900000, |
942 | 924 | .aux2_base = 0x71910000, |
943 | - .ecc_base = -1, | |
944 | 925 | .vram_size = 0x00100000, |
945 | 926 | .nvram_size = 0x2000, |
946 | 927 | .esp_irq = 18, |
... | ... | @@ -951,7 +932,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
951 | 932 | .ser_irq = 15, |
952 | 933 | .fd_irq = 22, |
953 | 934 | .me_irq = 30, |
954 | - .cs_irq = -1, | |
955 | 935 | .nvram_machine_id = 0x80, |
956 | 936 | .machine_id = scls_id, |
957 | 937 | .iommu_version = 0x05000000, |
... | ... | @@ -966,7 +946,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
966 | 946 | { |
967 | 947 | .iommu_base = 0x10000000, |
968 | 948 | .tcx_base = 0x50000000, // XXX |
969 | - .cs_base = -1, | |
970 | 949 | .slavio_base = 0x70000000, |
971 | 950 | .ms_kb_base = 0x71000000, |
972 | 951 | .serial_base = 0x71100000, |
... | ... | @@ -981,7 +960,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
981 | 960 | .apc_base = 0x6a000000, |
982 | 961 | .aux1_base = 0x71900000, |
983 | 962 | .aux2_base = 0x71910000, |
984 | - .ecc_base = -1, | |
985 | 963 | .vram_size = 0x00100000, |
986 | 964 | .nvram_size = 0x2000, |
987 | 965 | .esp_irq = 18, |
... | ... | @@ -992,7 +970,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = { |
992 | 970 | .ser_irq = 15, |
993 | 971 | .fd_irq = 22, |
994 | 972 | .me_irq = 30, |
995 | - .cs_irq = -1, | |
996 | 973 | .nvram_machine_id = 0x80, |
997 | 974 | .machine_id = sbook_id, |
998 | 975 | .iommu_version = 0x05000000, |
... | ... | @@ -1584,7 +1561,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size, |
1584 | 1561 | slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], |
1585 | 1562 | serial_hds[1], serial_hds[0]); |
1586 | 1563 | |
1587 | - slavio_misc = slavio_misc_init(0, -1, hwdef->aux1_base, -1, | |
1564 | + slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0, | |
1588 | 1565 | slavio_irq[hwdef->me_irq], NULL, &fdc_tc); |
1589 | 1566 | |
1590 | 1567 | if (hwdef->fd_base != (target_phys_addr_t)-1) { | ... | ... |