Commit fce5ecb7808bee2858789c9e56cb3d3d16e9d37f

Authored by aurel32
1 parent 9bdba1b6

Fix compilation of PPC64 targets with DEBUG_TCGV enabled

The attached patch fixes compilation of PPC64 targets with DEBUG_TCGV
enabled.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6502 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 3 additions and 3 deletions
target-ppc/translate.c
... ... @@ -6263,7 +6263,7 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC)
6263 6263 t = tcg_temp_new_i32();
6264 6264 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUState, vscr));
6265 6265 tcg_gen_extu_i32_i64(cpu_avrl[rD(ctx->opcode)], t);
6266   - tcg_temp_free(t);
  6266 + tcg_temp_free_i32(t);
6267 6267 }
6268 6268  
6269 6269 GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC)
... ... @@ -6511,7 +6511,7 @@ GEN_VXFORM_UIMM(vspltw, 6, 10);
6511 6511 GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
6512 6512 {
6513 6513 TCGv_ptr ra, rb, rd;
6514   - TCGv sh;
  6514 + TCGv_i32 sh;
6515 6515 if (unlikely(!ctx->altivec_enabled)) {
6516 6516 gen_exception(ctx, POWERPC_EXCP_VPU);
6517 6517 return;
... ... @@ -6524,7 +6524,7 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC)
6524 6524 tcg_temp_free_ptr(ra);
6525 6525 tcg_temp_free_ptr(rb);
6526 6526 tcg_temp_free_ptr(rd);
6527   - tcg_temp_free(sh);
  6527 + tcg_temp_free_i32(sh);
6528 6528 }
6529 6529  
6530 6530 #define GEN_VAFORM_PAIRED(name0, name1, opc2) \
... ...