Commit fc1c67bc2a43a53f7315b602e0c67f9604835fe1
1 parent
efcfd0c5
Fix PPC reset
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4 changed files
with
28 additions
and
21 deletions
target-ppc/cpu.h
| ... | ... | @@ -654,6 +654,7 @@ struct CPUPPCState { |
| 654 | 654 | /* Exception vectors */ |
| 655 | 655 | target_ulong excp_vectors[POWERPC_EXCP_NB]; |
| 656 | 656 | target_ulong excp_prefix; |
| 657 | + target_ulong hreset_excp_prefix; | |
| 657 | 658 | target_ulong ivor_mask; |
| 658 | 659 | target_ulong ivpr_mask; |
| 659 | 660 | target_ulong hreset_vector; |
| ... | ... | @@ -802,7 +803,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); |
| 802 | 803 | #define cpu_signal_handler cpu_ppc_signal_handler |
| 803 | 804 | #define cpu_list ppc_cpu_list |
| 804 | 805 | |
| 805 | -#define CPU_SAVE_VERSION 3 | |
| 806 | +#define CPU_SAVE_VERSION 4 | |
| 806 | 807 | |
| 807 | 808 | /* MMU modes definitions */ |
| 808 | 809 | #define MMU_MODE0_SUFFIX _user | ... | ... |
target-ppc/helper.c
| ... | ... | @@ -2796,6 +2796,7 @@ void cpu_ppc_reset (void *opaque) |
| 2796 | 2796 | msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ |
| 2797 | 2797 | msr |= (target_ulong)1 << MSR_PR; |
| 2798 | 2798 | #else |
| 2799 | + env->excp_prefix = env->hreset_excp_prefix; | |
| 2799 | 2800 | env->nip = env->hreset_vector | env->excp_prefix; |
| 2800 | 2801 | if (env->mmu_model != POWERPC_MMU_REAL) |
| 2801 | 2802 | ppc_tlb_invalidate_all(env); | ... | ... |
target-ppc/machine.c
| ... | ... | @@ -87,6 +87,7 @@ void cpu_save(QEMUFile *f, void *opaque) |
| 87 | 87 | for (i = 0; i < POWERPC_EXCP_NB; i++) |
| 88 | 88 | qemu_put_betls(f, &env->excp_vectors[i]); |
| 89 | 89 | qemu_put_betls(f, &env->excp_prefix); |
| 90 | + qemu_put_betls(f, &env->hreset_excp_prefix); | |
| 90 | 91 | qemu_put_betls(f, &env->ivor_mask); |
| 91 | 92 | qemu_put_betls(f, &env->ivpr_mask); |
| 92 | 93 | qemu_put_betls(f, &env->hreset_vector); |
| ... | ... | @@ -173,6 +174,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) |
| 173 | 174 | for (i = 0; i < POWERPC_EXCP_NB; i++) |
| 174 | 175 | qemu_get_betls(f, &env->excp_vectors[i]); |
| 175 | 176 | qemu_get_betls(f, &env->excp_prefix); |
| 177 | + qemu_get_betls(f, &env->hreset_excp_prefix); | |
| 176 | 178 | qemu_get_betls(f, &env->ivor_mask); |
| 177 | 179 | qemu_get_betls(f, &env->ivpr_mask); |
| 178 | 180 | qemu_get_betls(f, &env->hreset_vector); | ... | ... |
target-ppc/translate_init.c
| ... | ... | @@ -2609,7 +2609,7 @@ static void init_excp_4xx_real (CPUPPCState *env) |
| 2609 | 2609 | env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010; |
| 2610 | 2610 | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020; |
| 2611 | 2611 | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000; |
| 2612 | - env->excp_prefix = 0x00000000UL; | |
| 2612 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2613 | 2613 | env->ivor_mask = 0x0000FFF0UL; |
| 2614 | 2614 | env->ivpr_mask = 0xFFFF0000UL; |
| 2615 | 2615 | /* Hardware reset vector */ |
| ... | ... | @@ -2634,7 +2634,7 @@ static void init_excp_4xx_softmmu (CPUPPCState *env) |
| 2634 | 2634 | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001100; |
| 2635 | 2635 | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001200; |
| 2636 | 2636 | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000; |
| 2637 | - env->excp_prefix = 0x00000000UL; | |
| 2637 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2638 | 2638 | env->ivor_mask = 0x0000FFF0UL; |
| 2639 | 2639 | env->ivpr_mask = 0xFFFF0000UL; |
| 2640 | 2640 | /* Hardware reset vector */ |
| ... | ... | @@ -2660,7 +2660,7 @@ static void init_excp_MPC5xx (CPUPPCState *env) |
| 2660 | 2660 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00; |
| 2661 | 2661 | env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00; |
| 2662 | 2662 | env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00; |
| 2663 | - env->excp_prefix = 0x00000000UL; | |
| 2663 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2664 | 2664 | env->ivor_mask = 0x0000FFF0UL; |
| 2665 | 2665 | env->ivpr_mask = 0xFFFF0000UL; |
| 2666 | 2666 | /* Hardware reset vector */ |
| ... | ... | @@ -2692,7 +2692,7 @@ static void init_excp_MPC8xx (CPUPPCState *env) |
| 2692 | 2692 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00; |
| 2693 | 2693 | env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00; |
| 2694 | 2694 | env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00; |
| 2695 | - env->excp_prefix = 0x00000000UL; | |
| 2695 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2696 | 2696 | env->ivor_mask = 0x0000FFF0UL; |
| 2697 | 2697 | env->ivpr_mask = 0xFFFF0000UL; |
| 2698 | 2698 | /* Hardware reset vector */ |
| ... | ... | @@ -2720,7 +2720,7 @@ static void init_excp_G2 (CPUPPCState *env) |
| 2720 | 2720 | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200; |
| 2721 | 2721 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2722 | 2722 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2723 | - env->excp_prefix = 0x00000000UL; | |
| 2723 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2724 | 2724 | /* Hardware reset vector */ |
| 2725 | 2725 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2726 | 2726 | #endif |
| ... | ... | @@ -2749,7 +2749,7 @@ static void init_excp_e200 (CPUPPCState *env) |
| 2749 | 2749 | env->excp_vectors[POWERPC_EXCP_SPEU] = 0x00000000; |
| 2750 | 2750 | env->excp_vectors[POWERPC_EXCP_EFPDI] = 0x00000000; |
| 2751 | 2751 | env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000; |
| 2752 | - env->excp_prefix = 0x00000000UL; | |
| 2752 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2753 | 2753 | env->ivor_mask = 0x0000FFF7UL; |
| 2754 | 2754 | env->ivpr_mask = 0xFFFF0000UL; |
| 2755 | 2755 | /* Hardware reset vector */ |
| ... | ... | @@ -2776,7 +2776,7 @@ static void init_excp_BookE (CPUPPCState *env) |
| 2776 | 2776 | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000; |
| 2777 | 2777 | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000; |
| 2778 | 2778 | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000; |
| 2779 | - env->excp_prefix = 0x00000000UL; | |
| 2779 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2780 | 2780 | env->ivor_mask = 0x0000FFE0UL; |
| 2781 | 2781 | env->ivpr_mask = 0xFFFF0000UL; |
| 2782 | 2782 | /* Hardware reset vector */ |
| ... | ... | @@ -2799,7 +2799,7 @@ static void init_excp_601 (CPUPPCState *env) |
| 2799 | 2799 | env->excp_vectors[POWERPC_EXCP_IO] = 0x00000A00; |
| 2800 | 2800 | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00; |
| 2801 | 2801 | env->excp_vectors[POWERPC_EXCP_RUNM] = 0x00002000; |
| 2802 | - env->excp_prefix = 0xFFF00000UL; | |
| 2802 | + env->hreset_excp_prefix = 0xFFF00000UL; | |
| 2803 | 2803 | /* Hardware reset vector */ |
| 2804 | 2804 | env->hreset_vector = 0x00000100UL; |
| 2805 | 2805 | #endif |
| ... | ... | @@ -2827,7 +2827,7 @@ static void init_excp_602 (CPUPPCState *env) |
| 2827 | 2827 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2828 | 2828 | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001500; |
| 2829 | 2829 | env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001600; |
| 2830 | - env->excp_prefix = 0xFFF00000UL; | |
| 2830 | + env->hreset_excp_prefix = 0xFFF00000UL; | |
| 2831 | 2831 | /* Hardware reset vector */ |
| 2832 | 2832 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2833 | 2833 | #endif |
| ... | ... | @@ -2852,7 +2852,7 @@ static void init_excp_603 (CPUPPCState *env) |
| 2852 | 2852 | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200; |
| 2853 | 2853 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2854 | 2854 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2855 | - env->excp_prefix = 0x00000000UL; | |
| 2855 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2856 | 2856 | /* Hardware reset vector */ |
| 2857 | 2857 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2858 | 2858 | #endif |
| ... | ... | @@ -2875,7 +2875,7 @@ static void init_excp_604 (CPUPPCState *env) |
| 2875 | 2875 | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; |
| 2876 | 2876 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2877 | 2877 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2878 | - env->excp_prefix = 0x00000000UL; | |
| 2878 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2879 | 2879 | /* Hardware reset vector */ |
| 2880 | 2880 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2881 | 2881 | #endif |
| ... | ... | @@ -2899,7 +2899,7 @@ static void init_excp_620 (CPUPPCState *env) |
| 2899 | 2899 | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; |
| 2900 | 2900 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2901 | 2901 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2902 | - env->excp_prefix = 0xFFF00000UL; | |
| 2902 | + env->hreset_excp_prefix = 0xFFF00000UL; | |
| 2903 | 2903 | /* Hardware reset vector */ |
| 2904 | 2904 | env->hreset_vector = 0x0000000000000100ULL; |
| 2905 | 2905 | #endif |
| ... | ... | @@ -2924,7 +2924,7 @@ static void init_excp_7x0 (CPUPPCState *env) |
| 2924 | 2924 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2925 | 2925 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2926 | 2926 | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; |
| 2927 | - env->excp_prefix = 0x00000000UL; | |
| 2927 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2928 | 2928 | /* Hardware reset vector */ |
| 2929 | 2929 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2930 | 2930 | #endif |
| ... | ... | @@ -2947,7 +2947,7 @@ static void init_excp_750cl (CPUPPCState *env) |
| 2947 | 2947 | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; |
| 2948 | 2948 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2949 | 2949 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 2950 | - env->excp_prefix = 0x00000000UL; | |
| 2950 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2951 | 2951 | /* Hardware reset vector */ |
| 2952 | 2952 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2953 | 2953 | #endif |
| ... | ... | @@ -2970,7 +2970,7 @@ static void init_excp_750cx (CPUPPCState *env) |
| 2970 | 2970 | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; |
| 2971 | 2971 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2972 | 2972 | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; |
| 2973 | - env->excp_prefix = 0x00000000UL; | |
| 2973 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 2974 | 2974 | /* Hardware reset vector */ |
| 2975 | 2975 | env->hreset_vector = 0xFFFFFFFCUL; |
| 2976 | 2976 | #endif |
| ... | ... | @@ -2998,7 +2998,7 @@ static void init_excp_7x5 (CPUPPCState *env) |
| 2998 | 2998 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 2999 | 2999 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 3000 | 3000 | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; |
| 3001 | - env->excp_prefix = 0x00000000UL; | |
| 3001 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 3002 | 3002 | /* Hardware reset vector */ |
| 3003 | 3003 | env->hreset_vector = 0xFFFFFFFCUL; |
| 3004 | 3004 | #endif |
| ... | ... | @@ -3024,7 +3024,7 @@ static void init_excp_7400 (CPUPPCState *env) |
| 3024 | 3024 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 3025 | 3025 | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600; |
| 3026 | 3026 | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; |
| 3027 | - env->excp_prefix = 0x00000000UL; | |
| 3027 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 3028 | 3028 | /* Hardware reset vector */ |
| 3029 | 3029 | env->hreset_vector = 0xFFFFFFFCUL; |
| 3030 | 3030 | #endif |
| ... | ... | @@ -3052,7 +3052,7 @@ static void init_excp_7450 (CPUPPCState *env) |
| 3052 | 3052 | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; |
| 3053 | 3053 | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; |
| 3054 | 3054 | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600; |
| 3055 | - env->excp_prefix = 0x00000000UL; | |
| 3055 | + env->hreset_excp_prefix = 0x00000000UL; | |
| 3056 | 3056 | /* Hardware reset vector */ |
| 3057 | 3057 | env->hreset_vector = 0xFFFFFFFCUL; |
| 3058 | 3058 | #endif |
| ... | ... | @@ -3082,7 +3082,7 @@ static void init_excp_970 (CPUPPCState *env) |
| 3082 | 3082 | env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600; |
| 3083 | 3083 | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700; |
| 3084 | 3084 | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800; |
| 3085 | - env->excp_prefix = 0x00000000FFF00000ULL; | |
| 3085 | + env->hreset_excp_prefix = 0x00000000FFF00000ULL; | |
| 3086 | 3086 | /* Hardware reset vector */ |
| 3087 | 3087 | env->hreset_vector = 0x0000000000000100ULL; |
| 3088 | 3088 | #endif |
| ... | ... | @@ -8892,7 +8892,7 @@ static void init_ppc_proc (CPUPPCState *env, const ppc_def_t *def) |
| 8892 | 8892 | /* Set all exception vectors to an invalid address */ |
| 8893 | 8893 | for (i = 0; i < POWERPC_EXCP_NB; i++) |
| 8894 | 8894 | env->excp_vectors[i] = (target_ulong)(-1ULL); |
| 8895 | - env->excp_prefix = 0x00000000; | |
| 8895 | + env->hreset_excp_prefix = 0x00000000; | |
| 8896 | 8896 | env->ivor_mask = 0x00000000; |
| 8897 | 8897 | env->ivpr_mask = 0x00000000; |
| 8898 | 8898 | /* Default MMU definitions */ |
| ... | ... | @@ -8922,6 +8922,9 @@ static void init_ppc_proc (CPUPPCState *env, const ppc_def_t *def) |
| 8922 | 8922 | } |
| 8923 | 8923 | /* PowerPC implementation specific initialisations (SPRs, timers, ...) */ |
| 8924 | 8924 | (*def->init_proc)(env); |
| 8925 | +#if !defined(CONFIG_USER_ONLY) | |
| 8926 | + env->excp_prefix = env->hreset_excp_prefix; | |
| 8927 | +#endif | |
| 8925 | 8928 | /* MSR bits & flags consistency checks */ |
| 8926 | 8929 | if (env->msr_mask & (1 << 25)) { |
| 8927 | 8930 | switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) { | ... | ... |