Commit fa407c030c2bb592b4f9a7152517815a047007e6

Authored by aurel32
1 parent cf360a32

target-ppc: convert external load/store instructions to TCG

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5831 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/op.c
@@ -257,22 +257,6 @@ void OPPROTO op_srli_T1 (void) @@ -257,22 +257,6 @@ void OPPROTO op_srli_T1 (void)
257 RETURN(); 257 RETURN();
258 } 258 }
259 259
260 -/* Load and store */  
261 -#define MEMSUFFIX _raw  
262 -#include "op_helper.h"  
263 -#include "op_mem.h"  
264 -#if !defined(CONFIG_USER_ONLY)  
265 -#define MEMSUFFIX _user  
266 -#include "op_helper.h"  
267 -#include "op_mem.h"  
268 -#define MEMSUFFIX _kernel  
269 -#include "op_helper.h"  
270 -#include "op_mem.h"  
271 -#define MEMSUFFIX _hypv  
272 -#include "op_helper.h"  
273 -#include "op_mem.h"  
274 -#endif  
275 -  
276 /* Return from interrupt */ 260 /* Return from interrupt */
277 #if !defined(CONFIG_USER_ONLY) 261 #if !defined(CONFIG_USER_ONLY)
278 void OPPROTO op_rfi (void) 262 void OPPROTO op_rfi (void)
target-ppc/op_mem.h deleted 100644 → 0
1 -/*  
2 - * PowerPC emulation micro-operations for qemu.  
3 - *  
4 - * Copyright (c) 2003-2007 Jocelyn Mayer  
5 - *  
6 - * This library is free software; you can redistribute it and/or  
7 - * modify it under the terms of the GNU Lesser General Public  
8 - * License as published by the Free Software Foundation; either  
9 - * version 2 of the License, or (at your option) any later version.  
10 - *  
11 - * This library is distributed in the hope that it will be useful,  
12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of  
13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU  
14 - * Lesser General Public License for more details.  
15 - *  
16 - * You should have received a copy of the GNU Lesser General Public  
17 - * License along with this library; if not, write to the Free Software  
18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA  
19 - */  
20 -  
21 -#include "op_mem_access.h"  
22 -  
23 -/* External access */  
24 -void OPPROTO glue(op_eciwx, MEMSUFFIX) (void)  
25 -{  
26 - T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);  
27 - RETURN();  
28 -}  
29 -  
30 -#if defined(TARGET_PPC64)  
31 -void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void)  
32 -{  
33 - T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);  
34 - RETURN();  
35 -}  
36 -#endif  
37 -  
38 -void OPPROTO glue(op_ecowx, MEMSUFFIX) (void)  
39 -{  
40 - glue(st32, MEMSUFFIX)((uint32_t)T0, T1);  
41 - RETURN();  
42 -}  
43 -  
44 -#if defined(TARGET_PPC64)  
45 -void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void)  
46 -{  
47 - glue(st32, MEMSUFFIX)((uint64_t)T0, T1);  
48 - RETURN();  
49 -}  
50 -#endif  
51 -  
52 -void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void)  
53 -{  
54 - T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);  
55 - RETURN();  
56 -}  
57 -  
58 -#if defined(TARGET_PPC64)  
59 -void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void)  
60 -{  
61 - T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);  
62 - RETURN();  
63 -}  
64 -#endif  
65 -  
66 -void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void)  
67 -{  
68 - glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);  
69 - RETURN();  
70 -}  
71 -  
72 -#if defined(TARGET_PPC64)  
73 -void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void)  
74 -{  
75 - glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);  
76 - RETURN();  
77 -}  
78 -#endif  
79 -  
80 -#undef MEMSUFFIX  
target-ppc/translate.c
@@ -2490,37 +2490,6 @@ static always_inline void gen_check_align (DisasContext *ctx, TCGv EA, int mask) @@ -2490,37 +2490,6 @@ static always_inline void gen_check_align (DisasContext *ctx, TCGv EA, int mask)
2490 tcg_temp_free(t0); 2490 tcg_temp_free(t0);
2491 } 2491 }
2492 2492
2493 -#if defined(TARGET_PPC64)  
2494 -#define _GEN_MEM_FUNCS(name, mode) \  
2495 - &gen_op_##name##_##mode, \  
2496 - &gen_op_##name##_le_##mode, \  
2497 - &gen_op_##name##_64_##mode, \  
2498 - &gen_op_##name##_le_64_##mode  
2499 -#else  
2500 -#define _GEN_MEM_FUNCS(name, mode) \  
2501 - &gen_op_##name##_##mode, \  
2502 - &gen_op_##name##_le_##mode  
2503 -#endif  
2504 -#if defined(CONFIG_USER_ONLY)  
2505 -#if defined(TARGET_PPC64)  
2506 -#define NB_MEM_FUNCS 4  
2507 -#else  
2508 -#define NB_MEM_FUNCS 2  
2509 -#endif  
2510 -#define GEN_MEM_FUNCS(name) \  
2511 - _GEN_MEM_FUNCS(name, raw)  
2512 -#else  
2513 -#if defined(TARGET_PPC64)  
2514 -#define NB_MEM_FUNCS 12  
2515 -#else  
2516 -#define NB_MEM_FUNCS 6  
2517 -#endif  
2518 -#define GEN_MEM_FUNCS(name) \  
2519 - _GEN_MEM_FUNCS(name, user), \  
2520 - _GEN_MEM_FUNCS(name, kernel), \  
2521 - _GEN_MEM_FUNCS(name, hypv)  
2522 -#endif  
2523 -  
2524 /*** Integer load ***/ 2493 /*** Integer load ***/
2525 #if defined(TARGET_PPC64) 2494 #if defined(TARGET_PPC64)
2526 #define GEN_QEMU_LD_PPC64(width) \ 2495 #define GEN_QEMU_LD_PPC64(width) \
@@ -4427,32 +4396,28 @@ GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI) @@ -4427,32 +4396,28 @@ GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI)
4427 4396
4428 /*** External control ***/ 4397 /*** External control ***/
4429 /* Optional: */ 4398 /* Optional: */
4430 -#define op_eciwx() (*gen_op_eciwx[ctx->mem_idx])()  
4431 -#define op_ecowx() (*gen_op_ecowx[ctx->mem_idx])()  
4432 -static GenOpFunc *gen_op_eciwx[NB_MEM_FUNCS] = {  
4433 - GEN_MEM_FUNCS(eciwx),  
4434 -};  
4435 -static GenOpFunc *gen_op_ecowx[NB_MEM_FUNCS] = {  
4436 - GEN_MEM_FUNCS(ecowx),  
4437 -};  
4438 -  
4439 /* eciwx */ 4399 /* eciwx */
4440 GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN) 4400 GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN)
4441 { 4401 {
4442 - /* Should check EAR[E] & alignment ! */ 4402 + /* Should check EAR[E] ! */
  4403 + TCGv t0 = tcg_temp_new();
4443 gen_set_access_type(ACCESS_RES); 4404 gen_set_access_type(ACCESS_RES);
4444 - gen_addr_reg_index(cpu_T[0], ctx);  
4445 - op_eciwx();  
4446 - tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); 4405 + gen_addr_reg_index(t0, ctx);
  4406 + gen_check_align(ctx, t0, 0x03);
  4407 + gen_qemu_ld32u(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx);
  4408 + tcg_temp_free(t0);
4447 } 4409 }
4448 4410
4449 /* ecowx */ 4411 /* ecowx */
4450 GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN) 4412 GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN)
4451 { 4413 {
4452 - /* Should check EAR[E] & alignment ! */  
4453 - gen_addr_reg_index(cpu_T[0], ctx);  
4454 - tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rS(ctx->opcode)]);  
4455 - op_ecowx(); 4414 + /* Should check EAR[E] ! */
  4415 + TCGv t0 = tcg_temp_new();
  4416 + gen_set_access_type(ACCESS_RES);
  4417 + gen_addr_reg_index(t0, ctx);
  4418 + gen_check_align(ctx, t0, 0x03);
  4419 + gen_qemu_st32(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx);
  4420 + tcg_temp_free(t0);
4456 } 4421 }
4457 4422
4458 /* PowerPC 601 specific instructions */ 4423 /* PowerPC 601 specific instructions */