Commit fa3966a3dce483496e7a203fc2399bb4fb2e470a

Authored by aurel32
1 parent 4ad4ce16

target-ppc: use the new bswap* TCG ops

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6835 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 15 additions and 114 deletions
target-ppc/translate.c
@@ -2580,35 +2580,16 @@ static always_inline void gen_qemu_ld16u(DisasContext *ctx, TCGv arg1, TCGv arg2 @@ -2580,35 +2580,16 @@ static always_inline void gen_qemu_ld16u(DisasContext *ctx, TCGv arg1, TCGv arg2
2580 { 2580 {
2581 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx); 2581 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
2582 if (unlikely(ctx->le_mode)) { 2582 if (unlikely(ctx->le_mode)) {
2583 -#if defined(TARGET_PPC64)  
2584 - TCGv_i32 t0 = tcg_temp_new_i32();  
2585 - tcg_gen_trunc_tl_i32(t0, arg1);  
2586 - tcg_gen_bswap16_i32(t0, t0);  
2587 - tcg_gen_extu_i32_tl(arg1, t0);  
2588 - tcg_temp_free_i32(t0);  
2589 -#else  
2590 - tcg_gen_bswap16_i32(arg1, arg1);  
2591 -#endif 2583 + tcg_gen_bswap16_tl(arg1, arg1);
2592 } 2584 }
2593 } 2585 }
2594 2586
2595 static always_inline void gen_qemu_ld16s(DisasContext *ctx, TCGv arg1, TCGv arg2) 2587 static always_inline void gen_qemu_ld16s(DisasContext *ctx, TCGv arg1, TCGv arg2)
2596 { 2588 {
2597 if (unlikely(ctx->le_mode)) { 2589 if (unlikely(ctx->le_mode)) {
2598 -#if defined(TARGET_PPC64)  
2599 - TCGv_i32 t0;  
2600 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx); 2590 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
2601 - t0 = tcg_temp_new_i32();  
2602 - tcg_gen_trunc_tl_i32(t0, arg1);  
2603 - tcg_gen_bswap16_i32(t0, t0);  
2604 - tcg_gen_extu_i32_tl(arg1, t0); 2591 + tcg_gen_bswap16_tl(arg1, arg1);
2605 tcg_gen_ext16s_tl(arg1, arg1); 2592 tcg_gen_ext16s_tl(arg1, arg1);
2606 - tcg_temp_free_i32(t0);  
2607 -#else  
2608 - tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);  
2609 - tcg_gen_bswap16_i32(arg1, arg1);  
2610 - tcg_gen_ext16s_i32(arg1, arg1);  
2611 -#endif  
2612 } else { 2593 } else {
2613 tcg_gen_qemu_ld16s(arg1, arg2, ctx->mem_idx); 2594 tcg_gen_qemu_ld16s(arg1, arg2, ctx->mem_idx);
2614 } 2595 }
@@ -2618,15 +2599,7 @@ static always_inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2 @@ -2618,15 +2599,7 @@ static always_inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2
2618 { 2599 {
2619 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx); 2600 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
2620 if (unlikely(ctx->le_mode)) { 2601 if (unlikely(ctx->le_mode)) {
2621 -#if defined(TARGET_PPC64)  
2622 - TCGv_i32 t0 = tcg_temp_new_i32();  
2623 - tcg_gen_trunc_tl_i32(t0, arg1);  
2624 - tcg_gen_bswap32_i32(t0, t0);  
2625 - tcg_gen_extu_i32_tl(arg1, t0);  
2626 - tcg_temp_free_i32(t0);  
2627 -#else  
2628 - tcg_gen_bswap32_i32(arg1, arg1);  
2629 -#endif 2602 + tcg_gen_bswap32_tl(arg1, arg1);
2630 } 2603 }
2631 } 2604 }
2632 2605
@@ -2634,13 +2607,9 @@ static always_inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2 @@ -2634,13 +2607,9 @@ static always_inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2
2634 static always_inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2) 2607 static always_inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2)
2635 { 2608 {
2636 if (unlikely(ctx->le_mode)) { 2609 if (unlikely(ctx->le_mode)) {
2637 - TCGv_i32 t0;  
2638 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx); 2610 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
2639 - t0 = tcg_temp_new_i32();  
2640 - tcg_gen_trunc_tl_i32(t0, arg1);  
2641 - tcg_gen_bswap32_i32(t0, t0);  
2642 - tcg_gen_ext_i32_tl(arg1, t0);  
2643 - tcg_temp_free_i32(t0); 2611 + tcg_gen_bswap32_tl(arg1, arg1);
  2612 + tcg_gen_ext32s_tl(arg1, arg1);
2644 } else 2613 } else
2645 tcg_gen_qemu_ld32s(arg1, arg2, ctx->mem_idx); 2614 tcg_gen_qemu_ld32s(arg1, arg2, ctx->mem_idx);
2646 } 2615 }
@@ -2662,25 +2631,11 @@ static always_inline void gen_qemu_st8(DisasContext *ctx, TCGv arg1, TCGv arg2) @@ -2662,25 +2631,11 @@ static always_inline void gen_qemu_st8(DisasContext *ctx, TCGv arg1, TCGv arg2)
2662 static always_inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2) 2631 static always_inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2)
2663 { 2632 {
2664 if (unlikely(ctx->le_mode)) { 2633 if (unlikely(ctx->le_mode)) {
2665 -#if defined(TARGET_PPC64)  
2666 - TCGv_i32 t0;  
2667 - TCGv t1;  
2668 - t0 = tcg_temp_new_i32();  
2669 - tcg_gen_trunc_tl_i32(t0, arg1);  
2670 - tcg_gen_ext16u_i32(t0, t0);  
2671 - tcg_gen_bswap16_i32(t0, t0);  
2672 - t1 = tcg_temp_new();  
2673 - tcg_gen_extu_i32_tl(t1, t0);  
2674 - tcg_temp_free_i32(t0);  
2675 - tcg_gen_qemu_st16(t1, arg2, ctx->mem_idx);  
2676 - tcg_temp_free(t1);  
2677 -#else  
2678 TCGv t0 = tcg_temp_new(); 2634 TCGv t0 = tcg_temp_new();
2679 tcg_gen_ext16u_tl(t0, arg1); 2635 tcg_gen_ext16u_tl(t0, arg1);
2680 - tcg_gen_bswap16_i32(t0, t0); 2636 + tcg_gen_bswap16_tl(t0, t0);
2681 tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx); 2637 tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx);
2682 tcg_temp_free(t0); 2638 tcg_temp_free(t0);
2683 -#endif  
2684 } else { 2639 } else {
2685 tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx); 2640 tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx);
2686 } 2641 }
@@ -2689,23 +2644,11 @@ static always_inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2) @@ -2689,23 +2644,11 @@ static always_inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2)
2689 static always_inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv arg2) 2644 static always_inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv arg2)
2690 { 2645 {
2691 if (unlikely(ctx->le_mode)) { 2646 if (unlikely(ctx->le_mode)) {
2692 -#if defined(TARGET_PPC64)  
2693 - TCGv_i32 t0;  
2694 - TCGv t1;  
2695 - t0 = tcg_temp_new_i32();  
2696 - tcg_gen_trunc_tl_i32(t0, arg1);  
2697 - tcg_gen_bswap32_i32(t0, t0);  
2698 - t1 = tcg_temp_new();  
2699 - tcg_gen_extu_i32_tl(t1, t0);  
2700 - tcg_temp_free_i32(t0);  
2701 - tcg_gen_qemu_st32(t1, arg2, ctx->mem_idx);  
2702 - tcg_temp_free(t1);  
2703 -#else  
2704 - TCGv t0 = tcg_temp_new_i32();  
2705 - tcg_gen_bswap32_i32(t0, arg1); 2647 + TCGv t0 = tcg_temp_new();
  2648 + tcg_gen_ext32u_tl(t0, arg1);
  2649 + tcg_gen_bswap32_tl(t0, t0);
2706 tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx); 2650 tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx);
2707 tcg_temp_free(t0); 2651 tcg_temp_free(t0);
2708 -#endif  
2709 } else { 2652 } else {
2710 tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx); 2653 tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx);
2711 } 2654 }
@@ -2993,15 +2936,7 @@ static void always_inline gen_qemu_ld16ur(DisasContext *ctx, TCGv arg1, TCGv arg @@ -2993,15 +2936,7 @@ static void always_inline gen_qemu_ld16ur(DisasContext *ctx, TCGv arg1, TCGv arg
2993 { 2936 {
2994 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx); 2937 tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
2995 if (likely(!ctx->le_mode)) { 2938 if (likely(!ctx->le_mode)) {
2996 -#if defined(TARGET_PPC64)  
2997 - TCGv_i32 t0 = tcg_temp_new_i32();  
2998 - tcg_gen_trunc_tl_i32(t0, arg1);  
2999 - tcg_gen_bswap16_i32(t0, t0);  
3000 - tcg_gen_extu_i32_tl(arg1, t0);  
3001 - tcg_temp_free_i32(t0);  
3002 -#else  
3003 - tcg_gen_bswap16_i32(arg1, arg1);  
3004 -#endif 2939 + tcg_gen_bswap16_tl(arg1, arg1);
3005 } 2940 }
3006 } 2941 }
3007 GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER); 2942 GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
@@ -3011,15 +2946,7 @@ static void always_inline gen_qemu_ld32ur(DisasContext *ctx, TCGv arg1, TCGv arg @@ -3011,15 +2946,7 @@ static void always_inline gen_qemu_ld32ur(DisasContext *ctx, TCGv arg1, TCGv arg
3011 { 2946 {
3012 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx); 2947 tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
3013 if (likely(!ctx->le_mode)) { 2948 if (likely(!ctx->le_mode)) {
3014 -#if defined(TARGET_PPC64)  
3015 - TCGv_i32 t0 = tcg_temp_new_i32();  
3016 - tcg_gen_trunc_tl_i32(t0, arg1);  
3017 - tcg_gen_bswap32_i32(t0, t0);  
3018 - tcg_gen_extu_i32_tl(arg1, t0);  
3019 - tcg_temp_free_i32(t0);  
3020 -#else  
3021 - tcg_gen_bswap32_i32(arg1, arg1);  
3022 -#endif 2949 + tcg_gen_bswap32_tl(arg1, arg1);
3023 } 2950 }
3024 } 2951 }
3025 GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER); 2952 GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
@@ -3028,25 +2955,11 @@ GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER); @@ -3028,25 +2955,11 @@ GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
3028 static void always_inline gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2) 2955 static void always_inline gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2)
3029 { 2956 {
3030 if (likely(!ctx->le_mode)) { 2957 if (likely(!ctx->le_mode)) {
3031 -#if defined(TARGET_PPC64)  
3032 - TCGv_i32 t0;  
3033 - TCGv t1;  
3034 - t0 = tcg_temp_new_i32();  
3035 - tcg_gen_trunc_tl_i32(t0, arg1);  
3036 - tcg_gen_ext16u_i32(t0, t0);  
3037 - tcg_gen_bswap16_i32(t0, t0);  
3038 - t1 = tcg_temp_new();  
3039 - tcg_gen_extu_i32_tl(t1, t0);  
3040 - tcg_temp_free_i32(t0);  
3041 - tcg_gen_qemu_st16(t1, arg2, ctx->mem_idx);  
3042 - tcg_temp_free(t1);  
3043 -#else  
3044 TCGv t0 = tcg_temp_new(); 2958 TCGv t0 = tcg_temp_new();
3045 tcg_gen_ext16u_tl(t0, arg1); 2959 tcg_gen_ext16u_tl(t0, arg1);
3046 - tcg_gen_bswap16_i32(t0, t0); 2960 + tcg_gen_bswap16_tl(t0, t0);
3047 tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx); 2961 tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx);
3048 tcg_temp_free(t0); 2962 tcg_temp_free(t0);
3049 -#endif  
3050 } else { 2963 } else {
3051 tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx); 2964 tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx);
3052 } 2965 }
@@ -3057,23 +2970,11 @@ GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER); @@ -3057,23 +2970,11 @@ GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
3057 static void always_inline gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2) 2970 static void always_inline gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2)
3058 { 2971 {
3059 if (likely(!ctx->le_mode)) { 2972 if (likely(!ctx->le_mode)) {
3060 -#if defined(TARGET_PPC64)  
3061 - TCGv_i32 t0;  
3062 - TCGv t1;  
3063 - t0 = tcg_temp_new_i32();  
3064 - tcg_gen_trunc_tl_i32(t0, arg1);  
3065 - tcg_gen_bswap32_i32(t0, t0);  
3066 - t1 = tcg_temp_new();  
3067 - tcg_gen_extu_i32_tl(t1, t0);  
3068 - tcg_temp_free_i32(t0);  
3069 - tcg_gen_qemu_st32(t1, arg2, ctx->mem_idx);  
3070 - tcg_temp_free(t1);  
3071 -#else  
3072 - TCGv t0 = tcg_temp_new_i32();  
3073 - tcg_gen_bswap32_i32(t0, arg1); 2973 + TCGv t0 = tcg_temp_new();
  2974 + tcg_gen_ext32u_tl(t0, arg1);
  2975 + tcg_gen_bswap32_tl(t0, t0);
3074 tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx); 2976 tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx);
3075 tcg_temp_free(t0); 2977 tcg_temp_free(t0);
3076 -#endif  
3077 } else { 2978 } else {
3078 tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx); 2979 tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx);
3079 } 2980 }