Commit fa28ec521bbc132556a5379f28eff60207cf9d7d
1 parent
d3ffcafe
Sparc32: convert cs4231 to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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3 changed files
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31 additions
and
14 deletions
hw/cs4231.c
@@ -21,8 +21,9 @@ | @@ -21,8 +21,9 @@ | ||
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
22 | * THE SOFTWARE. | 22 | * THE SOFTWARE. |
23 | */ | 23 | */ |
24 | -#include "hw.h" | 24 | + |
25 | #include "sun4m.h" | 25 | #include "sun4m.h" |
26 | +#include "sysbus.h" | ||
26 | 27 | ||
27 | /* debug CS4231 */ | 28 | /* debug CS4231 */ |
28 | //#define DEBUG_CS | 29 | //#define DEBUG_CS |
@@ -36,9 +37,10 @@ | @@ -36,9 +37,10 @@ | ||
36 | #define CS_MAXDREG (CS_DREGS - 1) | 37 | #define CS_MAXDREG (CS_DREGS - 1) |
37 | 38 | ||
38 | typedef struct CSState { | 39 | typedef struct CSState { |
40 | + SysBusDevice busdev; | ||
41 | + qemu_irq irq; | ||
39 | uint32_t regs[CS_REGS]; | 42 | uint32_t regs[CS_REGS]; |
40 | uint8_t dregs[CS_DREGS]; | 43 | uint8_t dregs[CS_DREGS]; |
41 | - void *intctl; | ||
42 | } CSState; | 44 | } CSState; |
43 | 45 | ||
44 | #define CS_RAP(s) ((s)->regs[0] & CS_MAXDREG) | 46 | #define CS_RAP(s) ((s)->regs[0] & CS_MAXDREG) |
@@ -165,16 +167,32 @@ static int cs_load(QEMUFile *f, void *opaque, int version_id) | @@ -165,16 +167,32 @@ static int cs_load(QEMUFile *f, void *opaque, int version_id) | ||
165 | return 0; | 167 | return 0; |
166 | } | 168 | } |
167 | 169 | ||
168 | -void cs_init(target_phys_addr_t base, int irq, void *intctl) | 170 | +static void cs4231_init1(SysBusDevice *dev) |
169 | { | 171 | { |
170 | - int cs_io_memory; | ||
171 | - CSState *s; | 172 | + int io; |
173 | + CSState *s = FROM_SYSBUS(CSState, dev); | ||
172 | 174 | ||
173 | - s = qemu_mallocz(sizeof(CSState)); | 175 | + io = cpu_register_io_memory(cs_mem_read, cs_mem_write, s); |
176 | + sysbus_init_mmio(dev, CS_SIZE, io); | ||
177 | + sysbus_init_irq(dev, &s->irq); | ||
174 | 178 | ||
175 | - cs_io_memory = cpu_register_io_memory(cs_mem_read, cs_mem_write, s); | ||
176 | - cpu_register_physical_memory(base, CS_SIZE, cs_io_memory); | ||
177 | - register_savevm("cs4231", base, 1, cs_save, cs_load, s); | 179 | + register_savevm("cs4231", -1, 1, cs_save, cs_load, s); |
178 | qemu_register_reset(cs_reset, s); | 180 | qemu_register_reset(cs_reset, s); |
179 | cs_reset(s); | 181 | cs_reset(s); |
180 | } | 182 | } |
183 | + | ||
184 | +static SysBusDeviceInfo cs4231_info = { | ||
185 | + .init = cs4231_init1, | ||
186 | + .qdev.name = "SUNW,CS4231", | ||
187 | + .qdev.size = sizeof(CSState), | ||
188 | + .qdev.props = (DevicePropList[]) { | ||
189 | + {.name = NULL} | ||
190 | + } | ||
191 | +}; | ||
192 | + | ||
193 | +static void cs4231_register_devices(void) | ||
194 | +{ | ||
195 | + sysbus_register_withprop(&cs4231_info); | ||
196 | +} | ||
197 | + | ||
198 | +device_init(cs4231_register_devices) |
hw/sun4m.c
@@ -580,8 +580,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | @@ -580,8 +580,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | ||
580 | espdma_memory_read, espdma_memory_write, | 580 | espdma_memory_read, espdma_memory_write, |
581 | espdma, espdma_irq, esp_reset); | 581 | espdma, espdma_irq, esp_reset); |
582 | 582 | ||
583 | - if (hwdef->cs_base) | ||
584 | - cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); | 583 | + if (hwdef->cs_base) { |
584 | + sysbus_create_simple("SUNW,CS4231", hwdef->cs_base, | ||
585 | + slavio_irq[hwdef->cs_irq]); | ||
586 | + } | ||
585 | 587 | ||
586 | kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename, | 588 | kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename, |
587 | RAM_size); | 589 | RAM_size); |
hw/sun4m.h
@@ -57,9 +57,6 @@ void *slavio_misc_init(target_phys_addr_t base, | @@ -57,9 +57,6 @@ void *slavio_misc_init(target_phys_addr_t base, | ||
57 | void slavio_set_power_fail(void *opaque, int power_failing); | 57 | void slavio_set_power_fail(void *opaque, int power_failing); |
58 | void apc_init(target_phys_addr_t power_base, qemu_irq cpu_halt); | 58 | void apc_init(target_phys_addr_t power_base, qemu_irq cpu_halt); |
59 | 59 | ||
60 | -/* cs4231.c */ | ||
61 | -void cs_init(target_phys_addr_t base, int irq, void *intctl); | ||
62 | - | ||
63 | /* sparc32_dma.c */ | 60 | /* sparc32_dma.c */ |
64 | #include "sparc32_dma.h" | 61 | #include "sparc32_dma.h" |
65 | 62 |