gwj / at91sam9263 · Commits

Commit f9480ffc140bbdde991fd33c534cc146501a1db0

Authored by ths
1 parent dfb5e54b

Fix remaining compiler warnings for mips targets. 

Signed-off-by: Stefan Weil <weil@mail.berlios.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 6 changed files with 26 additions and 26 deletions
cpu-exec.c
  View file @f9480ff
... ... @@ -1008,7 +1008,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
1008 1008 /* we restore the process signal mask as the sigreturn should
1009 1009 do it (XXX: use sigsetjmp) */
1010 1010 sigprocmask(SIG_SETMASK, old_set, NULL);
1011   - do_raise_exception_err(env->exception_index, env->error_code);
  1011 + cpu_loop_exit();
1012 1012 } else {
1013 1013 /* activate soft MMU for this block */
1014 1014 cpu_resume_from_signal(env, puc);
... ...
mips-dis.c
  View file @f9480ff
... ... @@ -3272,7 +3272,7 @@ choose_arch_by_number (unsigned long mach)
3272 3272 return c;
3273 3273 }
3274 3274  
3275   -void
  3275 +static void
3276 3276 set_default_mips_dis_options (struct disassemble_info *info)
3277 3277 {
3278 3278 const struct mips_arch_choice *chosen_arch;
... ... @@ -3321,7 +3321,7 @@ set_default_mips_dis_options (struct disassemble_info *info)
3321 3321 #endif
3322 3322 }
3323 3323  
3324   -void
  3324 +static void
3325 3325 parse_mips_dis_option (const char *option, unsigned int len)
3326 3326 {
3327 3327 unsigned int i, optionlen, vallen;
... ... @@ -4809,7 +4809,6 @@ print_mips16_insn_arg (char type,
4809 4809 abort ();
4810 4810 }
4811 4811 }
4812   -#endif
4813 4812  
4814 4813 void
4815 4814 print_mips_disassembler_options (FILE *stream)
... ... @@ -4863,3 +4862,4 @@ with the -M switch (multiple options should be separated by commas):\n&quot;));
4863 4862  
4864 4863 fprintf (stream, _("\n"));
4865 4864 }
  4865 +#endif
... ...
target-mips/cpu.h
  View file @f9480ff
... ... @@ -561,9 +561,26 @@ enum {
561 561  
562 562 int cpu_mips_exec(CPUMIPSState *s);
563 563 CPUMIPSState *cpu_mips_init(const char *cpu_model);
564   -uint32_t cpu_mips_get_clock (void);
  564 +//~ uint32_t cpu_mips_get_clock (void);
565 565 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
566 566  
  567 +/* mips_timer.c */
  568 +uint32_t cpu_mips_get_random (CPUState *env);
  569 +uint32_t cpu_mips_get_count (CPUState *env);
  570 +void cpu_mips_store_count (CPUState *env, uint32_t value);
  571 +void cpu_mips_store_compare (CPUState *env, uint32_t value);
  572 +void cpu_mips_start_count(CPUState *env);
  573 +void cpu_mips_stop_count(CPUState *env);
  574 +
  575 +/* mips_int.c */
  576 +void cpu_mips_update_irq (CPUState *env);
  577 +
  578 +/* helper.c */
  579 +int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
  580 + int mmu_idx, int is_softmmu);
  581 +void do_interrupt (CPUState *env);
  582 +void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
  583 +
567 584 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
568 585 {
569 586 env->active_tc.PC = tb->pc;
... ...
target-mips/exec.h
  View file @f9480ff
... ... @@ -24,21 +24,6 @@ void fpu_dump_state(CPUState *env, FILE *f,
24 24 int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
25 25 int flags);
26 26  
27   -int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
28   - int mmu_idx, int is_softmmu);
29   -void do_interrupt (CPUState *env);
30   -void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
31   -
32   -void do_raise_exception_err (uint32_t exception, int error_code);
33   -void do_raise_exception (uint32_t exception);
34   -
35   -uint32_t cpu_mips_get_random (CPUState *env);
36   -uint32_t cpu_mips_get_count (CPUState *env);
37   -void cpu_mips_store_count (CPUState *env, uint32_t value);
38   -void cpu_mips_store_compare (CPUState *env, uint32_t value);
39   -void cpu_mips_start_count(CPUState *env);
40   -void cpu_mips_stop_count(CPUState *env);
41   -void cpu_mips_update_irq (CPUState *env);
42 27 void cpu_mips_clock_init (CPUState *env);
43 28 void cpu_mips_tlb_flush (CPUState *env, int flush_global);
44 29  
... ...
target-mips/helper.c
  View file @f9480ff
... ... @@ -220,10 +220,6 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
220 220 }
221 221 }
222 222  
223   -void cpu_mips_init_mmu (CPUState *env)
224   -{
225   -}
226   -
227 223 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
228 224 int mmu_idx, int is_softmmu)
229 225 {
... ...
target-mips/op_helper.c
  View file @f9480ff
... ... @@ -54,7 +54,8 @@ void do_interrupt_restart (void)
54 54 }
55 55 }
56 56  
57   -void do_restore_state (void *pc_ptr)
  57 +#if !defined(CONFIG_USER_ONLY)
  58 +static void do_restore_state (void *pc_ptr)
58 59 {
59 60 TranslationBlock *tb;
60 61 unsigned long pc = (unsigned long) pc_ptr;
... ... @@ -64,6 +65,7 @@ void do_restore_state (void *pc_ptr)
64 65 cpu_restore_state (tb, env, pc, NULL);
65 66 }
66 67 }
  68 +#endif
67 69  
68 70 target_ulong do_clo (target_ulong t0)
69 71 {
... ... @@ -1356,7 +1358,6 @@ void do_mtc0_status_irqraise_debug(void)
1356 1358 {
1357 1359 fprintf(logfile, "Raise pending IRQs\n");
1358 1360 }
1359   -#endif /* !CONFIG_USER_ONLY */
1360 1361  
1361 1362 /* MIPS MT functions */
1362 1363 target_ulong do_mftgpr(uint32_t sel)
... ... @@ -1495,6 +1496,7 @@ target_ulong do_evpe(target_ulong t0)
1495 1496  
1496 1497 return t0;
1497 1498 }
  1499 +#endif /* !CONFIG_USER_ONLY */
1498 1500  
1499 1501 void do_fork(target_ulong t0, target_ulong t1)
1500 1502 {
... ...