gwj / at91sam9263 · Commits

Commit f8422f52fd633bb33e83e686e29c158bde4a3623

Authored by blueswir1
1 parent f65fb109

More helper types, rearrange generic definitions 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 109 additions and 64 deletions
target-i386/translate.c
  View file @f8422f5
... ... @@ -57,70 +57,6 @@
57 57  
58 58 //#define MACRO_TEST 1
59 59  
60   -#ifdef TARGET_X86_64
61   -#define TCG_TYPE_TL TCG_TYPE_I64
62   -#define tcg_gen_movi_tl tcg_gen_movi_i64
63   -#define tcg_gen_mov_tl tcg_gen_mov_i64
64   -#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
65   -#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
66   -#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
67   -#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
68   -#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
69   -#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
70   -#define tcg_gen_ld_tl tcg_gen_ld_i64
71   -#define tcg_gen_st8_tl tcg_gen_st8_i64
72   -#define tcg_gen_st16_tl tcg_gen_st16_i64
73   -#define tcg_gen_st32_tl tcg_gen_st32_i64
74   -#define tcg_gen_st_tl tcg_gen_st_i64
75   -#define tcg_gen_add_tl tcg_gen_add_i64
76   -#define tcg_gen_addi_tl tcg_gen_addi_i64
77   -#define tcg_gen_sub_tl tcg_gen_sub_i64
78   -#define tcg_gen_subi_tl tcg_gen_subi_i64
79   -#define tcg_gen_and_tl tcg_gen_and_i64
80   -#define tcg_gen_andi_tl tcg_gen_andi_i64
81   -#define tcg_gen_or_tl tcg_gen_or_i64
82   -#define tcg_gen_ori_tl tcg_gen_ori_i64
83   -#define tcg_gen_xor_tl tcg_gen_xor_i64
84   -#define tcg_gen_xori_tl tcg_gen_xori_i64
85   -#define tcg_gen_shl_tl tcg_gen_shl_i64
86   -#define tcg_gen_shli_tl tcg_gen_shli_i64
87   -#define tcg_gen_shr_tl tcg_gen_shr_i64
88   -#define tcg_gen_shri_tl tcg_gen_shri_i64
89   -#define tcg_gen_sar_tl tcg_gen_sar_i64
90   -#define tcg_gen_sari_tl tcg_gen_sari_i64
91   -#else
92   -#define TCG_TYPE_TL TCG_TYPE_I32
93   -#define tcg_gen_movi_tl tcg_gen_movi_i32
94   -#define tcg_gen_mov_tl tcg_gen_mov_i32
95   -#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
96   -#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
97   -#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
98   -#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
99   -#define tcg_gen_ld32u_tl tcg_gen_ld_i32
100   -#define tcg_gen_ld32s_tl tcg_gen_ld_i32
101   -#define tcg_gen_ld_tl tcg_gen_ld_i32
102   -#define tcg_gen_st8_tl tcg_gen_st8_i32
103   -#define tcg_gen_st16_tl tcg_gen_st16_i32
104   -#define tcg_gen_st32_tl tcg_gen_st_i32
105   -#define tcg_gen_st_tl tcg_gen_st_i32
106   -#define tcg_gen_add_tl tcg_gen_add_i32
107   -#define tcg_gen_addi_tl tcg_gen_addi_i32
108   -#define tcg_gen_sub_tl tcg_gen_sub_i32
109   -#define tcg_gen_subi_tl tcg_gen_subi_i32
110   -#define tcg_gen_and_tl tcg_gen_and_i32
111   -#define tcg_gen_andi_tl tcg_gen_andi_i32
112   -#define tcg_gen_or_tl tcg_gen_or_i32
113   -#define tcg_gen_ori_tl tcg_gen_ori_i32
114   -#define tcg_gen_xor_tl tcg_gen_xor_i32
115   -#define tcg_gen_xori_tl tcg_gen_xori_i32
116   -#define tcg_gen_shl_tl tcg_gen_shl_i32
117   -#define tcg_gen_shli_tl tcg_gen_shli_i32
118   -#define tcg_gen_shr_tl tcg_gen_shr_i32
119   -#define tcg_gen_shri_tl tcg_gen_shri_i32
120   -#define tcg_gen_sar_tl tcg_gen_sar_i32
121   -#define tcg_gen_sari_tl tcg_gen_sari_i32
122   -#endif
123   -
124 60 /* global register indexes */
125 61 static TCGv cpu_env, cpu_T[2], cpu_A0;
126 62 /* local register indexes (only used inside old micro ops) */
... ...
tcg/tcg-op.h
  View file @f8422f5
... ... @@ -192,6 +192,33 @@ static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2)
192 192 0, NULL, 2, args);
193 193 }
194 194  
  195 +static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2,
  196 + TCGv arg3, TCGv arg4)
  197 +{
  198 + TCGv args[4];
  199 + args[0] = arg1;
  200 + args[1] = arg2;
  201 + args[2] = arg3;
  202 + args[3] = arg4;
  203 + tcg_gen_call(&tcg_ctx,
  204 + tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
  205 + 0, NULL, 4, args);
  206 +}
  207 +
  208 +static inline void tcg_gen_helper_1_0(void *func, TCGv ret)
  209 +{
  210 + tcg_gen_call(&tcg_ctx,
  211 + tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
  212 + 1, &ret, 0, NULL);
  213 +}
  214 +
  215 +static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1)
  216 +{
  217 + tcg_gen_call(&tcg_ctx,
  218 + tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
  219 + 1, &ret, 1, &arg1);
  220 +}
  221 +
195 222 static inline void tcg_gen_helper_1_2(void *func, TCGv ret,
196 223 TCGv arg1, TCGv arg2)
197 224 {
... ... @@ -203,6 +230,20 @@ static inline void tcg_gen_helper_1_2(void *func, TCGv ret,
203 230 1, &ret, 2, args);
204 231 }
205 232  
  233 +static inline void tcg_gen_helper_1_4(void *func, TCGv ret,
  234 + TCGv arg1, TCGv arg2, TCGv arg3,
  235 + TCGv arg4)
  236 +{
  237 + TCGv args[4];
  238 + args[0] = arg1;
  239 + args[1] = arg2;
  240 + args[2] = arg3;
  241 + args[3] = arg4;
  242 + tcg_gen_call(&tcg_ctx,
  243 + tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
  244 + 1, &ret, 4, args);
  245 +}
  246 +
206 247 /* 32 bit ops */
207 248  
208 249 static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset)
... ... @@ -1222,6 +1263,8 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1222 1263 #endif
1223 1264 }
1224 1265  
  1266 +#define tcg_gen_ld_ptr tcg_gen_ld_i64
  1267 +
1225 1268 #else /* TCG_TARGET_REG_BITS == 32 */
1226 1269  
1227 1270 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
... ... @@ -1279,4 +1322,70 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
1279 1322 tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index);
1280 1323 }
1281 1324  
  1325 +#define tcg_gen_ld_ptr tcg_gen_ld_i32
  1326 +
1282 1327 #endif /* TCG_TARGET_REG_BITS != 32 */
  1328 +
  1329 +#if TARGET_LONG_BITS == 64
  1330 +#define TCG_TYPE_TL TCG_TYPE_I64
  1331 +#define tcg_gen_movi_tl tcg_gen_movi_i64
  1332 +#define tcg_gen_mov_tl tcg_gen_mov_i64
  1333 +#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
  1334 +#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
  1335 +#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
  1336 +#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
  1337 +#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
  1338 +#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
  1339 +#define tcg_gen_ld_tl tcg_gen_ld_i64
  1340 +#define tcg_gen_st8_tl tcg_gen_st8_i64
  1341 +#define tcg_gen_st16_tl tcg_gen_st16_i64
  1342 +#define tcg_gen_st32_tl tcg_gen_st32_i64
  1343 +#define tcg_gen_st_tl tcg_gen_st_i64
  1344 +#define tcg_gen_add_tl tcg_gen_add_i64
  1345 +#define tcg_gen_addi_tl tcg_gen_addi_i64
  1346 +#define tcg_gen_sub_tl tcg_gen_sub_i64
  1347 +#define tcg_gen_subi_tl tcg_gen_subi_i64
  1348 +#define tcg_gen_and_tl tcg_gen_and_i64
  1349 +#define tcg_gen_andi_tl tcg_gen_andi_i64
  1350 +#define tcg_gen_or_tl tcg_gen_or_i64
  1351 +#define tcg_gen_ori_tl tcg_gen_ori_i64
  1352 +#define tcg_gen_xor_tl tcg_gen_xor_i64
  1353 +#define tcg_gen_xori_tl tcg_gen_xori_i64
  1354 +#define tcg_gen_shl_tl tcg_gen_shl_i64
  1355 +#define tcg_gen_shli_tl tcg_gen_shli_i64
  1356 +#define tcg_gen_shr_tl tcg_gen_shr_i64
  1357 +#define tcg_gen_shri_tl tcg_gen_shri_i64
  1358 +#define tcg_gen_sar_tl tcg_gen_sar_i64
  1359 +#define tcg_gen_sari_tl tcg_gen_sari_i64
  1360 +#else
  1361 +#define TCG_TYPE_TL TCG_TYPE_I32
  1362 +#define tcg_gen_movi_tl tcg_gen_movi_i32
  1363 +#define tcg_gen_mov_tl tcg_gen_mov_i32
  1364 +#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
  1365 +#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
  1366 +#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
  1367 +#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
  1368 +#define tcg_gen_ld32u_tl tcg_gen_ld_i32
  1369 +#define tcg_gen_ld32s_tl tcg_gen_ld_i32
  1370 +#define tcg_gen_ld_tl tcg_gen_ld_i32
  1371 +#define tcg_gen_st8_tl tcg_gen_st8_i32
  1372 +#define tcg_gen_st16_tl tcg_gen_st16_i32
  1373 +#define tcg_gen_st32_tl tcg_gen_st_i32
  1374 +#define tcg_gen_st_tl tcg_gen_st_i32
  1375 +#define tcg_gen_add_tl tcg_gen_add_i32
  1376 +#define tcg_gen_addi_tl tcg_gen_addi_i32
  1377 +#define tcg_gen_sub_tl tcg_gen_sub_i32
  1378 +#define tcg_gen_subi_tl tcg_gen_subi_i32
  1379 +#define tcg_gen_and_tl tcg_gen_and_i32
  1380 +#define tcg_gen_andi_tl tcg_gen_andi_i32
  1381 +#define tcg_gen_or_tl tcg_gen_or_i32
  1382 +#define tcg_gen_ori_tl tcg_gen_ori_i32
  1383 +#define tcg_gen_xor_tl tcg_gen_xor_i32
  1384 +#define tcg_gen_xori_tl tcg_gen_xori_i32
  1385 +#define tcg_gen_shl_tl tcg_gen_shl_i32
  1386 +#define tcg_gen_shli_tl tcg_gen_shli_i32
  1387 +#define tcg_gen_shr_tl tcg_gen_shr_i32
  1388 +#define tcg_gen_shri_tl tcg_gen_shri_i32
  1389 +#define tcg_gen_sar_tl tcg_gen_sar_i32
  1390 +#define tcg_gen_sari_tl tcg_gen_sari_i32
  1391 +#endif
... ...