Commit f68dd770075ca35630f8070ddbcef50ceb3b5a27
1 parent
436d8b89
fixed word bit operations with memory offset - suppressed push/pop micro operations
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@507 c046a42c-6fe2-441c-8c8c-71466251a162
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14 additions
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80 deletions
target-i386/op.c
@@ -17,6 +17,10 @@ | @@ -17,6 +17,10 @@ | ||
17 | * License along with this library; if not, write to the Free Software | 17 | * License along with this library; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | + | ||
21 | +/* XXX: must use this define because the soft mmu macros have huge | ||
22 | + register constraints so they cannot be used in any C code */ | ||
23 | +#define ASM_SOFTMMU | ||
20 | #include "exec.h" | 24 | #include "exec.h" |
21 | 25 | ||
22 | /* n must be a constant to be efficient */ | 26 | /* n must be a constant to be efficient */ |
@@ -392,10 +396,10 @@ void OPPROTO op_andl_A0_ffff(void) | @@ -392,10 +396,10 @@ void OPPROTO op_andl_A0_ffff(void) | ||
392 | #include "ops_mem.h" | 396 | #include "ops_mem.h" |
393 | 397 | ||
394 | #if !defined(CONFIG_USER_ONLY) | 398 | #if !defined(CONFIG_USER_ONLY) |
395 | -#define MEMSUFFIX _user | 399 | +#define MEMSUFFIX _kernel |
396 | #include "ops_mem.h" | 400 | #include "ops_mem.h" |
397 | 401 | ||
398 | -#define MEMSUFFIX _kernel | 402 | +#define MEMSUFFIX _user |
399 | #include "ops_mem.h" | 403 | #include "ops_mem.h" |
400 | #endif | 404 | #endif |
401 | 405 | ||
@@ -403,7 +407,7 @@ void OPPROTO op_andl_A0_ffff(void) | @@ -403,7 +407,7 @@ void OPPROTO op_andl_A0_ffff(void) | ||
403 | 407 | ||
404 | void OPPROTO op_add_bitw_A0_T1(void) | 408 | void OPPROTO op_add_bitw_A0_T1(void) |
405 | { | 409 | { |
406 | - A0 += ((int32_t)T1 >> 4) << 1; | 410 | + A0 += ((int16_t)T1 >> 4) << 1; |
407 | } | 411 | } |
408 | 412 | ||
409 | void OPPROTO op_add_bitl_A0_T1(void) | 413 | void OPPROTO op_add_bitl_A0_T1(void) |
@@ -635,91 +639,21 @@ void OPPROTO op_decw_ECX(void) | @@ -635,91 +639,21 @@ void OPPROTO op_decw_ECX(void) | ||
635 | ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff); | 639 | ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff); |
636 | } | 640 | } |
637 | 641 | ||
638 | -/* push/pop */ | ||
639 | - | ||
640 | -void op_pushl_T0(void) | ||
641 | -{ | ||
642 | - uint32_t offset; | ||
643 | - offset = ESP - 4; | ||
644 | - stl((void *)offset, T0); | ||
645 | - /* modify ESP after to handle exceptions correctly */ | ||
646 | - ESP = offset; | ||
647 | -} | ||
648 | - | ||
649 | -void op_pushw_T0(void) | ||
650 | -{ | ||
651 | - uint32_t offset; | ||
652 | - offset = ESP - 2; | ||
653 | - stw((void *)offset, T0); | ||
654 | - /* modify ESP after to handle exceptions correctly */ | ||
655 | - ESP = offset; | ||
656 | -} | ||
657 | - | ||
658 | -void op_pushl_ss32_T0(void) | ||
659 | -{ | ||
660 | - uint32_t offset; | ||
661 | - offset = ESP - 4; | ||
662 | - stl(env->segs[R_SS].base + offset, T0); | ||
663 | - /* modify ESP after to handle exceptions correctly */ | ||
664 | - ESP = offset; | ||
665 | -} | ||
666 | - | ||
667 | -void op_pushw_ss32_T0(void) | ||
668 | -{ | ||
669 | - uint32_t offset; | ||
670 | - offset = ESP - 2; | ||
671 | - stw(env->segs[R_SS].base + offset, T0); | ||
672 | - /* modify ESP after to handle exceptions correctly */ | ||
673 | - ESP = offset; | ||
674 | -} | ||
675 | - | ||
676 | -void op_pushl_ss16_T0(void) | ||
677 | -{ | ||
678 | - uint32_t offset; | ||
679 | - offset = (ESP - 4) & 0xffff; | ||
680 | - stl(env->segs[R_SS].base + offset, T0); | ||
681 | - /* modify ESP after to handle exceptions correctly */ | ||
682 | - ESP = (ESP & ~0xffff) | offset; | ||
683 | -} | ||
684 | - | ||
685 | -void op_pushw_ss16_T0(void) | ||
686 | -{ | ||
687 | - uint32_t offset; | ||
688 | - offset = (ESP - 2) & 0xffff; | ||
689 | - stw(env->segs[R_SS].base + offset, T0); | ||
690 | - /* modify ESP after to handle exceptions correctly */ | ||
691 | - ESP = (ESP & ~0xffff) | offset; | ||
692 | -} | ||
693 | - | ||
694 | -/* NOTE: ESP update is done after */ | ||
695 | -void op_popl_T0(void) | ||
696 | -{ | ||
697 | - T0 = ldl((void *)ESP); | ||
698 | -} | ||
699 | - | ||
700 | -void op_popw_T0(void) | ||
701 | -{ | ||
702 | - T0 = lduw((void *)ESP); | ||
703 | -} | ||
704 | - | ||
705 | -void op_popl_ss32_T0(void) | ||
706 | -{ | ||
707 | - T0 = ldl(env->segs[R_SS].base + ESP); | ||
708 | -} | 642 | +/* push/pop utils */ |
709 | 643 | ||
710 | -void op_popw_ss32_T0(void) | 644 | +void op_addl_A0_SS(void) |
711 | { | 645 | { |
712 | - T0 = lduw(env->segs[R_SS].base + ESP); | 646 | + A0 += (long)env->segs[R_SS].base; |
713 | } | 647 | } |
714 | 648 | ||
715 | -void op_popl_ss16_T0(void) | 649 | +void op_subl_A0_2(void) |
716 | { | 650 | { |
717 | - T0 = ldl(env->segs[R_SS].base + (ESP & 0xffff)); | 651 | + A0 -= 2; |
718 | } | 652 | } |
719 | 653 | ||
720 | -void op_popw_ss16_T0(void) | 654 | +void op_subl_A0_4(void) |
721 | { | 655 | { |
722 | - T0 = lduw(env->segs[R_SS].base + (ESP & 0xffff)); | 656 | + A0 -= 4; |
723 | } | 657 | } |
724 | 658 | ||
725 | void op_addl_ESP_4(void) | 659 | void op_addl_ESP_4(void) |