Commit f51bbbfefe73120a85a8d24a029d37c9c0f3a001
1 parent
b26eefb6
ARM TCG conversion 2/16.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
4 changed files
with
12 additions
and
9 deletions
target-arm/helper.c
@@ -340,6 +340,14 @@ uint32_t HELPER(uxtb16)(uint32_t x) | @@ -340,6 +340,14 @@ uint32_t HELPER(uxtb16)(uint32_t x) | ||
340 | return res; | 340 | return res; |
341 | } | 341 | } |
342 | 342 | ||
343 | +uint32_t HELPER(clz)(uint32_t x) | ||
344 | +{ | ||
345 | + int count; | ||
346 | + for (count = 32; x; count--) | ||
347 | + x >>= 1; | ||
348 | + return count; | ||
349 | +} | ||
350 | + | ||
343 | #if defined(CONFIG_USER_ONLY) | 351 | #if defined(CONFIG_USER_ONLY) |
344 | 352 | ||
345 | void do_interrupt (CPUState *env) | 353 | void do_interrupt (CPUState *env) |
target-arm/helpers.h
@@ -2,5 +2,6 @@ | @@ -2,5 +2,6 @@ | ||
2 | #define DEF_HELPER(name, ret, args) ret helper_##name args; | 2 | #define DEF_HELPER(name, ret, args) ret helper_##name args; |
3 | #endif | 3 | #endif |
4 | 4 | ||
5 | +DEF_HELPER(clz, uint32_t, (uint32_t)) | ||
5 | DEF_HELPER(sxtb16, uint32_t, (uint32_t)) | 6 | DEF_HELPER(sxtb16, uint32_t, (uint32_t)) |
6 | DEF_HELPER(uxtb16, uint32_t, (uint32_t)) | 7 | DEF_HELPER(uxtb16, uint32_t, (uint32_t)) |
target-arm/op.c
@@ -475,15 +475,6 @@ void OPPROTO op_rorl_T1_T0_cc(void) | @@ -475,15 +475,6 @@ void OPPROTO op_rorl_T1_T0_cc(void) | ||
475 | } | 475 | } |
476 | 476 | ||
477 | /* misc */ | 477 | /* misc */ |
478 | -void OPPROTO op_clz_T0(void) | ||
479 | -{ | ||
480 | - int count; | ||
481 | - for (count = 32; T0 > 0; count--) | ||
482 | - T0 = T0 >> 1; | ||
483 | - T0 = count; | ||
484 | - FORCE_RET(); | ||
485 | -} | ||
486 | - | ||
487 | #define SIGNBIT (uint32_t)0x80000000 | 478 | #define SIGNBIT (uint32_t)0x80000000 |
488 | /* saturating arithmetic */ | 479 | /* saturating arithmetic */ |
489 | void OPPROTO op_addl_T0_T1_setq(void) | 480 | void OPPROTO op_addl_T0_T1_setq(void) |
target-arm/translate.c
@@ -205,6 +205,9 @@ static void store_reg(DisasContext *s, int reg, TCGv var) | @@ -205,6 +205,9 @@ static void store_reg(DisasContext *s, int reg, TCGv var) | ||
205 | #define gen_sxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(sxtb16), var, var) | 205 | #define gen_sxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(sxtb16), var, var) |
206 | #define gen_uxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(uxtb16), var, var) | 206 | #define gen_uxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(uxtb16), var, var) |
207 | 207 | ||
208 | +#define gen_op_clz_T0(var) \ | ||
209 | + tcg_gen_helper_1_1(HELPER_ADDR(clz), cpu_T[0], cpu_T[0]) | ||
210 | + | ||
208 | /* Dual 16-bit add. Result placed in t0 and t1 is marked as dead. | 211 | /* Dual 16-bit add. Result placed in t0 and t1 is marked as dead. |
209 | tmp = (t0 ^ t1) & 0x8000; | 212 | tmp = (t0 ^ t1) & 0x8000; |
210 | t0 &= ~0x8000; | 213 | t0 &= ~0x8000; |