Commit f5069b26a4c8a8967278856fb62898d7ed8d44c3
1 parent
2e0ded9c
Use memory globals for G registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4062 c046a42c-6fe2-441c-8c8c-71466251a162
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18 additions
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2 deletions
target-sparc/translate.c
| ... | ... | @@ -47,6 +47,7 @@ |
| 47 | 47 | |
| 48 | 48 | /* global register indexes */ |
| 49 | 49 | static TCGv cpu_env, cpu_T[3], cpu_regwptr, cpu_cc_src, cpu_cc_dst, cpu_psr; |
| 50 | +static TCGv cpu_gregs[8]; | |
| 50 | 51 | #ifdef TARGET_SPARC64 |
| 51 | 52 | static TCGv cpu_xcc; |
| 52 | 53 | #endif |
| ... | ... | @@ -222,7 +223,7 @@ static inline void gen_movl_reg_TN(int reg, TCGv tn) |
| 222 | 223 | if (reg == 0) |
| 223 | 224 | tcg_gen_movi_tl(tn, 0); |
| 224 | 225 | else if (reg < 8) |
| 225 | - tcg_gen_ld_tl(tn, cpu_env, offsetof(CPUState, gregs[reg])); | |
| 226 | + tcg_gen_mov_tl(tn, cpu_gregs[reg]); | |
| 226 | 227 | else { |
| 227 | 228 | tcg_gen_ld_tl(tn, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); |
| 228 | 229 | } |
| ... | ... | @@ -250,7 +251,7 @@ static inline void gen_movl_TN_reg(int reg, TCGv tn) |
| 250 | 251 | if (reg == 0) |
| 251 | 252 | return; |
| 252 | 253 | else if (reg < 8) |
| 253 | - tcg_gen_st_tl(tn, cpu_env, offsetof(CPUState, gregs[reg])); | |
| 254 | + tcg_gen_mov_tl(cpu_gregs[reg], tn); | |
| 254 | 255 | else { |
| 255 | 256 | tcg_gen_st_tl(tn, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); |
| 256 | 257 | } |
| ... | ... | @@ -4673,6 +4674,17 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) |
| 4673 | 4674 | CPUSPARCState *env; |
| 4674 | 4675 | const sparc_def_t *def; |
| 4675 | 4676 | static int inited; |
| 4677 | + unsigned int i; | |
| 4678 | + static const char * const gregnames[8] = { | |
| 4679 | + NULL, // g0 not used | |
| 4680 | + "g1", | |
| 4681 | + "g2", | |
| 4682 | + "g3", | |
| 4683 | + "g4", | |
| 4684 | + "g5", | |
| 4685 | + "g6", | |
| 4686 | + "g7", | |
| 4687 | + }; | |
| 4676 | 4688 | |
| 4677 | 4689 | def = cpu_sparc_find_by_name(cpu_model); |
| 4678 | 4690 | if (!def) |
| ... | ... | @@ -4729,6 +4741,10 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) |
| 4729 | 4741 | cpu_psr = tcg_global_mem_new(TCG_TYPE_I32, |
| 4730 | 4742 | TCG_AREG0, offsetof(CPUState, psr), |
| 4731 | 4743 | "psr"); |
| 4744 | + for (i = 1; i < 8; i++) | |
| 4745 | + cpu_gregs[i] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, | |
| 4746 | + offsetof(CPUState, gregs[i]), | |
| 4747 | + gregnames[i]); | |
| 4732 | 4748 | } |
| 4733 | 4749 | |
| 4734 | 4750 | cpu_reset(env); | ... | ... |