gwj / at91sam9263 · Commits

Commit f451387ac0127b076563fa5bce26e1c2763ccbbd

Authored by balrog
1 parent c19148bd

Fix OMAP GPMC register offsets and SYSCTL 8bit io (Kyungmin Park). 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4943 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 54 additions and 3 deletions
hw/omap2.c
  View file @f451387
... ... @@ -3528,6 +3528,32 @@ struct omap_sysctl_s {
3528 3528 uint32_t msuspendmux[5];
3529 3529 };
3530 3530  
  3531 +static uint32_t omap_sysctl_read8(void *opaque, target_phys_addr_t addr)
  3532 +{
  3533 +
  3534 + struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
  3535 + int offset = addr - s->base;
  3536 + int pad_offset, byte_offset;
  3537 + int value;
  3538 +
  3539 + switch (offset) {
  3540 + case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */
  3541 + pad_offset = (offset - 0x30) >> 2;
  3542 + byte_offset = (offset - 0x30) & (4 - 1);
  3543 +
  3544 + value = s->padconf[pad_offset];
  3545 + value = (value >> (byte_offset * 8)) & 0xff;
  3546 +
  3547 + return value;
  3548 +
  3549 + default:
  3550 + break;
  3551 + }
  3552 +
  3553 + OMAP_BAD_REG(addr);
  3554 + return 0;
  3555 +}
  3556 +
3531 3557 static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr)
3532 3558 {
3533 3559 struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
... ... @@ -3629,6 +3655,31 @@ static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr)
3629 3655 return 0;
3630 3656 }
3631 3657  
  3658 +static void omap_sysctl_write8(void *opaque, target_phys_addr_t addr,
  3659 + uint32_t value)
  3660 +{
  3661 + struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
  3662 + int offset = addr - s->base;
  3663 + int pad_offset, byte_offset;
  3664 + int prev_value;
  3665 +
  3666 + switch (offset) {
  3667 + case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */
  3668 + pad_offset = (offset - 0x30) >> 2;
  3669 + byte_offset = (offset - 0x30) & (4 - 1);
  3670 +
  3671 + prev_value = s->padconf[pad_offset];
  3672 + prev_value &= ~(0xff << (byte_offset * 8));
  3673 + prev_value |= ((value & 0x1f1f1f1f) << (byte_offset * 8)) & 0x1f1f1f1f;
  3674 + s->padconf[pad_offset] = prev_value;
  3675 + break;
  3676 +
  3677 + default:
  3678 + OMAP_BAD_REG(addr);
  3679 + break;
  3680 + }
  3681 +}
  3682 +
3632 3683 static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
3633 3684 uint32_t value)
3634 3685 {
... ... @@ -3726,13 +3777,13 @@ static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
3726 3777 }
3727 3778  
3728 3779 static CPUReadMemoryFunc *omap_sysctl_readfn[] = {
3729   - omap_badwidth_read32, /* TODO */
  3780 + omap_sysctl_read8,
3730 3781 omap_badwidth_read32, /* TODO */
3731 3782 omap_sysctl_read,
3732 3783 };
3733 3784  
3734 3785 static CPUWriteMemoryFunc *omap_sysctl_writefn[] = {
3735   - omap_badwidth_write32, /* TODO */
  3786 + omap_sysctl_write8,
3736 3787 omap_badwidth_write32, /* TODO */
3737 3788 omap_sysctl_write,
3738 3789 };
... ... @@ -4139,7 +4190,7 @@ static uint32_t omap_gpmc_read(void *opaque, target_phys_addr_t addr)
4139 4190 cs = (offset - 0x060) / 0x30;
4140 4191 offset -= cs * 0x30;
4141 4192 f = s->cs_file + cs;
4142   - switch (offset - cs * 0x30) {
  4193 + switch (offset) {
4143 4194 case 0x60: /* GPMC_CONFIG1 */
4144 4195 return f->config[0];
4145 4196 case 0x64: /* GPMC_CONFIG2 */
... ...