Commit f40782361609c3d557b4dd3f0832741f375f73b6
Committed by
Aurelien Jarno
Aurelien Jarno
1 parent
fbe73008
target-ppc: enable PPC_MFTB for 44x
According to PPC440 user manual, PPC 440 supports ``mftb'' even it's a preserved instruction: PPC440_UM2013.pdf, p.445, table A-3 when I compile a kernel (2.6.30, bamboo_defconfig/440EP & canyonlands/460EX), I can see ``mftb'' by using ppc-xxx-objdump vmlinux I have also checked the ppc 440x[456], 460S, 464, they also should support mftb. The following patch enable mftb for all ppc 440 variants, including: 440EP, 440GP, 440x4, 440x5 and 460 Signed-off-by: Baojun Wang <wangbj@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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1 changed file
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6 additions
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6 deletions
target-ppc/translate_init.c
| @@ -3381,7 +3381,7 @@ static void init_proc_405 (CPUPPCState *env) | @@ -3381,7 +3381,7 @@ static void init_proc_405 (CPUPPCState *env) | ||
| 3381 | PPC_DCR | PPC_WRTEE | PPC_RFMCI | \ | 3381 | PPC_DCR | PPC_WRTEE | PPC_RFMCI | \ |
| 3382 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3382 | PPC_CACHE | PPC_CACHE_ICBI | \ |
| 3383 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ | 3383 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ |
| 3384 | - PPC_MEM_TLBSYNC | \ | 3384 | + PPC_MEM_TLBSYNC | PPC_MFTB | \ |
| 3385 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ | 3385 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ |
| 3386 | PPC_440_SPEC) | 3386 | PPC_440_SPEC) |
| 3387 | #define POWERPC_MSRM_440EP (0x000000000006D630ULL) | 3387 | #define POWERPC_MSRM_440EP (0x000000000006D630ULL) |
| @@ -3461,7 +3461,7 @@ static void init_proc_440EP (CPUPPCState *env) | @@ -3461,7 +3461,7 @@ static void init_proc_440EP (CPUPPCState *env) | ||
| 3461 | PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_MFAPIDI | \ | 3461 | PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_MFAPIDI | \ |
| 3462 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3462 | PPC_CACHE | PPC_CACHE_ICBI | \ |
| 3463 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ | 3463 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ |
| 3464 | - PPC_MEM_TLBSYNC | PPC_TLBIVA | \ | 3464 | + PPC_MEM_TLBSYNC | PPC_TLBIVA | PPC_MFTB | \ |
| 3465 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ | 3465 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ |
| 3466 | PPC_440_SPEC) | 3466 | PPC_440_SPEC) |
| 3467 | #define POWERPC_MSRM_440GP (0x000000000006FF30ULL) | 3467 | #define POWERPC_MSRM_440GP (0x000000000006FF30ULL) |
| @@ -3523,7 +3523,7 @@ static void init_proc_440GP (CPUPPCState *env) | @@ -3523,7 +3523,7 @@ static void init_proc_440GP (CPUPPCState *env) | ||
| 3523 | PPC_DCR | PPC_WRTEE | \ | 3523 | PPC_DCR | PPC_WRTEE | \ |
| 3524 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3524 | PPC_CACHE | PPC_CACHE_ICBI | \ |
| 3525 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ | 3525 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ |
| 3526 | - PPC_MEM_TLBSYNC | \ | 3526 | + PPC_MEM_TLBSYNC | PPC_MFTB | \ |
| 3527 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ | 3527 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ |
| 3528 | PPC_440_SPEC) | 3528 | PPC_440_SPEC) |
| 3529 | #define POWERPC_MSRM_440x4 (0x000000000006FF30ULL) | 3529 | #define POWERPC_MSRM_440x4 (0x000000000006FF30ULL) |
| @@ -3585,7 +3585,7 @@ static void init_proc_440x4 (CPUPPCState *env) | @@ -3585,7 +3585,7 @@ static void init_proc_440x4 (CPUPPCState *env) | ||
| 3585 | PPC_DCR | PPC_WRTEE | PPC_RFMCI | \ | 3585 | PPC_DCR | PPC_WRTEE | PPC_RFMCI | \ |
| 3586 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3586 | PPC_CACHE | PPC_CACHE_ICBI | \ |
| 3587 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ | 3587 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ |
| 3588 | - PPC_MEM_TLBSYNC | \ | 3588 | + PPC_MEM_TLBSYNC | PPC_MFTB | \ |
| 3589 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ | 3589 | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \ |
| 3590 | PPC_440_SPEC) | 3590 | PPC_440_SPEC) |
| 3591 | #define POWERPC_MSRM_440x5 (0x000000000006FF30ULL) | 3591 | #define POWERPC_MSRM_440x5 (0x000000000006FF30ULL) |
| @@ -3663,7 +3663,7 @@ static void init_proc_440x5 (CPUPPCState *env) | @@ -3663,7 +3663,7 @@ static void init_proc_440x5 (CPUPPCState *env) | ||
| 3663 | /* PowerPC 460 (guessed) */ | 3663 | /* PowerPC 460 (guessed) */ |
| 3664 | #define POWERPC_INSNS_460 (PPC_INSNS_BASE | PPC_STRING | \ | 3664 | #define POWERPC_INSNS_460 (PPC_INSNS_BASE | PPC_STRING | \ |
| 3665 | PPC_DCR | PPC_DCRX | PPC_DCRUX | \ | 3665 | PPC_DCR | PPC_DCRX | PPC_DCRUX | \ |
| 3666 | - PPC_WRTEE | PPC_MFAPIDI | \ | 3666 | + PPC_WRTEE | PPC_MFAPIDI | PPC_MFTB | \ |
| 3667 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3667 | PPC_CACHE | PPC_CACHE_ICBI | \ |
| 3668 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ | 3668 | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \ |
| 3669 | PPC_MEM_TLBSYNC | PPC_TLBIVA | \ | 3669 | PPC_MEM_TLBSYNC | PPC_TLBIVA | \ |
| @@ -3750,7 +3750,7 @@ static void init_proc_460 (CPUPPCState *env) | @@ -3750,7 +3750,7 @@ static void init_proc_460 (CPUPPCState *env) | ||
| 3750 | #define POWERPC_INSNS_460F (PPC_INSNS_BASE | PPC_STRING | \ | 3750 | #define POWERPC_INSNS_460F (PPC_INSNS_BASE | PPC_STRING | \ |
| 3751 | PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | \ | 3751 | PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | \ |
| 3752 | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \ | 3752 | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \ |
| 3753 | - PPC_FLOAT_STFIWX | \ | 3753 | + PPC_FLOAT_STFIWX | PPC_MFTB | \ |
| 3754 | PPC_DCR | PPC_DCRX | PPC_DCRUX | \ | 3754 | PPC_DCR | PPC_DCRX | PPC_DCRUX | \ |
| 3755 | PPC_WRTEE | PPC_MFAPIDI | \ | 3755 | PPC_WRTEE | PPC_MFAPIDI | \ |
| 3756 | PPC_CACHE | PPC_CACHE_ICBI | \ | 3756 | PPC_CACHE | PPC_CACHE_ICBI | \ |