gwj / at91sam9263 · Commits

Commit f39023833e4520f411f074a891708591c9ce1e68

Authored by blueswir1
1 parent 864c136a

Add debug, savevm and reset support for UniNorth 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6521 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 54 additions and 1 deletions
hw/ppc_chrp.c
  View file @f390238
... ... @@ -37,14 +37,30 @@
37 37 #define MAX_IDE_BUS 2
38 38 #define VGA_BIOS_SIZE 65536
39 39  
  40 +/* debug UniNorth */
  41 +//#define DEBUG_UNIN
  42 +
  43 +#ifdef DEBUG_UNIN
  44 +#define UNIN_DPRINTF(fmt, args...) \
  45 +do { printf("UNIN: " fmt , ##args); } while (0)
  46 +#else
  47 +#define UNIN_DPRINTF(fmt, args...)
  48 +#endif
  49 +
40 50 /* UniN device */
41 51 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
42 52 {
  53 + UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
43 54 }
44 55  
45 56 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
46 57 {
47   - return 0;
  58 + uint32_t value;
  59 +
  60 + value = 0;
  61 + UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  62 +
  63 + return value;
48 64 }
49 65  
50 66 static CPUWriteMemoryFunc *unin_write[] = {
... ...
hw/unin_pci.c
  View file @f390238
... ... @@ -25,6 +25,16 @@
25 25 #include "ppc_mac.h"
26 26 #include "pci.h"
27 27  
  28 +/* debug UniNorth */
  29 +//#define DEBUG_UNIN
  30 +
  31 +#ifdef DEBUG_UNIN
  32 +#define UNIN_DPRINTF(fmt, args...) \
  33 +do { printf("UNIN: " fmt , ##args); } while (0)
  34 +#else
  35 +#define UNIN_DPRINTF(fmt, args...)
  36 +#endif
  37 +
28 38 typedef target_phys_addr_t pci_addr_t;
29 39 #include "pci_host.h"
30 40  
... ... @@ -36,6 +46,7 @@ static void pci_unin_main_config_writel (void *opaque, target_phys_addr_t addr,
36 46 UNINState *s = opaque;
37 47 int i;
38 48  
  49 + UNIN_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr, val);
39 50 #ifdef TARGET_WORDS_BIGENDIAN
40 51 val = bswap32(val);
41 52 #endif
... ... @@ -63,6 +74,7 @@ static uint32_t pci_unin_main_config_readl (void *opaque,
63 74 #ifdef TARGET_WORDS_BIGENDIAN
64 75 val = bswap32(val);
65 76 #endif
  77 + UNIN_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr, val);
66 78  
67 79 return val;
68 80 }
... ... @@ -154,6 +166,27 @@ static void pci_unin_set_irq(qemu_irq *pic, int irq_num, int level)
154 166 qemu_set_irq(pic[irq_num + 8], level);
155 167 }
156 168  
  169 +static void pci_unin_save(QEMUFile* f, void *opaque)
  170 +{
  171 + PCIDevice *d = opaque;
  172 +
  173 + pci_device_save(d, f);
  174 +}
  175 +
  176 +static int pci_unin_load(QEMUFile* f, void *opaque, int version_id)
  177 +{
  178 + PCIDevice *d = opaque;
  179 +
  180 + if (version_id != 1)
  181 + return -EINVAL;
  182 +
  183 + return pci_device_load(d, f);
  184 +}
  185 +
  186 +static void pci_unin_reset(void *opaque)
  187 +{
  188 +}
  189 +
157 190 PCIBus *pci_pmac_init(qemu_irq *pic)
158 191 {
159 192 UNINState *s;
... ... @@ -254,5 +287,9 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
254 287 d->config[0x0E] = 0x00; // header_type
255 288 d->config[0x34] = 0x00; // capabilities_pointer
256 289 #endif
  290 + register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, d);
  291 + qemu_register_reset(pci_unin_reset, d);
  292 + pci_unin_reset(d);
  293 +
257 294 return s->bus;
258 295 }
... ...