gwj / at91sam9263 · Commits

Commit f2964260063568af0cbff92248f8518e6a4f7a34

Authored by Edgar E. Iglesias
1 parent 4ad804df

ETRAX: Drop _t for the serial type. 

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Inline Side-by-side
Showing 1 changed file with 7 additions and 7 deletions
hw/etraxfs_ser.c
  View file @f296426
@@ -45,7 +45,7 @@ @@ -45,7 +45,7 @@
45 #define STAT_TR_IDLE 22 45 #define STAT_TR_IDLE 22
46 #define STAT_TR_RDY 24 46 #define STAT_TR_RDY 24
47 47
48 -struct etrax_serial_t 48 +struct etrax_serial
49 { 49 {
50 CPUState *env; 50 CPUState *env;
51 CharDriverState *chr; 51 CharDriverState *chr;
@@ -65,7 +65,7 @@ struct etrax_serial_t @@ -65,7 +65,7 @@ struct etrax_serial_t
65 uint32_t r_masked_intr; 65 uint32_t r_masked_intr;
66 }; 66 };
67 67
68 -static void ser_update_irq(struct etrax_serial_t *s) 68 +static void ser_update_irq(struct etrax_serial *s)
69 { 69 {
70 s->r_intr &= ~(s->rw_ack_intr); 70 s->r_intr &= ~(s->rw_ack_intr);
71 s->r_masked_intr = s->r_intr & s->rw_intr_mask; 71 s->r_masked_intr = s->r_intr & s->rw_intr_mask;
@@ -79,7 +79,7 @@ static void ser_update_irq(struct etrax_serial_t *s) @@ -79,7 +79,7 @@ static void ser_update_irq(struct etrax_serial_t *s)
79 79
80 static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) 80 static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
81 { 81 {
82 - struct etrax_serial_t *s = opaque; 82 + struct etrax_serial *s = opaque;
83 D(CPUState *env = s->env); 83 D(CPUState *env = s->env);
84 uint32_t r = 0; 84 uint32_t r = 0;
85 85
@@ -125,7 +125,7 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) @@ -125,7 +125,7 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
125 static void 125 static void
126 ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value) 126 ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
127 { 127 {
128 - struct etrax_serial_t *s = opaque; 128 + struct etrax_serial *s = opaque;
129 unsigned char ch = value; 129 unsigned char ch = value;
130 D(CPUState *env = s->env); 130 D(CPUState *env = s->env);
131 131
@@ -176,7 +176,7 @@ static CPUWriteMemoryFunc *ser_write[] = { @@ -176,7 +176,7 @@ static CPUWriteMemoryFunc *ser_write[] = {
176 176
177 static void serial_receive(void *opaque, const uint8_t *buf, int size) 177 static void serial_receive(void *opaque, const uint8_t *buf, int size)
178 { 178 {
179 - struct etrax_serial_t *s = opaque; 179 + struct etrax_serial *s = opaque;
180 180
181 s->r_intr |= 8; 181 s->r_intr |= 8;
182 s->rs_stat_din &= ~0xff; 182 s->rs_stat_din &= ~0xff;
@@ -187,7 +187,7 @@ static void serial_receive(void *opaque, const uint8_t *buf, int size) @@ -187,7 +187,7 @@ static void serial_receive(void *opaque, const uint8_t *buf, int size)
187 187
188 static int serial_can_receive(void *opaque) 188 static int serial_can_receive(void *opaque)
189 { 189 {
190 - struct etrax_serial_t *s = opaque; 190 + struct etrax_serial *s = opaque;
191 int r; 191 int r;
192 192
193 /* Is the receiver enabled? */ 193 /* Is the receiver enabled? */
@@ -206,7 +206,7 @@ static void serial_event(void *opaque, int event) @@ -206,7 +206,7 @@ static void serial_event(void *opaque, int event)
206 void etraxfs_ser_init(CPUState *env, qemu_irq *irq, CharDriverState *chr, 206 void etraxfs_ser_init(CPUState *env, qemu_irq *irq, CharDriverState *chr,
207 target_phys_addr_t base) 207 target_phys_addr_t base)
208 { 208 {
209 - struct etrax_serial_t *s; 209 + struct etrax_serial *s;
210 int ser_regs; 210 int ser_regs;
211 211
212 s = qemu_mallocz(sizeof *s); 212 s = qemu_mallocz(sizeof *s);