Commit f02bb954a555e997869e5a92d79b0234b39eadad

Authored by aurel32
1 parent abbaab5c

tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets

Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 15 additions and 15 deletions
tcg/tcg-op.h
... ... @@ -1055,21 +1055,6 @@ static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
1055 1055 }
1056 1056 }
1057 1057  
1058   -static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
1059   - int label_index)
1060   -{
1061   - TCGv t0 = tcg_const_i64(arg2);
1062   - tcg_gen_brcond_i64(cond, arg1, t0, label_index);
1063   - tcg_temp_free(t0);
1064   -}
1065   -
1066   -static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
1067   -{
1068   - TCGv t0 = tcg_const_i64(arg2);
1069   - tcg_gen_mul_i64(ret, arg1, t0);
1070   - tcg_temp_free(t0);
1071   -}
1072   -
1073 1058 static inline void tcg_gen_subfi_i64(TCGv ret, int64_t arg1, TCGv arg2)
1074 1059 {
1075 1060 TCGv t0 = tcg_const_i64(arg1);
... ... @@ -1088,6 +1073,21 @@ static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
1088 1073 tcg_temp_free(t0);
1089 1074 }
1090 1075 }
  1076 +static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
  1077 + int label_index)
  1078 +{
  1079 + TCGv t0 = tcg_const_i64(arg2);
  1080 + tcg_gen_brcond_i64(cond, arg1, t0, label_index);
  1081 + tcg_temp_free(t0);
  1082 +}
  1083 +
  1084 +static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
  1085 +{
  1086 + TCGv t0 = tcg_const_i64(arg2);
  1087 + tcg_gen_mul_i64(ret, arg1, t0);
  1088 + tcg_temp_free(t0);
  1089 +}
  1090 +
1091 1091  
1092 1092 /***************************************/
1093 1093 /* optional operations */
... ...