Commit ef397e88e96d4a798bd190bcd0c43865c3725ae2
1 parent
c4781a51
Temporary hack to avoid Qemu crash at PowerPC reset time.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3482 c046a42c-6fe2-441c-8c8c-71466251a162
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18 additions
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4 deletions
hw/ppc.c
| @@ -131,13 +131,17 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -131,13 +131,17 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
| 131 | case PPC6xx_INPUT_HRESET: | 131 | case PPC6xx_INPUT_HRESET: |
| 132 | /* Level sensitive - active low */ | 132 | /* Level sensitive - active low */ |
| 133 | if (level) { | 133 | if (level) { |
| 134 | -#if 0 // XXX: TOFIX | ||
| 135 | #if defined(PPC_DEBUG_IRQ) | 134 | #if defined(PPC_DEBUG_IRQ) |
| 136 | if (loglevel & CPU_LOG_INT) { | 135 | if (loglevel & CPU_LOG_INT) { |
| 137 | fprintf(logfile, "%s: reset the CPU\n", __func__); | 136 | fprintf(logfile, "%s: reset the CPU\n", __func__); |
| 138 | } | 137 | } |
| 139 | #endif | 138 | #endif |
| 140 | - cpu_reset(env); | 139 | + env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
| 140 | + /* XXX: TOFIX */ | ||
| 141 | +#if 0 | ||
| 142 | + cpu_ppc_reset(env); | ||
| 143 | +#else | ||
| 144 | + qemu_system_reset_request(); | ||
| 141 | #endif | 145 | #endif |
| 142 | } | 146 | } |
| 143 | break; | 147 | break; |
hw/ppc405_uc.c
| @@ -2189,12 +2189,17 @@ void ppc40x_core_reset (CPUState *env) | @@ -2189,12 +2189,17 @@ void ppc40x_core_reset (CPUState *env) | ||
| 2189 | target_ulong dbsr; | 2189 | target_ulong dbsr; |
| 2190 | 2190 | ||
| 2191 | printf("Reset PowerPC core\n"); | 2191 | printf("Reset PowerPC core\n"); |
| 2192 | + env->interrupt_request |= CPU_INTERRUPT_EXITTB; | ||
| 2193 | + /* XXX: TOFIX */ | ||
| 2194 | +#if 0 | ||
| 2192 | cpu_ppc_reset(env); | 2195 | cpu_ppc_reset(env); |
| 2196 | +#else | ||
| 2197 | + qemu_system_reset_request(); | ||
| 2198 | +#endif | ||
| 2193 | dbsr = env->spr[SPR_40x_DBSR]; | 2199 | dbsr = env->spr[SPR_40x_DBSR]; |
| 2194 | dbsr &= ~0x00000300; | 2200 | dbsr &= ~0x00000300; |
| 2195 | dbsr |= 0x00000100; | 2201 | dbsr |= 0x00000100; |
| 2196 | env->spr[SPR_40x_DBSR] = dbsr; | 2202 | env->spr[SPR_40x_DBSR] = dbsr; |
| 2197 | - cpu_loop_exit(); | ||
| 2198 | } | 2203 | } |
| 2199 | 2204 | ||
| 2200 | void ppc40x_chip_reset (CPUState *env) | 2205 | void ppc40x_chip_reset (CPUState *env) |
| @@ -2202,13 +2207,18 @@ void ppc40x_chip_reset (CPUState *env) | @@ -2202,13 +2207,18 @@ void ppc40x_chip_reset (CPUState *env) | ||
| 2202 | target_ulong dbsr; | 2207 | target_ulong dbsr; |
| 2203 | 2208 | ||
| 2204 | printf("Reset PowerPC chip\n"); | 2209 | printf("Reset PowerPC chip\n"); |
| 2210 | + env->interrupt_request |= CPU_INTERRUPT_EXITTB; | ||
| 2211 | + /* XXX: TOFIX */ | ||
| 2212 | +#if 0 | ||
| 2205 | cpu_ppc_reset(env); | 2213 | cpu_ppc_reset(env); |
| 2214 | +#else | ||
| 2215 | + qemu_system_reset_request(); | ||
| 2216 | +#endif | ||
| 2206 | /* XXX: TODO reset all internal peripherals */ | 2217 | /* XXX: TODO reset all internal peripherals */ |
| 2207 | dbsr = env->spr[SPR_40x_DBSR]; | 2218 | dbsr = env->spr[SPR_40x_DBSR]; |
| 2208 | dbsr &= ~0x00000300; | 2219 | dbsr &= ~0x00000300; |
| 2209 | dbsr |= 0x00000200; | 2220 | dbsr |= 0x00000200; |
| 2210 | env->spr[SPR_40x_DBSR] = dbsr; | 2221 | env->spr[SPR_40x_DBSR] = dbsr; |
| 2211 | - cpu_loop_exit(); | ||
| 2212 | } | 2222 | } |
| 2213 | 2223 | ||
| 2214 | void ppc40x_system_reset (CPUState *env) | 2224 | void ppc40x_system_reset (CPUState *env) |