Commit eeb7c03c0f49a8678028a734f1d6575f36a44edc

Authored by Gleb Natapov
Committed by Anthony Liguori
1 parent e19252d3

Add rtc reset function.

On reset:
Periodic Interrupt Enable (PIE) bit is cleared to zero
Alarm Interrupt Enable (AIE) bit is cleared to zero
Update ended Interrupt Flag (UF) bit is cleared to zero
Interrupt Request status Flag (IRQF) bit is cleared to zero
Periodic Interrupt Flag (PF) bit is cleared to zero
Alarm Interrupt Flag (AF) bit is cleared to zero
Square Wave output Enable (SQWE) zero

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Showing 1 changed file with 19 additions and 0 deletions
hw/mc146818rtc.c
... ... @@ -568,6 +568,22 @@ static int rtc_load_td(QEMUFile *f, void *opaque, int version_id)
568 568 }
569 569 #endif
570 570  
  571 +static void rtc_reset(void *opaque)
  572 +{
  573 + RTCState *s = opaque;
  574 +
  575 + /* clear PIE,AIE,SQWE on reset */
  576 + s->cmos_data[RTC_REG_B] &= ~((1<<6) | (1<<5) | (1<<3));
  577 +
  578 + /* clear UF,IRQF,PF,AF on reset */
  579 + s->cmos_data[RTC_REG_C] &= ~((1<<4) | (1<<7) | (1<<6) | (1<<5));
  580 +
  581 +#ifdef TARGET_I386
  582 + if (rtc_td_hack)
  583 + s->irq_coalesced = 0;
  584 +#endif
  585 +}
  586 +
571 587 RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
572 588 {
573 589 RTCState *s;
... ... @@ -606,6 +622,8 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
606 622 if (rtc_td_hack)
607 623 register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
608 624 #endif
  625 + qemu_register_reset(rtc_reset, 0, s);
  626 +
609 627 return s;
610 628 }
611 629  
... ... @@ -721,5 +739,6 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
721 739 if (rtc_td_hack)
722 740 register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
723 741 #endif
  742 + qemu_register_reset(rtc_reset, 0, s);
724 743 return s;
725 744 }
... ...