gwj / at91sam9263 · Commits

Commit ece43b8d06f26c670b06c30c6bd1021580a005aa

Authored by blueswir1
1 parent 5c6a0628

Convert some cpu_dst uses (with loads/stores) to cpu_tmp0 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 67 additions and 67 deletions
target-sparc/translate.c
  View file @ece43b8
@@ -2078,9 +2078,9 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2078,9 +2078,9 @@ static void disas_sparc_insn(DisasContext * dc)
2078 SPARCv8 manual, rdy on the 2078 SPARCv8 manual, rdy on the
2079 microSPARC II */ 2079 microSPARC II */
2080 #endif 2080 #endif
2081 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2081 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2082 offsetof(CPUSPARCState, y)); 2082 offsetof(CPUSPARCState, y));
2083 - gen_movl_TN_reg(rd, cpu_dst); 2083 + gen_movl_TN_reg(rd, cpu_tmp0);
2084 break; 2084 break;
2085 #ifdef TARGET_SPARC64 2085 #ifdef TARGET_SPARC64
2086 case 0x2: /* V9 rdccr */ 2086 case 0x2: /* V9 rdccr */
@@ -2126,14 +2126,14 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2126,14 +2126,14 @@ static void disas_sparc_insn(DisasContext * dc)
2126 case 0x13: /* Graphics Status */ 2126 case 0x13: /* Graphics Status */
2127 if (gen_trap_ifnofpu(dc, cpu_cond)) 2127 if (gen_trap_ifnofpu(dc, cpu_cond))
2128 goto jmp_insn; 2128 goto jmp_insn;
2129 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2129 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2130 offsetof(CPUSPARCState, gsr)); 2130 offsetof(CPUSPARCState, gsr));
2131 - gen_movl_TN_reg(rd, cpu_dst); 2131 + gen_movl_TN_reg(rd, cpu_tmp0);
2132 break; 2132 break;
2133 case 0x17: /* Tick compare */ 2133 case 0x17: /* Tick compare */
2134 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2134 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2135 offsetof(CPUSPARCState, tick_cmpr)); 2135 offsetof(CPUSPARCState, tick_cmpr));
2136 - gen_movl_TN_reg(rd, cpu_dst); 2136 + gen_movl_TN_reg(rd, cpu_tmp0);
2137 break; 2137 break;
2138 case 0x18: /* System tick */ 2138 case 0x18: /* System tick */
2139 { 2139 {
@@ -2149,9 +2149,9 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2149,9 +2149,9 @@ static void disas_sparc_insn(DisasContext * dc)
2149 } 2149 }
2150 break; 2150 break;
2151 case 0x19: /* System tick compare */ 2151 case 0x19: /* System tick compare */
2152 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2152 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2153 offsetof(CPUSPARCState, stick_cmpr)); 2153 offsetof(CPUSPARCState, stick_cmpr));
2154 - gen_movl_TN_reg(rd, cpu_dst); 2154 + gen_movl_TN_reg(rd, cpu_tmp0);
2155 break; 2155 break;
2156 case 0x10: /* Performance Control */ 2156 case 0x10: /* Performance Control */
2157 case 0x11: /* Performance Instrumentation Counter */ 2157 case 0x11: /* Performance Instrumentation Counter */
@@ -2219,7 +2219,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2219,7 +2219,7 @@ static void disas_sparc_insn(DisasContext * dc)
2219 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 2219 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
2220 tcg_gen_ld_ptr(r_tsptr, cpu_env, 2220 tcg_gen_ld_ptr(r_tsptr, cpu_env,
2221 offsetof(CPUState, tsptr)); 2221 offsetof(CPUState, tsptr));
2222 - tcg_gen_ld_tl(cpu_dst, r_tsptr, 2222 + tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
2223 offsetof(trap_state, tpc)); 2223 offsetof(trap_state, tpc));
2224 tcg_temp_free(r_tsptr); 2224 tcg_temp_free(r_tsptr);
2225 } 2225 }
@@ -2231,7 +2231,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2231,7 +2231,7 @@ static void disas_sparc_insn(DisasContext * dc)
2231 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 2231 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
2232 tcg_gen_ld_ptr(r_tsptr, cpu_env, 2232 tcg_gen_ld_ptr(r_tsptr, cpu_env,
2233 offsetof(CPUState, tsptr)); 2233 offsetof(CPUState, tsptr));
2234 - tcg_gen_ld_tl(cpu_dst, r_tsptr, 2234 + tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
2235 offsetof(trap_state, tnpc)); 2235 offsetof(trap_state, tnpc));
2236 tcg_temp_free(r_tsptr); 2236 tcg_temp_free(r_tsptr);
2237 } 2237 }
@@ -2243,7 +2243,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2243,7 +2243,7 @@ static void disas_sparc_insn(DisasContext * dc)
2243 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 2243 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
2244 tcg_gen_ld_ptr(r_tsptr, cpu_env, 2244 tcg_gen_ld_ptr(r_tsptr, cpu_env,
2245 offsetof(CPUState, tsptr)); 2245 offsetof(CPUState, tsptr));
2246 - tcg_gen_ld_tl(cpu_dst, r_tsptr, 2246 + tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
2247 offsetof(trap_state, tstate)); 2247 offsetof(trap_state, tstate));
2248 tcg_temp_free(r_tsptr); 2248 tcg_temp_free(r_tsptr);
2249 } 2249 }
@@ -2255,7 +2255,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2255,7 +2255,7 @@ static void disas_sparc_insn(DisasContext * dc)
2255 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 2255 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
2256 tcg_gen_ld_ptr(r_tsptr, cpu_env, 2256 tcg_gen_ld_ptr(r_tsptr, cpu_env,
2257 offsetof(CPUState, tsptr)); 2257 offsetof(CPUState, tsptr));
2258 - tcg_gen_ld_i32(cpu_dst, r_tsptr, 2258 + tcg_gen_ld_i32(cpu_tmp0, r_tsptr,
2259 offsetof(trap_state, tt)); 2259 offsetof(trap_state, tt));
2260 tcg_temp_free(r_tsptr); 2260 tcg_temp_free(r_tsptr);
2261 } 2261 }
@@ -2267,73 +2267,73 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2267,73 +2267,73 @@ static void disas_sparc_insn(DisasContext * dc)
2267 r_tickptr = tcg_temp_new(TCG_TYPE_PTR); 2267 r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
2268 tcg_gen_ld_ptr(r_tickptr, cpu_env, 2268 tcg_gen_ld_ptr(r_tickptr, cpu_env,
2269 offsetof(CPUState, tick)); 2269 offsetof(CPUState, tick));
2270 - tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst, 2270 + tcg_gen_helper_1_1(helper_tick_get_count, cpu_tmp0,
2271 r_tickptr); 2271 r_tickptr);
2272 - gen_movl_TN_reg(rd, cpu_dst); 2272 + gen_movl_TN_reg(rd, cpu_tmp0);
2273 tcg_temp_free(r_tickptr); 2273 tcg_temp_free(r_tickptr);
2274 } 2274 }
2275 break; 2275 break;
2276 case 5: // tba 2276 case 5: // tba
2277 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2277 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2278 offsetof(CPUSPARCState, tbr)); 2278 offsetof(CPUSPARCState, tbr));
2279 break; 2279 break;
2280 case 6: // pstate 2280 case 6: // pstate
2281 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2281 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2282 offsetof(CPUSPARCState, pstate)); 2282 offsetof(CPUSPARCState, pstate));
2283 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2283 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2284 break; 2284 break;
2285 case 7: // tl 2285 case 7: // tl
2286 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2286 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2287 offsetof(CPUSPARCState, tl)); 2287 offsetof(CPUSPARCState, tl));
2288 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2288 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2289 break; 2289 break;
2290 case 8: // pil 2290 case 8: // pil
2291 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2291 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2292 offsetof(CPUSPARCState, psrpil)); 2292 offsetof(CPUSPARCState, psrpil));
2293 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2293 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2294 break; 2294 break;
2295 case 9: // cwp 2295 case 9: // cwp
2296 - tcg_gen_helper_1_0(helper_rdcwp, cpu_dst); 2296 + tcg_gen_helper_1_0(helper_rdcwp, cpu_tmp0);
2297 break; 2297 break;
2298 case 10: // cansave 2298 case 10: // cansave
2299 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2299 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2300 offsetof(CPUSPARCState, cansave)); 2300 offsetof(CPUSPARCState, cansave));
2301 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2301 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2302 break; 2302 break;
2303 case 11: // canrestore 2303 case 11: // canrestore
2304 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2304 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2305 offsetof(CPUSPARCState, canrestore)); 2305 offsetof(CPUSPARCState, canrestore));
2306 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2306 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2307 break; 2307 break;
2308 case 12: // cleanwin 2308 case 12: // cleanwin
2309 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2309 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2310 offsetof(CPUSPARCState, cleanwin)); 2310 offsetof(CPUSPARCState, cleanwin));
2311 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2311 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2312 break; 2312 break;
2313 case 13: // otherwin 2313 case 13: // otherwin
2314 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2314 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2315 offsetof(CPUSPARCState, otherwin)); 2315 offsetof(CPUSPARCState, otherwin));
2316 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2316 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2317 break; 2317 break;
2318 case 14: // wstate 2318 case 14: // wstate
2319 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2319 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2320 offsetof(CPUSPARCState, wstate)); 2320 offsetof(CPUSPARCState, wstate));
2321 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2321 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2322 break; 2322 break;
2323 case 16: // UA2005 gl 2323 case 16: // UA2005 gl
2324 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2324 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2325 offsetof(CPUSPARCState, gl)); 2325 offsetof(CPUSPARCState, gl));
2326 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2326 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2327 break; 2327 break;
2328 case 26: // UA2005 strand status 2328 case 26: // UA2005 strand status
2329 if (!hypervisor(dc)) 2329 if (!hypervisor(dc))
2330 goto priv_insn; 2330 goto priv_insn;
2331 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2331 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2332 offsetof(CPUSPARCState, ssr)); 2332 offsetof(CPUSPARCState, ssr));
2333 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2333 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2334 break; 2334 break;
2335 case 31: // ver 2335 case 31: // ver
2336 - tcg_gen_ld_tl(cpu_dst, cpu_env, 2336 + tcg_gen_ld_tl(cpu_tmp0, cpu_env,
2337 offsetof(CPUSPARCState, version)); 2337 offsetof(CPUSPARCState, version));
2338 break; 2338 break;
2339 case 15: // fq 2339 case 15: // fq
@@ -2343,9 +2343,9 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2343,9 +2343,9 @@ static void disas_sparc_insn(DisasContext * dc)
2343 #else 2343 #else
2344 tcg_gen_ld_i32(cpu_tmp32, cpu_env, 2344 tcg_gen_ld_i32(cpu_tmp32, cpu_env,
2345 offsetof(CPUSPARCState, wim)); 2345 offsetof(CPUSPARCState, wim));
2346 - tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32); 2346 + tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
2347 #endif 2347 #endif
2348 - gen_movl_TN_reg(rd, cpu_dst); 2348 + gen_movl_TN_reg(rd, cpu_tmp0);
2349 break; 2349 break;
2350 } else if (xop == 0x2b) { /* rdtbr / V9 flushw */ 2350 } else if (xop == 0x2b) { /* rdtbr / V9 flushw */
2351 #ifdef TARGET_SPARC64 2351 #ifdef TARGET_SPARC64
@@ -2353,8 +2353,8 @@ static void disas_sparc_insn(DisasContext * dc) @@ -2353,8 +2353,8 @@ static void disas_sparc_insn(DisasContext * dc)
2353 #else 2353 #else
2354 if (!supervisor(dc)) 2354 if (!supervisor(dc))
2355 goto priv_insn; 2355 goto priv_insn;
2356 - tcg_gen_ld_tl(cpu_dst, cpu_env, offsetof(CPUSPARCState, tbr));  
2357 - gen_movl_TN_reg(rd, cpu_dst); 2356 + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, tbr));
  2357 + gen_movl_TN_reg(rd, cpu_tmp0);
2358 #endif 2358 #endif
2359 break; 2359 break;
2360 #endif 2360 #endif
@@ -3149,8 +3149,8 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3149,8 +3149,8 @@ static void disas_sparc_insn(DisasContext * dc)
3149 { 3149 {
3150 switch(rd) { 3150 switch(rd) {
3151 case 0: /* wry */ 3151 case 0: /* wry */
3152 - tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);  
3153 - tcg_gen_st_tl(cpu_dst, cpu_env, 3152 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
  3153 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3154 offsetof(CPUSPARCState, y)); 3154 offsetof(CPUSPARCState, y));
3155 break; 3155 break;
3156 #ifndef TARGET_SPARC64 3156 #ifndef TARGET_SPARC64
@@ -3193,8 +3193,8 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3193,8 +3193,8 @@ static void disas_sparc_insn(DisasContext * dc)
3193 case 0x13: /* Graphics Status */ 3193 case 0x13: /* Graphics Status */
3194 if (gen_trap_ifnofpu(dc, cpu_cond)) 3194 if (gen_trap_ifnofpu(dc, cpu_cond))
3195 goto jmp_insn; 3195 goto jmp_insn;
3196 - tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);  
3197 - tcg_gen_st_tl(cpu_dst, cpu_env, 3196 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
  3197 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3198 offsetof(CPUSPARCState, gsr)); 3198 offsetof(CPUSPARCState, gsr));
3199 break; 3199 break;
3200 case 0x17: /* Tick compare */ 3200 case 0x17: /* Tick compare */
@@ -3205,16 +3205,16 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3205,16 +3205,16 @@ static void disas_sparc_insn(DisasContext * dc)
3205 { 3205 {
3206 TCGv r_tickptr; 3206 TCGv r_tickptr;
3207 3207
3208 - tcg_gen_xor_tl(cpu_dst, cpu_src1, 3208 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
3209 cpu_src2); 3209 cpu_src2);
3210 - tcg_gen_st_tl(cpu_dst, cpu_env, 3210 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3211 offsetof(CPUSPARCState, 3211 offsetof(CPUSPARCState,
3212 tick_cmpr)); 3212 tick_cmpr));
3213 r_tickptr = tcg_temp_new(TCG_TYPE_PTR); 3213 r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
3214 tcg_gen_ld_ptr(r_tickptr, cpu_env, 3214 tcg_gen_ld_ptr(r_tickptr, cpu_env,
3215 offsetof(CPUState, tick)); 3215 offsetof(CPUState, tick));
3216 tcg_gen_helper_0_2(helper_tick_set_limit, 3216 tcg_gen_helper_0_2(helper_tick_set_limit,
3217 - r_tickptr, cpu_dst); 3217 + r_tickptr, cpu_tmp0);
3218 tcg_temp_free(r_tickptr); 3218 tcg_temp_free(r_tickptr);
3219 } 3219 }
3220 break; 3220 break;
@@ -3244,16 +3244,16 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3244,16 +3244,16 @@ static void disas_sparc_insn(DisasContext * dc)
3244 { 3244 {
3245 TCGv r_tickptr; 3245 TCGv r_tickptr;
3246 3246
3247 - tcg_gen_xor_tl(cpu_dst, cpu_src1, 3247 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
3248 cpu_src2); 3248 cpu_src2);
3249 - tcg_gen_st_tl(cpu_dst, cpu_env, 3249 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3250 offsetof(CPUSPARCState, 3250 offsetof(CPUSPARCState,
3251 stick_cmpr)); 3251 stick_cmpr));
3252 r_tickptr = tcg_temp_new(TCG_TYPE_PTR); 3252 r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
3253 tcg_gen_ld_ptr(r_tickptr, cpu_env, 3253 tcg_gen_ld_ptr(r_tickptr, cpu_env,
3254 offsetof(CPUState, stick)); 3254 offsetof(CPUState, stick));
3255 tcg_gen_helper_0_2(helper_tick_set_limit, 3255 tcg_gen_helper_0_2(helper_tick_set_limit,
3256 - r_tickptr, cpu_dst); 3256 + r_tickptr, cpu_tmp0);
3257 tcg_temp_free(r_tickptr); 3257 tcg_temp_free(r_tickptr);
3258 } 3258 }
3259 break; 3259 break;
@@ -3306,7 +3306,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3306,7 +3306,7 @@ static void disas_sparc_insn(DisasContext * dc)
3306 { 3306 {
3307 if (!supervisor(dc)) 3307 if (!supervisor(dc))
3308 goto priv_insn; 3308 goto priv_insn;
3309 - tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); 3309 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
3310 #ifdef TARGET_SPARC64 3310 #ifdef TARGET_SPARC64
3311 switch (rd) { 3311 switch (rd) {
3312 case 0: // tpc 3312 case 0: // tpc
@@ -3316,7 +3316,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3316,7 +3316,7 @@ static void disas_sparc_insn(DisasContext * dc)
3316 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 3316 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
3317 tcg_gen_ld_ptr(r_tsptr, cpu_env, 3317 tcg_gen_ld_ptr(r_tsptr, cpu_env,
3318 offsetof(CPUState, tsptr)); 3318 offsetof(CPUState, tsptr));
3319 - tcg_gen_st_tl(cpu_dst, r_tsptr, 3319 + tcg_gen_st_tl(cpu_tmp0, r_tsptr,
3320 offsetof(trap_state, tpc)); 3320 offsetof(trap_state, tpc));
3321 tcg_temp_free(r_tsptr); 3321 tcg_temp_free(r_tsptr);
3322 } 3322 }
@@ -3328,7 +3328,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3328,7 +3328,7 @@ static void disas_sparc_insn(DisasContext * dc)
3328 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 3328 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
3329 tcg_gen_ld_ptr(r_tsptr, cpu_env, 3329 tcg_gen_ld_ptr(r_tsptr, cpu_env,
3330 offsetof(CPUState, tsptr)); 3330 offsetof(CPUState, tsptr));
3331 - tcg_gen_st_tl(cpu_dst, r_tsptr, 3331 + tcg_gen_st_tl(cpu_tmp0, r_tsptr,
3332 offsetof(trap_state, tnpc)); 3332 offsetof(trap_state, tnpc));
3333 tcg_temp_free(r_tsptr); 3333 tcg_temp_free(r_tsptr);
3334 } 3334 }
@@ -3340,7 +3340,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3340,7 +3340,7 @@ static void disas_sparc_insn(DisasContext * dc)
3340 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 3340 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
3341 tcg_gen_ld_ptr(r_tsptr, cpu_env, 3341 tcg_gen_ld_ptr(r_tsptr, cpu_env,
3342 offsetof(CPUState, tsptr)); 3342 offsetof(CPUState, tsptr));
3343 - tcg_gen_st_tl(cpu_dst, r_tsptr, 3343 + tcg_gen_st_tl(cpu_tmp0, r_tsptr,
3344 offsetof(trap_state, 3344 offsetof(trap_state,
3345 tstate)); 3345 tstate));
3346 tcg_temp_free(r_tsptr); 3346 tcg_temp_free(r_tsptr);
@@ -3353,7 +3353,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3353,7 +3353,7 @@ static void disas_sparc_insn(DisasContext * dc)
3353 r_tsptr = tcg_temp_new(TCG_TYPE_PTR); 3353 r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
3354 tcg_gen_ld_ptr(r_tsptr, cpu_env, 3354 tcg_gen_ld_ptr(r_tsptr, cpu_env,
3355 offsetof(CPUState, tsptr)); 3355 offsetof(CPUState, tsptr));
3356 - tcg_gen_st_i32(cpu_dst, r_tsptr, 3356 + tcg_gen_st_i32(cpu_tmp0, r_tsptr,
3357 offsetof(trap_state, tt)); 3357 offsetof(trap_state, tt));
3358 tcg_temp_free(r_tsptr); 3358 tcg_temp_free(r_tsptr);
3359 } 3359 }
@@ -3366,74 +3366,74 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3366,74 +3366,74 @@ static void disas_sparc_insn(DisasContext * dc)
3366 tcg_gen_ld_ptr(r_tickptr, cpu_env, 3366 tcg_gen_ld_ptr(r_tickptr, cpu_env,
3367 offsetof(CPUState, tick)); 3367 offsetof(CPUState, tick));
3368 tcg_gen_helper_0_2(helper_tick_set_count, 3368 tcg_gen_helper_0_2(helper_tick_set_count,
3369 - r_tickptr, cpu_dst); 3369 + r_tickptr, cpu_tmp0);
3370 tcg_temp_free(r_tickptr); 3370 tcg_temp_free(r_tickptr);
3371 } 3371 }
3372 break; 3372 break;
3373 case 5: // tba 3373 case 5: // tba
3374 - tcg_gen_st_tl(cpu_dst, cpu_env, 3374 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3375 offsetof(CPUSPARCState, tbr)); 3375 offsetof(CPUSPARCState, tbr));
3376 break; 3376 break;
3377 case 6: // pstate 3377 case 6: // pstate
3378 save_state(dc, cpu_cond); 3378 save_state(dc, cpu_cond);
3379 - tcg_gen_helper_0_1(helper_wrpstate, cpu_dst); 3379 + tcg_gen_helper_0_1(helper_wrpstate, cpu_tmp0);
3380 gen_op_next_insn(); 3380 gen_op_next_insn();
3381 tcg_gen_exit_tb(0); 3381 tcg_gen_exit_tb(0);
3382 dc->is_br = 1; 3382 dc->is_br = 1;
3383 break; 3383 break;
3384 case 7: // tl 3384 case 7: // tl
3385 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3385 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3386 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3386 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3387 offsetof(CPUSPARCState, tl)); 3387 offsetof(CPUSPARCState, tl));
3388 break; 3388 break;
3389 case 8: // pil 3389 case 8: // pil
3390 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3390 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3391 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3391 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3392 offsetof(CPUSPARCState, 3392 offsetof(CPUSPARCState,
3393 psrpil)); 3393 psrpil));
3394 break; 3394 break;
3395 case 9: // cwp 3395 case 9: // cwp
3396 - tcg_gen_helper_0_1(helper_wrcwp, cpu_dst); 3396 + tcg_gen_helper_0_1(helper_wrcwp, cpu_tmp0);
3397 break; 3397 break;
3398 case 10: // cansave 3398 case 10: // cansave
3399 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3399 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3400 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3400 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3401 offsetof(CPUSPARCState, 3401 offsetof(CPUSPARCState,
3402 cansave)); 3402 cansave));
3403 break; 3403 break;
3404 case 11: // canrestore 3404 case 11: // canrestore
3405 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3405 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3406 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3406 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3407 offsetof(CPUSPARCState, 3407 offsetof(CPUSPARCState,
3408 canrestore)); 3408 canrestore));
3409 break; 3409 break;
3410 case 12: // cleanwin 3410 case 12: // cleanwin
3411 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3411 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3412 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3412 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3413 offsetof(CPUSPARCState, 3413 offsetof(CPUSPARCState,
3414 cleanwin)); 3414 cleanwin));
3415 break; 3415 break;
3416 case 13: // otherwin 3416 case 13: // otherwin
3417 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3417 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3418 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3418 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3419 offsetof(CPUSPARCState, 3419 offsetof(CPUSPARCState,
3420 otherwin)); 3420 otherwin));
3421 break; 3421 break;
3422 case 14: // wstate 3422 case 14: // wstate
3423 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3423 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3424 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3424 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3425 offsetof(CPUSPARCState, 3425 offsetof(CPUSPARCState,
3426 wstate)); 3426 wstate));
3427 break; 3427 break;
3428 case 16: // UA2005 gl 3428 case 16: // UA2005 gl
3429 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3429 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3430 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3430 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3431 offsetof(CPUSPARCState, gl)); 3431 offsetof(CPUSPARCState, gl));
3432 break; 3432 break;
3433 case 26: // UA2005 strand status 3433 case 26: // UA2005 strand status
3434 if (!hypervisor(dc)) 3434 if (!hypervisor(dc))
3435 goto priv_insn; 3435 goto priv_insn;
3436 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3436 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3437 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3437 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3438 offsetof(CPUSPARCState, ssr)); 3438 offsetof(CPUSPARCState, ssr));
3439 break; 3439 break;
@@ -3441,7 +3441,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3441,7 +3441,7 @@ static void disas_sparc_insn(DisasContext * dc)
3441 goto illegal_insn; 3441 goto illegal_insn;
3442 } 3442 }
3443 #else 3443 #else
3444 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3444 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3445 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3445 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3446 offsetof(CPUSPARCState, wim)); 3446 offsetof(CPUSPARCState, wim));
3447 #endif 3447 #endif
@@ -3452,13 +3452,13 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3452,13 +3452,13 @@ static void disas_sparc_insn(DisasContext * dc)
3452 #ifndef TARGET_SPARC64 3452 #ifndef TARGET_SPARC64
3453 if (!supervisor(dc)) 3453 if (!supervisor(dc))
3454 goto priv_insn; 3454 goto priv_insn;
3455 - tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2);  
3456 - tcg_gen_st_tl(cpu_dst, cpu_env, 3455 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
  3456 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3457 offsetof(CPUSPARCState, tbr)); 3457 offsetof(CPUSPARCState, tbr));
3458 #else 3458 #else
3459 if (!hypervisor(dc)) 3459 if (!hypervisor(dc))
3460 goto priv_insn; 3460 goto priv_insn;
3461 - tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2); 3461 + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
3462 switch (rd) { 3462 switch (rd) {
3463 case 0: // hpstate 3463 case 0: // hpstate
3464 // XXX gen_op_wrhpstate(); 3464 // XXX gen_op_wrhpstate();
@@ -3471,12 +3471,12 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3471,12 +3471,12 @@ static void disas_sparc_insn(DisasContext * dc)
3471 // XXX gen_op_wrhtstate(); 3471 // XXX gen_op_wrhtstate();
3472 break; 3472 break;
3473 case 3: // hintp 3473 case 3: // hintp
3474 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3474 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3475 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3475 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3476 offsetof(CPUSPARCState, hintp)); 3476 offsetof(CPUSPARCState, hintp));
3477 break; 3477 break;
3478 case 5: // htba 3478 case 5: // htba
3479 - tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); 3479 + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
3480 tcg_gen_st_i32(cpu_tmp32, cpu_env, 3480 tcg_gen_st_i32(cpu_tmp32, cpu_env,
3481 offsetof(CPUSPARCState, htba)); 3481 offsetof(CPUSPARCState, htba));
3482 break; 3482 break;
@@ -3484,14 +3484,14 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3484,14 +3484,14 @@ static void disas_sparc_insn(DisasContext * dc)
3484 { 3484 {
3485 TCGv r_tickptr; 3485 TCGv r_tickptr;
3486 3486
3487 - tcg_gen_st_tl(cpu_dst, cpu_env, 3487 + tcg_gen_st_tl(cpu_tmp0, cpu_env,
3488 offsetof(CPUSPARCState, 3488 offsetof(CPUSPARCState,
3489 hstick_cmpr)); 3489 hstick_cmpr));
3490 r_tickptr = tcg_temp_new(TCG_TYPE_PTR); 3490 r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
3491 tcg_gen_ld_ptr(r_tickptr, cpu_env, 3491 tcg_gen_ld_ptr(r_tickptr, cpu_env,
3492 offsetof(CPUState, hstick)); 3492 offsetof(CPUState, hstick));
3493 tcg_gen_helper_0_2(helper_tick_set_limit, 3493 tcg_gen_helper_0_2(helper_tick_set_limit,
3494 - r_tickptr, cpu_dst); 3494 + r_tickptr, cpu_tmp0);
3495 tcg_temp_free(r_tickptr); 3495 tcg_temp_free(r_tickptr);
3496 } 3496 }
3497 break; 3497 break;