Commit ecb644f409b9bff0b72b0be8001b7d323b817392
1 parent
bfed01fc
Some more regs_to_env/envs_to_regs cleanup.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2937 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
6 additions
and
30 deletions
cpu-exec.c
| @@ -263,28 +263,27 @@ int cpu_exec(CPUState *env1) | @@ -263,28 +263,27 @@ int cpu_exec(CPUState *env1) | ||
| 263 | asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); | 263 | asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); |
| 264 | #endif | 264 | #endif |
| 265 | 265 | ||
| 266 | -#if defined(TARGET_I386) | ||
| 267 | env_to_regs(); | 266 | env_to_regs(); |
| 267 | +#if defined(TARGET_I386) | ||
| 268 | /* put eflags in CPU temporary format */ | 268 | /* put eflags in CPU temporary format */ |
| 269 | CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | 269 | CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |
| 270 | DF = 1 - (2 * ((env->eflags >> 10) & 1)); | 270 | DF = 1 - (2 * ((env->eflags >> 10) & 1)); |
| 271 | CC_OP = CC_OP_EFLAGS; | 271 | CC_OP = CC_OP_EFLAGS; |
| 272 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | 272 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |
| 273 | -#elif defined(TARGET_ARM) | ||
| 274 | #elif defined(TARGET_SPARC) | 273 | #elif defined(TARGET_SPARC) |
| 275 | #if defined(reg_REGWPTR) | 274 | #if defined(reg_REGWPTR) |
| 276 | saved_regwptr = REGWPTR; | 275 | saved_regwptr = REGWPTR; |
| 277 | #endif | 276 | #endif |
| 278 | -#elif defined(TARGET_PPC) | ||
| 279 | #elif defined(TARGET_M68K) | 277 | #elif defined(TARGET_M68K) |
| 280 | env->cc_op = CC_OP_FLAGS; | 278 | env->cc_op = CC_OP_FLAGS; |
| 281 | env->cc_dest = env->sr & 0xf; | 279 | env->cc_dest = env->sr & 0xf; |
| 282 | env->cc_x = (env->sr >> 4) & 1; | 280 | env->cc_x = (env->sr >> 4) & 1; |
| 281 | +#elif defined(TARGET_ALPHA) | ||
| 282 | +#elif defined(TARGET_ARM) | ||
| 283 | +#elif defined(TARGET_PPC) | ||
| 283 | #elif defined(TARGET_MIPS) | 284 | #elif defined(TARGET_MIPS) |
| 284 | #elif defined(TARGET_SH4) | 285 | #elif defined(TARGET_SH4) |
| 285 | /* XXXXX */ | 286 | /* XXXXX */ |
| 286 | -#elif defined(TARGET_ALPHA) | ||
| 287 | - env_to_regs(); | ||
| 288 | #else | 287 | #else |
| 289 | #error unsupported target CPU | 288 | #error unsupported target CPU |
| 290 | #endif | 289 | #endif |
| @@ -522,32 +521,9 @@ int cpu_exec(CPUState *env1) | @@ -522,32 +521,9 @@ int cpu_exec(CPUState *env1) | ||
| 522 | } | 521 | } |
| 523 | #ifdef DEBUG_EXEC | 522 | #ifdef DEBUG_EXEC |
| 524 | if ((loglevel & CPU_LOG_TB_CPU)) { | 523 | if ((loglevel & CPU_LOG_TB_CPU)) { |
| 525 | -#if defined(TARGET_I386) | ||
| 526 | /* restore flags in standard format */ | 524 | /* restore flags in standard format */ |
| 527 | -#ifdef reg_EAX | ||
| 528 | - env->regs[R_EAX] = EAX; | ||
| 529 | -#endif | ||
| 530 | -#ifdef reg_EBX | ||
| 531 | - env->regs[R_EBX] = EBX; | ||
| 532 | -#endif | ||
| 533 | -#ifdef reg_ECX | ||
| 534 | - env->regs[R_ECX] = ECX; | ||
| 535 | -#endif | ||
| 536 | -#ifdef reg_EDX | ||
| 537 | - env->regs[R_EDX] = EDX; | ||
| 538 | -#endif | ||
| 539 | -#ifdef reg_ESI | ||
| 540 | - env->regs[R_ESI] = ESI; | ||
| 541 | -#endif | ||
| 542 | -#ifdef reg_EDI | ||
| 543 | - env->regs[R_EDI] = EDI; | ||
| 544 | -#endif | ||
| 545 | -#ifdef reg_EBP | ||
| 546 | - env->regs[R_EBP] = EBP; | ||
| 547 | -#endif | ||
| 548 | -#ifdef reg_ESP | ||
| 549 | - env->regs[R_ESP] = ESP; | ||
| 550 | -#endif | 525 | + regs_to_env(); |
| 526 | +#if defined(TARGET_I386) | ||
| 551 | env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); | 527 | env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); |
| 552 | cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | 528 | cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); |
| 553 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | 529 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |