gwj / at91sam9263 · Commits

Commit eca1bdf415c454093dfc7eb983cd49287c043967

Authored by aliguori
1 parent 2f5f8996

Log reset events (Jan Kiszka) 

Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.

This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 10 changed files with 45 additions and 2 deletions
cpu-all.h
  View file @eca1bdf
... ... @@ -816,6 +816,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
816 816 #define CPU_LOG_PCALL (1 << 6)
817 817 #define CPU_LOG_IOPORT (1 << 7)
818 818 #define CPU_LOG_TB_CPU (1 << 8)
  819 +#define CPU_LOG_RESET (1 << 9)
819 820  
820 821 /* define log items */
821 822 typedef struct CPULogItem {
... ...
... ... @@ -1569,6 +1569,8 @@ const CPULogItem cpu_log_items[] = {
1569 1569 #ifdef TARGET_I386
1570 1570 { CPU_LOG_PCALL, "pcall",
1571 1571 "show protected mode far calls/returns/exceptions" },
  1572 + { CPU_LOG_RESET, "cpu_reset",
  1573 + "show CPU state before CPU resets" },
1572 1574 #endif
1573 1575 #ifdef DEBUG_IOPORT
1574 1576 { CPU_LOG_IOPORT, "ioport",
... ...
target-arm/helper.c
  View file @eca1bdf
... ... @@ -159,6 +159,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
159 159 void cpu_reset(CPUARMState *env)
160 160 {
161 161 uint32_t id;
  162 +
  163 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  164 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  165 + log_cpu_state(env, 0);
  166 + }
  167 +
162 168 id = env->cp15.c0_cpuid;
163 169 memset(env, 0, offsetof(CPUARMState, breakpoints));
164 170 if (id)
... ...
target-cris/translate.c
  View file @eca1bdf
... ... @@ -3458,6 +3458,11 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
3458 3458  
3459 3459 void cpu_reset (CPUCRISState *env)
3460 3460 {
  3461 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  3462 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  3463 + log_cpu_state(env, 0);
  3464 + }
  3465 +
3461 3466 memset(env, 0, offsetof(CPUCRISState, breakpoints));
3462 3467 tlb_flush(env, 1);
3463 3468  
... ...
target-i386/helper.c
  View file @eca1bdf
... ... @@ -418,6 +418,11 @@ void cpu_reset(CPUX86State *env)
418 418 {
419 419 int i;
420 420  
  421 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  422 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  423 + log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP);
  424 + }
  425 +
421 426 memset(env, 0, offsetof(CPUX86State, breakpoints));
422 427  
423 428 tlb_flush(env, 1);
... ...
target-m68k/helper.c
  View file @eca1bdf
... ... @@ -143,6 +143,11 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
143 143  
144 144 void cpu_reset(CPUM68KState *env)
145 145 {
  146 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  147 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  148 + log_cpu_state(env, 0);
  149 + }
  150 +
146 151 memset(env, 0, offsetof(CPUM68KState, breakpoints));
147 152 #if !defined (CONFIG_USER_ONLY)
148 153 env->sr = 0x2700;
... ...
target-mips/translate.c
  View file @eca1bdf
... ... @@ -8489,6 +8489,11 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
8489 8489  
8490 8490 void cpu_reset (CPUMIPSState *env)
8491 8491 {
  8492 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  8493 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  8494 + log_cpu_state(env, 0);
  8495 + }
  8496 +
8492 8497 memset(env, 0, offsetof(CPUMIPSState, breakpoints));
8493 8498  
8494 8499 tlb_flush(env, 1);
... ...
target-ppc/helper.c
  View file @eca1bdf
... ... @@ -2709,10 +2709,14 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr)
2709 2709  
2710 2710 void cpu_ppc_reset (void *opaque)
2711 2711 {
2712   - CPUPPCState *env;
  2712 + CPUPPCState *env = opaque;
2713 2713 target_ulong msr;
2714 2714  
2715   - env = opaque;
  2715 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  2716 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  2717 + log_cpu_state(env, 0);
  2718 + }
  2719 +
2716 2720 msr = (target_ulong)0;
2717 2721 if (0) {
2718 2722 /* XXX: find a suitable condition to enable the hypervisor mode */
... ...
target-sh4/translate.c
  View file @eca1bdf
... ... @@ -184,6 +184,11 @@ void cpu_dump_state(CPUState * env, FILE * f,
184 184  
185 185 static void cpu_sh4_reset(CPUSH4State * env)
186 186 {
  187 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  188 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  189 + log_cpu_state(env, 0);
  190 + }
  191 +
187 192 #if defined(CONFIG_USER_ONLY)
188 193 env->sr = 0;
189 194 #else
... ...
target-sparc/helper.c
  View file @eca1bdf
... ... @@ -639,6 +639,11 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
639 639  
640 640 void cpu_reset(CPUSPARCState *env)
641 641 {
  642 + if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  643 + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
  644 + log_cpu_state(env, 0);
  645 + }
  646 +
642 647 tlb_flush(env, 1);
643 648 env->cwp = 0;
644 649 env->wim = 1;
... ...