Commit ea4b07f7623c3863d86aad3d5718c28d39e1a1a9
1 parent
4c2485de
Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
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3 deletions
target-mips/translate_init.c
... | ... | @@ -403,9 +403,9 @@ static mips_def_t mips_defs[] = |
403 | 403 | .SYNCI_Step = 32, |
404 | 404 | .CCRes = 2, |
405 | 405 | .CP0_Status_rw_bitmask = 0x36FBFFFF, |
406 | - .CP1_fcr0 = (1 << FCR0_3D) | (1 << FCR0_PS) | (1 << FCR0_L) | | |
407 | - (1 << FCR0_W) | (1 << FCR0_D) | (1 << FCR0_S) | | |
408 | - (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), | |
406 | + .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_3D) | (1 << FCR0_PS) | | |
407 | + (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) | | |
408 | + (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV), | |
409 | 409 | .SEGBITS = 42, |
410 | 410 | /* The architectural limit is 59, but we have hardcoded 36 bit |
411 | 411 | in some places... | ... | ... |