gwj / at91sam9263 · Commits

Commit e9203484cba1f15b81e38d0b1be78806d8d66174

Authored by aurel32
1 parent 6958549d

target-mips: optimize some gpr accesses 

Optimize gpr accesses when it is known at translation time that gpr != 0.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6307 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 6 additions and 12 deletions
target-mips/translate.c
  View file @e920348
... ... @@ -988,9 +988,8 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
988 988 } else if (offset == 0) {
989 989 gen_load_gpr(t0, base);
990 990 } else {
991   - gen_load_gpr(t0, base);
992   - tcg_gen_movi_tl(t1, offset);
993   - gen_op_addr_add(ctx, t0, t1);
  991 + tcg_gen_movi_tl(t0, offset);
  992 + gen_op_addr_add(ctx, t0, cpu_gpr[base]);
994 993 }
995 994 /* Don't do NOP if destination is zero: we must perform the actual
996 995 memory access. */
... ... @@ -1151,12 +1150,8 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
1151 1150 } else if (offset == 0) {
1152 1151 gen_load_gpr(t0, base);
1153 1152 } else {
1154   - TCGv t1 = tcg_temp_local_new();
1155   -
1156   - gen_load_gpr(t0, base);
1157   - tcg_gen_movi_tl(t1, offset);
1158   - gen_op_addr_add(ctx, t0, t1);
1159   - tcg_temp_free(t1);
  1153 + tcg_gen_movi_tl(t0, offset);
  1154 + gen_op_addr_add(ctx, t0, cpu_gpr[base]);
1160 1155 }
1161 1156 /* Don't do NOP if destination is zero: we must perform the actual
1162 1157 memory access. */
... ... @@ -7259,9 +7254,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
7259 7254 } else if (index == 0) {
7260 7255 gen_load_gpr(t0, base);
7261 7256 } else {
7262   - gen_load_gpr(t0, base);
7263   - gen_load_gpr(t1, index);
7264   - gen_op_addr_add(ctx, t0, t1);
  7257 + gen_load_gpr(t0, index);
  7258 + gen_op_addr_add(ctx, t0, cpu_gpr[base]);
7265 7259 }
7266 7260 /* Don't do NOP if destination is zero: we must perform the actual
7267 7261 memory access. */
... ...