Commit e8807b14cc8c12c0e14c08fa396d9da043b48209

Authored by Igor Kovalenko
Committed by Blue Swirl
1 parent 616cbc78

sparc64: mmu bypass mode correction

This Implement physical address truncation in mmu bypass mode.
IMMU bypass is also active when cpu enters RED_STATE

Signed-off-by: igor.v.kovalenko@gmail.com

--
Kind regards,
Igor V. Kovalenko
Showing 1 changed file with 11 additions and 3 deletions
target-sparc/helper.c
@@ -369,6 +369,13 @@ void dump_mmu(CPUState *env) @@ -369,6 +369,13 @@ void dump_mmu(CPUState *env)
369 #endif /* DEBUG_MMU */ 369 #endif /* DEBUG_MMU */
370 370
371 #else /* !TARGET_SPARC64 */ 371 #else /* !TARGET_SPARC64 */
  372 +
  373 +// 41 bit physical address space
  374 +static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
  375 +{
  376 + return x & 0x1ffffffffffULL;
  377 +}
  378 +
372 /* 379 /*
373 * UltraSparc IIi I/DMMUs 380 * UltraSparc IIi I/DMMUs
374 */ 381 */
@@ -380,7 +387,7 @@ static int get_physical_address_data(CPUState *env, @@ -380,7 +387,7 @@ static int get_physical_address_data(CPUState *env,
380 unsigned int i; 387 unsigned int i;
381 388
382 if ((env->lsu & DMMU_E) == 0) { /* DMMU disabled */ 389 if ((env->lsu & DMMU_E) == 0) { /* DMMU disabled */
383 - *physical = address; 390 + *physical = ultrasparc_truncate_physical(address);
384 *prot = PAGE_READ | PAGE_WRITE; 391 *prot = PAGE_READ | PAGE_WRITE;
385 return 0; 392 return 0;
386 } 393 }
@@ -442,8 +449,9 @@ static int get_physical_address_code(CPUState *env, @@ -442,8 +449,9 @@ static int get_physical_address_code(CPUState *env,
442 target_ulong mask; 449 target_ulong mask;
443 unsigned int i; 450 unsigned int i;
444 451
445 - if ((env->lsu & IMMU_E) == 0) { /* IMMU disabled */  
446 - *physical = address; 452 + if ((env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0) {
  453 + /* IMMU disabled */
  454 + *physical = ultrasparc_truncate_physical(address);
447 *prot = PAGE_EXEC; 455 *prot = PAGE_EXEC;
448 return 0; 456 return 0;
449 } 457 }