gwj / at91sam9263 · Commits

Commit e63204853e71ffe4493f55ee82db8122f9b44ed1

Authored by edgar_igl
1 parent 0db74b07

ETRAX-FS: Simplify the DMA blocks address registration and decoding. 

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5898 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 7 additions and 18 deletions
hw/etraxfs_dma.c
  View file @e632048
@@ -165,11 +165,9 @@ enum dma_ch_state @@ -165,11 +165,9 @@ enum dma_ch_state
165 165
166 struct fs_dma_channel 166 struct fs_dma_channel
167 { 167 {
168 - int regmap;  
169 qemu_irq *irq; 168 qemu_irq *irq;
170 struct etraxfs_dma_client *client; 169 struct etraxfs_dma_client *client;
171 170
172 -  
173 /* Internal status. */ 171 /* Internal status. */
174 int stream_cmd_src; 172 int stream_cmd_src;
175 enum dma_ch_state state; 173 enum dma_ch_state state;
@@ -187,6 +185,7 @@ struct fs_dma_channel @@ -187,6 +185,7 @@ struct fs_dma_channel
187 185
188 struct fs_dma_ctrl 186 struct fs_dma_ctrl
189 { 187 {
  188 + int map;
190 CPUState *env; 189 CPUState *env;
191 190
192 int nr_channels; 191 int nr_channels;
@@ -570,9 +569,9 @@ dma_readl (void *opaque, target_phys_addr_t addr) @@ -570,9 +569,9 @@ dma_readl (void *opaque, target_phys_addr_t addr)
570 int c; 569 int c;
571 uint32_t r = 0; 570 uint32_t r = 0;
572 571
573 - /* Make addr relative to this instances base. */ 572 + /* Make addr relative to this channel and bounded to nr regs. */
574 c = fs_channel(addr); 573 c = fs_channel(addr);
575 - addr &= 0x1fff; 574 + addr &= 0xff;
576 switch (addr) 575 switch (addr)
577 { 576 {
578 case RW_STAT: 577 case RW_STAT:
@@ -616,9 +615,9 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value) @@ -616,9 +615,9 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
616 struct fs_dma_ctrl *ctrl = opaque; 615 struct fs_dma_ctrl *ctrl = opaque;
617 int c; 616 int c;
618 617
619 - /* Make addr relative to this instances base. */ 618 + /* Make addr relative to this channel and bounded to nr regs. */
620 c = fs_channel(addr); 619 c = fs_channel(addr);
621 - addr &= 0x1fff; 620 + addr &= 0xff;
622 switch (addr) 621 switch (addr)
623 { 622 {
624 case RW_DATA: 623 case RW_DATA:
@@ -744,7 +743,6 @@ void *etraxfs_dmac_init(CPUState *env, @@ -744,7 +743,6 @@ void *etraxfs_dmac_init(CPUState *env,
744 target_phys_addr_t base, int nr_channels) 743 target_phys_addr_t base, int nr_channels)
745 { 744 {
746 struct fs_dma_ctrl *ctrl = NULL; 745 struct fs_dma_ctrl *ctrl = NULL;
747 - int i;  
748 746
749 ctrl = qemu_mallocz(sizeof *ctrl); 747 ctrl = qemu_mallocz(sizeof *ctrl);
750 if (!ctrl) 748 if (!ctrl)
@@ -758,17 +756,8 @@ void *etraxfs_dmac_init(CPUState *env, @@ -758,17 +756,8 @@ void *etraxfs_dmac_init(CPUState *env,
758 if (!ctrl->channels) 756 if (!ctrl->channels)
759 goto err; 757 goto err;
760 758
761 - for (i = 0; i < nr_channels; i++)  
762 - {  
763 - ctrl->channels[i].regmap = cpu_register_io_memory(0,  
764 - dma_read,  
765 - dma_write,  
766 - ctrl);  
767 - cpu_register_physical_memory_offset (base + i * 0x2000,  
768 - sizeof ctrl->channels[i].regs, ctrl->channels[i].regmap,  
769 - i * 0x2000);  
770 - }  
771 - 759 + ctrl->map = cpu_register_io_memory(0, dma_read, dma_write, ctrl);
  760 + cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
772 return ctrl; 761 return ctrl;
773 err: 762 err:
774 qemu_free(ctrl->channels); 763 qemu_free(ctrl->channels);