gwj / at91sam9263 · Commits

Commit e3e97e7c90f4a40a56ea05f3a34f267edf41c9ed

Authored by bellard
1 parent 47d02f6d

do not generate MP table if one CPU (no APIC in QEMU in this case) - added wbinv… 

…d (ignored in QEMU but useful on real hardware)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2191 c046a42c-6fe2-441c-8c8c-71466251a162
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pc-bios/bios.bin
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pc-bios/bios.diff
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1   -Index: BIOS-bochs-latest
2   -===================================================================
3   -RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-latest,v
4   -retrieving revision 1.133
5   -diff -u -w -r1.133 BIOS-bochs-latest
6   -Binary files /tmp/cvsrjjP5I and BIOS-bochs-latest differ
7   -Index: rombios.c
8   -===================================================================
9   -RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
10   -retrieving revision 1.170
11   -diff -u -w -r1.170 rombios.c
12   ---- rombios.c 30 Sep 2006 11:22:53 -0000 1.170
13   -+++ rombios.c 1 Oct 2006 16:03:53 -0000
14   -@@ -4115,7 +4115,7 @@
15   - case 3:
16   - set_e820_range(ES, regs.u.r16.di,
17   - 0x00100000L,
18   -- extended_memory_size - 0x10000L, 1);
19   -+ extended_memory_size - ACPI_DATA_SIZE, 1);
20   - regs.u.r32.ebx = 4;
21   - regs.u.r32.eax = 0x534D4150;
22   - regs.u.r32.ecx = 0x14;
23   -@@ -4124,7 +4124,7 @@
24   - break;
25   - case 4:
26   - set_e820_range(ES, regs.u.r16.di,
27   -- extended_memory_size - 0x10000L,
28   -+ extended_memory_size - ACPI_DATA_SIZE,
29   - extended_memory_size, 3); // ACPI RAM
30   - regs.u.r32.ebx = 5;
31   - regs.u.r32.eax = 0x534D4150;
32   -@@ -8723,7 +8723,7 @@
33   -
34   - .align 16
35   - bios32_entry_point:
36   -- pushf
37   -+ pushfd
38   - cmp eax, #0x49435024 ;; "$PCI"
39   - jne unknown_service
40   - mov eax, #0x80000000
41   -@@ -8750,12 +8750,12 @@
42   - #ifdef BX_QEMU
43   - and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu
44   - #endif
45   -- popf
46   -+ popfd
47   - retf
48   -
49   - .align 16
50   - pcibios_protected:
51   -- pushf
52   -+ pushfd
53   - cli
54   - push esi
55   - push edi
56   -@@ -8864,7 +8864,7 @@
57   - #ifdef BX_QEMU
58   - and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu
59   - #endif
60   -- popf
61   -+ popfd
62   - stc
63   - retf
64   - pci_pro_ok:
65   -@@ -8874,7 +8874,7 @@
66   - #ifdef BX_QEMU
67   - and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu
68   - #endif
69   -- popf
70   -+ popfd
71   - clc
72   - retf
73   -
74 1 Index: rombios.h
75 2 ===================================================================
76 3 RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
77   -retrieving revision 1.1
78   -diff -u -w -r1.1 rombios.h
79   ---- rombios.h 30 Sep 2006 11:22:53 -0000 1.1
80   -+++ rombios.h 1 Oct 2006 16:03:54 -0000
  4 +retrieving revision 1.2
  5 +diff -u -w -r1.2 rombios.h
  6 +--- rombios.h 1 Oct 2006 16:39:18 -0000 1.2
  7 ++++ rombios.h 2 Oct 2006 18:31:41 -0000
81 8 @@ -19,7 +19,7 @@
82 9 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
83 10  
... ... @@ -87,132 +14,56 @@ diff -u -w -r1.1 rombios.h
87 14  
88 15 #define BX_ROMBIOS32 1
89 16 #define DEBUG_ROMBIOS 0
90   -@@ -48,3 +48,7 @@
91   - #endif
92   - #define BX_INFO(format, p...) bios_printf(BIOS_PRINTF_INFO, format, ##p)
93   - #define BX_PANIC(format, p...) bios_printf(BIOS_PRINTF_DEBHALT, format, ##p)
94   -+
95   -+#define ACPI_DATA_SIZE 0x00010000L
96   -+#define PM_IO_BASE 0xb000
97   -+#define CPU_COUNT_ADDR 0xf000
98 17 Index: rombios32.c
99 18 ===================================================================
100 19 RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
101   -retrieving revision 1.4
102   -diff -u -w -r1.4 rombios32.c
103   ---- rombios32.c 30 Sep 2006 11:22:53 -0000 1.4
104   -+++ rombios32.c 1 Oct 2006 16:03:54 -0000
105   -@@ -55,13 +55,10 @@
  20 +retrieving revision 1.6
  21 +diff -u -w -r1.6 rombios32.c
  22 +--- rombios32.c 2 Oct 2006 06:29:37 -0000 1.6
  23 ++++ rombios32.c 2 Oct 2006 18:31:41 -0000
  24 +@@ -45,6 +45,8 @@
  25 + : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \
  26 + : "0" (index))
106 27  
107   - #define APIC_ENABLED 0x0100
  28 ++#define wbinvd() asm volatile("wbinvd")
  29 ++
  30 + #define CPUID_APIC (1 << 9)
108 31  
109   --#define CPU_COUNT_ADDR 0xf000
110   - #define AP_BOOT_ADDR 0x10000
  32 + #define APIC_BASE ((uint8_t *)0xfee00000)
  33 +@@ -591,6 +593,7 @@
  34 + PCIDevice *d = &i440_pcidev;
  35 + int v;
111 36  
112   - #define MPTABLE_MAX_SIZE 0x00002000
113   --#define ACPI_DATA_SIZE 0x00010000
114   - #define SMI_CMD_IO_ADDR 0xb2
115   --#define PM_IO_BASE 0xb000
  37 ++ wbinvd();
  38 + v = pci_config_readb(d, 0x59);
  39 + v = (v & 0x0f) | (0x10);
  40 + pci_config_writeb(d, 0x59, v);
  41 +@@ -645,7 +648,7 @@
  42 + outb(0xb3, 0x01);
116 43  
117   - #define BIOS_TMP_STORAGE 0x00030000 /* 64 KB used to copy the BIOS to shadow RAM */
  44 + /* raise an SMI interrupt */
  45 +- outb(0xb2, 0x01);
  46 ++ outb(0xb2, 0x00);
118 47  
119   -@@ -354,12 +351,14 @@
  48 + /* wait until SMM code executed */
  49 + while (inb(0xb3) != 0x00);
  50 +@@ -656,6 +659,7 @@
  51 + /* copy the SMM code */
  52 + memcpy((void *)0xa8000, &smm_code_start,
  53 + &smm_code_end - &smm_code_start);
  54 ++ wbinvd();
  55 +
  56 + /* close the SMM memory window and enable normal SMM */
  57 + pci_config_writeb(&i440_pcidev, 0x72, 0x02 | 0x08);
  58 +@@ -848,6 +852,11 @@
  59 + int ioapic_id, i, len;
  60 + int mp_config_table_size;
120 61  
121   - void delay_ms(int n)
122   - {
123   -- int i, j, r1, r2;
124   -+ int i, j;
125   - for(i = 0; i < n; i++) {
126   --#if BX_QEMU
127 62 +#ifdef BX_QEMU
128   - /* approximative ! */
129   - for(j = 0; j < 1000000; j++);
130   - #else
131   -+ {
132   -+ int r1, r2;
133   - j = 66;
134   - r1 = inb(0x61) & 0x10;
135   - do {
136   -@@ -369,6 +368,7 @@
137   - r1 = r2;
138   - }
139   - } while (j > 0);
140   -+ }
141   - #endif
142   - }
143   - }
144   -Index: rombios32start.S
145   -===================================================================
146   -RCS file: /cvsroot/bochs/bochs/bios/rombios32start.S,v
147   -retrieving revision 1.1
148   -diff -u -w -r1.1 rombios32start.S
149   ---- rombios32start.S 28 Sep 2006 18:56:20 -0000 1.1
150   -+++ rombios32start.S 1 Oct 2006 16:03:54 -0000
151   -@@ -1,3 +1,25 @@
152   -+/////////////////////////////////////////////////////////////////////////
153   -+// $Id: bios.diff,v 1.15 2006-10-01 16:08:15 bellard Exp $
154   -+/////////////////////////////////////////////////////////////////////////
155   -+//
156   -+// 32 bit Bochs BIOS init code
157   -+// Copyright (C) 2006 Fabrice Bellard
158   -+//
159   -+// This library is free software; you can redistribute it and/or
160   -+// modify it under the terms of the GNU Lesser General Public
161   -+// License as published by the Free Software Foundation; either
162   -+// version 2 of the License, or (at your option) any later version.
163   -+//
164   -+// This library is distributed in the hope that it will be useful,
165   -+// but WITHOUT ANY WARRANTY; without even the implied warranty of
166   -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
167   -+// Lesser General Public License for more details.
168   -+//
169   -+// You should have received a copy of the GNU Lesser General Public
170   -+// License along with this library; if not, write to the Free Software
171   -+// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
172   -+#include "rombios.h"
  63 ++ if (smp_cpus <= 1)
  64 ++ return;
  65 ++#endif
173 66 +
174   - .globl _start
175   - .globl smp_ap_boot_code_start
176   - .globl smp_ap_boot_code_end
177   -@@ -6,8 +28,6 @@
178   - .global smm_code_start
179   - .global smm_code_end
180   -
181   --#define PM_IO_BASE 0xb000
182   --
183   - _start:
184   - /* clear bss section */
185   - xor %eax, %eax
186   -@@ -18,13 +38,11 @@
187   -
188   - jmp rombios32_init
189   -
190   --#define CPU_COUNT 0xf000
191   --
192   - .code16
193   - smp_ap_boot_code_start:
194   - xor %ax, %ax
195   - mov %ax, %ds
196   -- incw CPU_COUNT
197   -+ incw CPU_COUNT_ADDR
198   - 1:
199   - hlt
200   - jmp 1b
201   -@@ -33,7 +51,7 @@
202   - /* code to relocate SMBASE to 0xa0000 */
203   - smm_relocation_start:
204   - mov $0x38000 + 0x7efc, %ebx
205   -- mov (%ebx), %al /* revision ID to see if x86_64 or x86 */
206   -+ addr32 mov (%ebx), %al /* revision ID to see if x86_64 or x86 */
207   - cmp $0x64, %al
208   - je 1f
209   - mov $0x38000 + 0x7ef8, %ebx
210   -@@ -42,7 +60,7 @@
211   - mov $0x38000 + 0x7f00, %ebx
212   - 2:
213   - movl $0xa0000, %eax
214   -- movl %eax, (%ebx)
215   -+ addr32 movl %eax, (%ebx)
216   - rsm
217   - smm_relocation_end:
218   -
  67 + #ifdef BX_USE_EBDA_TABLES
  68 + mp_config_table = (uint8_t *)(ram_size - ACPI_DATA_SIZE - MPTABLE_MAX_SIZE);
  69 + #else
... ...