Commit e3878283def049b072ae47b8ee123ef6618ca2fc

Authored by j_mayer
1 parent 4118a970

Implement size bit in PowerPC 64 comparisons.

Allow 'weight' field in sync instruction.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3250 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 4 additions and 4 deletions
target-ppc/translate.c
... ... @@ -969,7 +969,7 @@ GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \
969 969 { \
970 970 gen_op_load_gpr_T0(rA(ctx->opcode)); \
971 971 gen_op_load_gpr_T1(rB(ctx->opcode)); \
972   - if (ctx->sf_mode) \
  972 + if (ctx->sf_mode && (ctx->opcode & 0x00200000)) \
973 973 gen_op_##name##_64(); \
974 974 else \
975 975 gen_op_##name(); \
... ... @@ -993,7 +993,7 @@ GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
993 993 {
994 994 gen_op_load_gpr_T0(rA(ctx->opcode));
995 995 #if defined(TARGET_PPC64)
996   - if (ctx->sf_mode)
  996 + if (ctx->sf_mode && (ctx->opcode & 0x00200000))
997 997 gen_op_cmpi_64(SIMM(ctx->opcode));
998 998 else
999 999 #endif
... ... @@ -1007,7 +1007,7 @@ GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER)
1007 1007 {
1008 1008 gen_op_load_gpr_T0(rA(ctx->opcode));
1009 1009 #if defined(TARGET_PPC64)
1010   - if (ctx->sf_mode)
  1010 + if (ctx->sf_mode && (ctx->opcode & 0x00200000))
1011 1011 gen_op_cmpli_64(UIMM(ctx->opcode));
1012 1012 else
1013 1013 #endif
... ... @@ -2565,7 +2565,7 @@ GEN_HANDLER(stdcx_, 0x1F, 0x16, 0x06, 0x00000000, PPC_64B)
2565 2565 #endif /* defined(TARGET_PPC64) */
2566 2566  
2567 2567 /* sync */
2568   -GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x03FF0801, PPC_MEM_SYNC)
  2568 +GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x03CF0801, PPC_MEM_SYNC)
2569 2569 {
2570 2570 }
2571 2571  
... ...