gwj / at91sam9263 · Commits

Commit e35298cd1f00849477c65355db97e7400e1519dc

Authored by blueswir1
1 parent 9a7f3228

Generate better code for Sparc32 shifts 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 21 additions and 6 deletions
target-sparc/translate.c
  View file @e35298c
... ... @@ -3008,18 +3008,33 @@ static void disas_sparc_insn(DisasContext * dc)
3008 3008 break;
3009 3009 #ifndef TARGET_SPARC64
3010 3010 case 0x25: /* sll */
3011   - tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
3012   - tcg_gen_shl_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3011 + if (IS_IMM) { /* immediate */
  3012 + rs2 = GET_FIELDs(insn, 20, 31);
  3013 + tcg_gen_shli_tl(cpu_dst, cpu_src1, rs2 & 0x1f);
  3014 + } else { /* register */
  3015 + tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
  3016 + tcg_gen_shl_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3017 + }
3013 3018 gen_movl_TN_reg(rd, cpu_dst);
3014 3019 break;
3015 3020 case 0x26: /* srl */
3016   - tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
3017   - tcg_gen_shr_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3021 + if (IS_IMM) { /* immediate */
  3022 + rs2 = GET_FIELDs(insn, 20, 31);
  3023 + tcg_gen_shri_tl(cpu_dst, cpu_src1, rs2 & 0x1f);
  3024 + } else { /* register */
  3025 + tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
  3026 + tcg_gen_shr_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3027 + }
3018 3028 gen_movl_TN_reg(rd, cpu_dst);
3019 3029 break;
3020 3030 case 0x27: /* sra */
3021   - tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
3022   - tcg_gen_sar_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3031 + if (IS_IMM) { /* immediate */
  3032 + rs2 = GET_FIELDs(insn, 20, 31);
  3033 + tcg_gen_sari_tl(cpu_dst, cpu_src1, rs2 & 0x1f);
  3034 + } else { /* register */
  3035 + tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f);
  3036 + tcg_gen_sar_tl(cpu_dst, cpu_src1, cpu_tmp0);
  3037 + }
3023 3038 gen_movl_TN_reg(rd, cpu_dst);
3024 3039 break;
3025 3040 #endif
... ...